Patents by Inventor Wei-Li Huang

Wei-Li Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11958850
    Abstract: Compounds and pharmaceutical compositions that modulate kinase activity, including mutant EGFR and mutant HER2 kinase activity, and compounds, pharmaceutical compositions, and methods of treatment of diseases and conditions associated with kinase activity, including mutant EGFR and mutant HER2 activity, are described herein.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 16, 2024
    Assignee: TAKEDA PHARMACEUTICAL COMPANY LIMITED
    Inventors: Wei-Sheng Huang, Yongjin Gong, Feng Li, Nicholas E. Bencivenga, David C. Dalgarno, Anna Kohlmann, William C. Shakespeare, Ranny M. Thomas, Xiaotian Zhu, Angela V. West, Willmen Youngsaye, Yun Zhang, Tianjun Zhou
  • Patent number: 11953955
    Abstract: A fixing mechanism is applied to an interface card assembly and an electronic apparatus. The fixing mechanism includes a movable window and an operation component. The movable window is slidably disposed on a casing of the interface card assembly. The operation component has a fixed end and a free end opposite to each other. The fixed end is disposed on the movable window. The free end is detachably engaged with the casing to position the movable window. The movable window is positioned on one of a first region and a second region of the casing for respectively fixing interface cards with different sizes to the casing.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 9, 2024
    Assignee: Wiwynn Corporation
    Inventors: Wei-Li Huang, Wei-Hao Chen
  • Publication number: 20240086026
    Abstract: Systems and methods are disclosed for providing a virtual mouse for a computing device have a touchscreen. A first placement region of the touchscreen may be determined. The first placement region may then be determined to contain a first portion of at least one touch target. The first portion of the at least one touch target may then be deactivated. A virtual mouse may then be activated at the first placement region.
    Type: Application
    Filed: August 15, 2023
    Publication date: March 14, 2024
    Inventors: Roya CODY, Che YAN, Da Yuan HUANG, Wei LI
  • Publication number: 20240078050
    Abstract: Container data sharing is provided. A second container of a cluster of containers is started to process a service request in response to detecting a failure of a first container processing the service request. The service request and data generated by the first container that failed stored on a physical external memory device is accessed. The service request and the data generated by the first container that failed is loaded on the second container from the physical external memory device via a dedicated hardware link for high-speed container failure recovery.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Hui Wang, Yue Wang, Mai Zeng, Wei Li, Yu Mei Dai, Xiao Chen Huang
  • Patent number: 11908885
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation element over the magnetic element. The i magnetic element is wider than the isolation element. The semiconductor device structure further includes a conductive line over the isolation element.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Yu Ku, Chi-Cheng Chen, Hon-Lin Huang, Wei-Li Huang, Chun-Yi Wu, Chen-Shien Chen
  • Publication number: 20230422422
    Abstract: An engaging mechanism includes a casing, a first engaging member and a second engaging member. The casing has a first engaging recess and a second engaging recess. The first engaging member is slidably disposed in the casing and has a first engaging portion. The second engaging member is rotatably disposed in the casing and has a second engaging portion. When the first engaging member is located at a first lock position, the second engaging member is able to rotate between a second lock position and a second unlock position. When the second engaging member is located at the second unlock position and the first engaging member slides from the first lock position to a first unlock position, the first engaging member pushes the second engaging member to rotate toward the second lock position, such that the second engaging portion blocks the second engaging recess.
    Type: Application
    Filed: July 15, 2022
    Publication date: December 28, 2023
    Applicant: Wiwynn Corporation
    Inventors: Wei-Li Huang, Hung-Lung Lin, Yan-Yu Chen
  • Publication number: 20230361157
    Abstract: The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventors: Hung-Wen Hsu, Po-Han Huang, Wei-Li Huang
  • Publication number: 20230361156
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation element partially covering the magnetic element. The semiconductor device structure further includes a conductive feature over the isolation element.
    Type: Application
    Filed: July 17, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Cheng CHEN, Wei-Li HUANG, Chien-Chih KUO, Hon-Lin HUANG, Chin-Yu KU, Chen-Shien CHEN
  • Patent number: 11784211
    Abstract: The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: October 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Wen Hsu, Po-Han Huang, Wei-Li Huang
  • Publication number: 20230290809
    Abstract: A method of forming a semiconductor device includes: forming a passivation layer over a conductive pad that is disposed over a substrate; and forming an inductive component over the passivation layer, including: forming a first insulation layer and a first magnetic layer successively over the passivation layer; forming a first polymer layer over the first magnetic layer; forming a first conductive feature over the first polymer layer; forming a second polymer layer over the first polymer layer and the first conductive feature; patterning the second polymer layer, where after the patterning, a first sidewall of the second polymer layer includes multiple segments, where an extension of a first segment of the multiple segments intersects the second polymer layer; and after patterning the second polymer layer, forming a second insulation layer and a second magnetic layer successively over the second polymer layer.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 14, 2023
    Inventors: Mei-Chi Lee, Chi-Cheng Chen, Wei-Li Huang, Kai Tzeng, Chun Yi Wu, Ming-Da Cheng
  • Patent number: 11749711
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an adhesive element between the magnetic element and the substrate. The adhesive element extends exceeding opposite edges of the magnetic element. The semiconductor device structure further includes an isolation element extending exceeding the opposite edges of the magnetic element. The isolation element partially covers a top surface of the magnetic element. In addition, the semiconductor device structure includes a conductive line over the isolation element.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Cheng Chen, Wei-Li Huang, Chien-Chih Kuo, Hon-Lin Huang, Chin-Yu Ku, Chen-Shien Chen
  • Publication number: 20230268272
    Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect structure over the substrate. The chip structure includes a conductive pad over the interconnect structure. The chip structure includes a passivation layer covering the interconnect structure and exposing the conductive pad. The chip structure includes a first etch stop layer over the passivation layer. The chip structure includes a first buffer layer over the first etch stop layer. The first etch stop layer and the first buffer layer are made of different materials. The chip structure includes a second etch stop layer over the first buffer layer. The second etch stop layer and the first buffer layer are made of different materials. The chip structure includes a device element over the second etch stop layer.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Inventors: Ping-En CHENG, Wei-Li HUANG, Kun-Ming TSAI, Shih-Hao LIN
  • Publication number: 20230238422
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 27, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Cheng CHEN, Wei-Li HUANG, Chun-Yi WU, Kuang-Yi WU, Hon-Lin HUANG, Chih-Hung SU, Chin-Yu KU, Chen-Shien CHEN
  • Patent number: 11670590
    Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect structure over the substrate. The chip structure includes a conductive pad over the interconnect structure. The chip structure includes a passivation layer covering the interconnect structure and exposing the conductive pad. The chip structure includes a first etch stop layer over the passivation layer. The chip structure includes a first buffer layer over the first etch stop layer. The chip structure includes a second etch stop layer over the first buffer layer. The chip structure includes a device element over the second etch stop layer.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-En Cheng, Wei-Li Huang, Kun-Ming Tsai, Shih-Hao Lin
  • Publication number: 20230154788
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The semiconductor device structure includes a first protection cap over the end portion. The first protection cap and the first conductive line are made of different conductive materials, and the first protection cap exposes a peripheral region of a top surface of the end portion. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 18, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li YANG, Wei-Li HUANG, Sheng-Pin YANG, Chi-Cheng CHEN, Hon-Lin HUANG, Chin-Yu KU, Chen-Shien CHEN
  • Patent number: 11621317
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation layer covering the magnetic element and a portion of the semiconductor substrate. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding edges of the magnetic element.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 4, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Cheng Chen, Wei-Li Huang, Chun-Yi Wu, Kuang-Yi Wu, Hon-Lin Huang, Chih-Hung Su, Chin-Yu Ku, Chen-Shien Chen
  • Publication number: 20230063239
    Abstract: A fixing mechanism is applied to an interface card assembly and an electronic apparatus. The fixing mechanism includes a movable window and an operation component. The movable window is slidably disposed on a casing of the interface card assembly. The operation component has a fixed end and a free end opposite to each other. The fixed end is disposed on the movable window. The free end is detachably engaged with the casing to position the movable window. The movable window is positioned on one of a first region and a second region of the casing for respectively fixing interface cards with different sizes to the casing.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 2, 2023
    Applicant: Wiwynn Corporation
    Inventors: Wei-Li Huang, Wei-Hao Chen
  • Publication number: 20230051280
    Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect structure over the substrate. The chip structure includes a conductive pad over the interconnect structure. The chip structure includes a passivation layer covering the interconnect structure and exposing the conductive pad. The chip structure includes a first etch stop layer over the passivation layer. The chip structure includes a first buffer layer over the first etch stop layer. The chip structure includes a second etch stop layer over the first buffer layer. The chip structure includes a device element over the second etch stop layer.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Inventors: Ping-En CHENG, Wei-Li HUANG, Kun-Ming TSAI, Shih-Hao LIN
  • Patent number: 11557508
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The semiconductor device structure includes a first protection cap over the first conductive line. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap. The semiconductor device structure includes a second conductive line over the conductive via structure and the first photosensitive dielectric layer. The semiconductor device structure includes a second protection cap over the second conductive line. The semiconductor device structure includes a second photosensitive dielectric layer over the first photosensitive dielectric layer, the second conductive line, and the second protection cap.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: January 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Li Yang, Wei-Li Huang, Sheng-Pin Yang, Chi-Cheng Chen, Hon-Lin Huang, Chin-Yu Ku, Chen-Shien Chen
  • Patent number: 11477906
    Abstract: An assembly structure includes a first assembly member, a second assembly member, a first sliding member and a second sliding member. The first assembly member includes a first engaging portion and a second engaging portion. The first sliding member includes a first through hole and a first engaging recess. The first engaging portion is disposed in the first through hole. The second sliding member includes a second through hole and a second engaging recess. The second engaging portion is disposed in the second through hole. The first sliding member slides toward a first direction to drive the second sliding member to slide toward a second direction, such that the first engaging portion engages with the first engaging recess and the second engaging portion engages with the second engaging recess.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 18, 2022
    Assignee: Wiwynn Corporation
    Inventors: Chao-Yen Hu, Yong-Yuan Yang, Wei-Li Huang, Chih-Hui Hsieh