Abstract: There is provided a neck support with a plurality of independently controlled airbags. This may have the advantage that the tilt, comfort and/or support of the user's neck can be adjusted to reduce neck strain and/or the user's sleeping/waking state can be managed according to the journey progress.

Abstract: Disclosed is a method of forming a target pattern for a semiconductor device using multiple directed self-assembly (DSA) patterning processes. The method includes receiving a substrate and forming a guide pattern over the substrate by performing a process that includes a first DSA process. The method further includes performing a second DSA process over the substrate using the guide pattern. In an embodiment, the first DSA process controls the first pitch of a dense pattern in a first direction and the second DSA process controls the second pitch of the dense pattern in a second direction.

Abstract: Disclosed is a method of forming a target pattern for a semiconductor device using multiple directed self-assembly (DSA) patterning processes. The method includes receiving a substrate and forming a guide pattern over the substrate by performing a process that includes a first DSA process. The method further includes performing a second DSA process over the substrate using the guide pattern. In an embodiment, the first DSA process controls the first pitch of a dense pattern in a first direction and the second DSA process controls the second pitch of the dense pattern in a second direction.

Abstract: A technique for patterning a workpiece such as an integrated circuit workpiece is provided. In an exemplary embodiment, the method includes receiving a workpiece having a material layer disposed on a substrate. A first set of fins is formed on the material layer, and a second set of fins is formed on the material layer interspersed between the first set of fins. The second set of fins have a different etchant sensitivity from the first set of fins. A first etching process is performed on the first set of fins and configured to avoid substantial etching of the second set of fins. A second etching process is performed on the second set of fins and configured to avoid substantial etching of the first set of fins. The material layer is etched to transfer a pattern defined by the first etching process and the second etching process.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of first spacers over a substrate. A second spacer of a plurality of second spacers is deposited on sidewalls of each first spacer. In some embodiments, a spacing between adjacent first spacers is configured such that second spacers formed on sidewalls of the adjacent first spacers physically merge to form a merged second spacer. A second spacer cut process may be performed to selectively remove at least one second spacer. In some embodiments, a third spacer of a plurality of third spacers is formed on sidewalls of each second spacer. A third spacer cut process may be performed to selectively remove at least one third spacer. A first etch process is performed on the substrate to form fin regions. The plurality of third spacers mask portions of the substrate during the first etch process.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of first spacers over a substrate. A second spacer of a plurality of second spacers is deposited on sidewalls of each first spacer. In some embodiments, a spacing between adjacent first spacers is configured such that second spacers formed on sidewalls of the adjacent first spacers physically merge to form a merged second spacer. A second spacer cut process may be performed to selectively remove at least one second spacer. In some embodiments, a third spacer of a plurality of third spacers is formed on sidewalls of each second spacer. A third spacer cut process may be performed to selectively remove at least one third spacer. A first etch process is performed on the substrate to form fin regions. The plurality of third spacers mask portions of the substrate during the first etch process.

Abstract: A method for lithography exposing process is provided. The method includes performing a first lithography exposing process to a resist layer using a mask having a focus-sensitive pattern and an energy-sensitive pattern; measuring critical dimensions (CDs) of transferred focus-sensitive pattern and transferred energy-sensitive pattern on the resist layer; extracting Bossung curves from the CDs; and determining slopes of the Bossung curves.

Abstract: The present disclosure provides a method. The method includes forming a resist layer on a patterned substrate; collecting first overlay data from the patterned substrate; determining an overlay compensation based on mapping of second overlay data from an integrated circuit (IC) pattern to the first overlay data from the patterned substrate; performing a compensation process to a lithography system according to the overlay compensation; and thereafter performing a lithography exposing process to the resist layer by the lithography system, thereby imaging the IC pattern to the resist layer.

Abstract: A garment comprising: at least two compartments, at least two air bladders within the compartments configured to constrict the torso of a user, a sensor configured to detect the pressure in the air bladders, and a controller configured communicate with a mobile device app to allow a user independently control of the pressure in each air bladder according to predetermined criteria.

Abstract: A method for lithography exposing process is provided. The method includes performing a first lithography exposing process to a resist layer using a mask having a focus-sensitive pattern and an energy-sensitive pattern; measuring critical dimensions (CDs) of transferred focus-sensitive pattern and transferred energy-sensitive pattern on the resist layer; extracting Bossung curves from the CDs; and determining slops of the Bossung curves.

Abstract: A switching power supply with a resonant converter has an AC to DC converter and a DC to DC converter. The AC to DC converter converts an inputted AC power into a DC power. The DC to DC converter has a resonant converter determining a current operating state according to waveforms of a transformer voltage and a driving signal actually measured and further controlling a switching frequency of the resonant converter to approach or to be equal to a resonant frequency for operational efficiency enhancement. Accordingly, the failure to accurately calculate a resonant frequency beforehand can be solved and the issue of accurately keeping the switching frequency consistent with the resonant frequency can be tackled.

Abstract: A full bridge phase shifted power supply with synchronous rectification and current doubler and method for dynamically adjusting delay parameters thereof mainly have multiple delay parameter combinations respectively varying with multiple loads and embedded in a controller of the power supply. The delay parameter combinations serve to determine driving waveforms of two rectification switches of a synchronous rectification and current doubler circuit of the power supply. When the load of the power supply varies, the controller dynamically performs a corresponding delay parameter combination so as to vary the driving waveforms of the rectification switches of the synchronous rectification and current doubler circuit and enhance the operating efficiency of the power supply.

Abstract: The present invention discloses a compact server power supply having high power density has a casing, a main printed circuit board, a sub-printed circuit board, a power supplying circuit, a power output terminal set and a fan. The power supplying circuit has a primary side circuit unit, a transformer and a secondary side circuit unit. Electric elements of the primary and secondary side circuit units and the transformer are soldered on the main printed circuit board except parts of the electric elements of the secondary side circuit unit are soldered on the sub-printed circuit board. The sub-printed circuit board is vertically mounted and soldered on the main printed circuit board, so the length of the main printed circuit board is shortened to implement the server power supply having a compact size and high power density.

Abstract: A symmetric planar transformer having adjustable leakage inductance has a circuit board, two first bobbins mounted respectively on opposite side surfaces of the circuit board, two primary windings mounted respectively on the first bobbins, two secondary windings disposed respectively between the circuit board and the first bobbins, two second bobbins disposed respectively between adjacent first bobbins and primary windings, two pad sets disposed respectively between adjacent first bobbins and second bobbins, and a magnetic core assembly mounted through the circuit board, the first and second bobbins, the secondary and primary windings and the pad sets. Adjusting the numbers of the at least one pad of each pad set also adjusts distances between the primary and secondary windings to allow the secondary windings to have the same leakage. Thus, a balanced electric current is induced.

Abstract: Methods for forming a pattern in a lithography process for semiconductor wafer manufacturing are provided. In an example, a method includes forming a photoresist layer over a material layer; performing a first exposure process on the photoresist layer, thereby forming an exposed photoresist layer having soluble portions and unsoluble portions; treating the exposed photoresist layer, wherein the treating includes one of performing a second exposure process on the exposed photoresist layer and forming an adsorbing chemical layer over the exposed photoresist layer; and developing the exposed and treated photoresist layer to remove the soluble portions of the photoresist layer, wherein the unsoluble portions of the photoresist layer form a photoresist pattern that exposes portions of the material layer.

Abstract: Methods for forming a pattern in a lithography process for semiconductor wafer manufacturing are provided. In an example, a method includes forming a photoresist layer over a material layer; performing a first exposure process on the photoresist layer, thereby forming an exposed photoresist layer having soluble portions and unsoluble portions; treating the exposed photoresist layer, wherein the treating includes one of performing a second exposure process on the exposed photoresist layer and forming an adsorbing chemical layer over the exposed photoresist layer; and developing the exposed and treated photoresist layer to remove the soluble portions of the photoresist layer, wherein the unsoluble portions of the photoresist layer form a photoresist pattern that exposes portions of the material layer.

Abstract: A burst mode resonant power converter with high conversion efficiency has a rectifier, a power factor correction circuit, a resonant circuit, a controller, and a burst mode triggering unit. The maximum frequency switching end of the controller is connected to a maximum frequency variable circuit. When the load is medium or heavy, the maximum frequency variable circuit increases the maximum switch frequency of the controller. When the load is in the no-load or the light conditions, it reduces the maximum switch frequency thereof. Therefore, the controller reduces the number of times that the resonant circuit switches the bridge switch circuit. The conduction cycle of the 50% pulse signal output to the bridge switch circuit becomes longer. Larger energy can be transmitted at a time to the secondary coil of the transformer. This increases the overall efficiency.

Abstract: A universal input switching power supply has a signal detecting unit, two DC converting units and a physical wiring and controlling unit. The DC converting units are respectively adapted to couple to an AC power source to convert the AC power source to two first DC power sources and changes a voltage of each of the first power sources according to different voltage of the AC power source. The physical wiring and controlling unit is connected to the outputs of the DC converting units and the signal detecting unit and automatically connects the outputs of the PFC circuits in parallel if a high line voltage range of the AC power source is coupled to the full bridge rectifier. On the contrary, the physical wiring and controlling unit automatically connects the outputs of the PFC circuits in serial. Accordingly, the universal input switching power supply has good transmitting efficiency at different AC power source conditions.

Abstract: A power supply having a two-way DC to DC converter has an AC to DC converter and a two-way DC to DC converter. When an AC power is input to the AC to DC converter, the AC to DC converter transforms the AC power to a middle level DC power and the two-way DC to DC converter transforms the middle level DC power to a low level DC power. When the AC power is unavailable and the two-way DC to DC converter obtains an external DC power, the two-way DC to DC converter transforms the external DC power to the middle level DC power. Therefore, if the power supply obtains the external DC power, the power supply can still output the middle level DC power even the AC power is unavailable.

Abstract: A universal input switching power supply has the rectifier, a signal detecting unit detecting a voltage of an external AC power and outputting a detecting signal, a PFC circuit converts a first DC power from the rectifier to a second DC power with different voltage according to the detecting signal; and a parallel and serial type DC to DC converter converting the second DC power with different voltage to a constant voltage of the third DC power. The parallel and serial type DC to DC converter has a transformer having a primary and secondary coils and physically changes a turn ratio of the primary and secondary coils of a transformer thereof according to a voltage ratio of the second DC power and the third DC power. Accordingly, the universal input switching power supply has good transforming efficiency at different AC power source conditions.