Patents by Inventor Wei Min
Wei Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250254970Abstract: A method includes forming a gate structure over fins protruding from a semiconductor substrate; forming an isolation region surrounding the fins; depositing a spacer layer over the gate structure and over the fins, wherein the spacer layer fills the regions extending between pairs of adjacent fins; performing a first etch on the spacer layer, wherein after performing the first etch, first remaining portions of the spacer layer that are within inner regions extending between pairs of adjacent fins have a first thickness and second remaining portions of the spacer layer that are not within the inner regions have a second thickness less than the first thickness; and forming an epitaxial source/drain region adjacent the gate structure and extending over the fins, wherein portions of the epitaxial source/drain region within the inner regions are separated from the first remaining portions of the spacer layer.Type: ApplicationFiled: April 22, 2025Publication date: August 7, 2025Inventors: Wei-Min Liu, Hsueh-Chang Sung, Yee-Chia Yeo
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Publication number: 20250252878Abstract: A head-mounted display includes a casing, a first display panel, a second display panel, a third display panel, a projection optical engine, a first thermally conductive material layer, a control module, and an imaging lens. The first display panel, the second display panel, the third display panel, and the control module are disposed in the casing. The imaging lens is disposed on the casing. The first display panel, the second display panel, and the third display panel are configured to emit image beam respectively. The control module is electrically connected to the first display panel, the second display panel, and the third display panel to adjust light intensity of the image beam respectively according to a brightness value of ambient light to adjust a surface temperature of the casing. A light intensity adjustment method of the head-mounted display is further disclosed.Type: ApplicationFiled: January 17, 2025Publication date: August 7, 2025Applicant: Coretronic CorporationInventors: Yao-Hung Chen, Wei-Min Chien
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Publication number: 20250251610Abstract: The disclosure provides a wearable display device, including a bracket body, a bearing frame, a display module, and a transparent heat dissipation sheet. The bearing frame is connected to the bracket body and has an accommodation space. The display module is disposed in the accommodation space and has a first surface and a second surface that are opposite each other. The display module is suitable for projecting an image beam, and the image beam is projected out of the display module from one of the first surface and the second surface. The transparent heat dissipation sheet is disposed on at least one of the first surface and the second surface.Type: ApplicationFiled: January 21, 2025Publication date: August 7, 2025Inventors: Chu Yuan Tseng, WEI-MIN CHIEN
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Publication number: 20250243763Abstract: A rotor blade system. The rotor blade system includes a rotor and a plurality of blades coupled to the rotor. The plurality of blades are arranged in an airfoil distribution pattern. The airfoil distribution pattern includes one or more baseline blades and one or more intentionally mistuned blades including an intentional mistuning feature.Type: ApplicationFiled: March 3, 2025Publication date: July 31, 2025Inventors: Wei-Min Ren, Letian Wang, Kevin E. Turner, Yoon Seok Choi
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Publication number: 20250246544Abstract: Circuit devices, such as integrated circuit devices, are constructed with combination circuits that include two or more cascading transistors, and one or more metal layers disposed over the cascading transistors. The cascading transistors include multiple internal nodes (e.g., common source/drain regions). The multiple internal nodes are not connected to a common metal stripe (the same metal stripe) in the one or more metal layers. The absence of the connections between the internal nodes and a common metal stripe reduce or eliminate the load on the internal nodes. The transistors in the cascading transistors are independent of each other.Type: ApplicationFiled: April 16, 2025Publication date: July 31, 2025Inventors: Chien-Yuan Chen, Cheng-Hung Lee, Hung-Jen Liao, Hau-Tai Shieh, Kao-Cheng Lin, Wei-Min Chan
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Publication number: 20250234610Abstract: Methods of forming a low-resistance source/drain feature for a multi-gate device are provided. A example method includes forming a fin-shaped structure that includes a plurality of channel layers interleaved by a plurality of sacrificial layers, recessing a source/drain region of the fin-shaped structure to form a source/drain recess, selectively and partially recessing sidewalls of the plurality of sacrificial layers to form inner spacer recesses, forming inner spacers in the inner spacer recesses, forming a bottom dielectric layer over the substrate, depositing a first epitaxial layer over the inner spacers and the sidewalls of the plurality of the channel layers, performing a thermal treatment to reshape the first epitaxial layer, after the performing of the thermal treatment, depositing a second epitaxial layer over the first epitaxial layer. The first epitaxial layer includes germanium and the second epitaxial layer is free of germanium.Type: ApplicationFiled: May 6, 2024Publication date: July 17, 2025Inventors: Wei-Min Liu, Cheng-Yen Wen, Ming-Hua Yu, Chii-Horng Li
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Publication number: 20250224613Abstract: An adjustment method of a wearable display device includes steps of providing a display light beam to a light transmitting element to form an image, sensing an intensity of an ambient light to obtain a light intensity signal, and adjusting a brightness of the display light beam and/or a transmittance of the light transmitting element according to the light intensity signal. The adjustment method maintains good display effect of the wearable display device and improve user experience.Type: ApplicationFiled: January 9, 2025Publication date: July 10, 2025Applicant: Coretronic CorporationInventors: Yen-Ting Lin, Wei-Min Chien
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Publication number: 20250206663Abstract: In the present disclosure, an engineered stone is provided. The engineered stone includes a first full-body stone pattern, a second full-body stone pattern, a third full-body stone pattern, and a printed stone pattern. The first full-body stone pattern includes a first stone formulation. The second full-body stone pattern includes a second stone formulation, and the second stone formulation is different from the first stone formulation, wherein the first full-body stone pattern and the second full-body stone pattern are located on a front surface, a plurality of side surfaces and a back surface opposite to the front surface of the engineered stone. The printed stone pattern is located on the front surface of the engineered stone, and the printed stone pattern is overlapped with the first full-body stone pattern and the second full-body stone pattern.Type: ApplicationFiled: February 13, 2025Publication date: June 26, 2025Inventors: Cheng-Hsuan LAI, Wei-Min CHEN, Lei LIN
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Publication number: 20250203917Abstract: A device includes a first fin and a second fin extending from a substrate, the first fin including a first recess and the second fin including a second recess, an isolation region surrounding the first fin and surrounding the second fin, a gate stack over the first fin and the second fin, and a source/drain region in the first recess and in the second recess, the source/drain region adjacent the gate stack, wherein the source/drain region includes a bottom surface extending from the first fin to the second fin, wherein a first portion of the bottom surface that is below a first height above the isolation region has a first slope, and wherein a second portion of the bottom surface that is above the first height has a second slope that is greater than the first slope.Type: ApplicationFiled: February 13, 2025Publication date: June 19, 2025Inventors: Wei-Min Liu, Li-Li Su, Yee-Chia Yeo
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Patent number: 12334178Abstract: A memory cell includes a first, second, third, and fourth transistor, a first and a second inverter, and a first and second word line. The first inverter is coupled to the first and third transistor. The second inverter is coupled to the first inverter and the first and third transistor. The first word line is configured to supply a first word line signal, is on a first metal layer above a front-side of a substrate, and is coupled to the first and third transistor. The second word line is configured to supply a second word line signal, and is on a second metal layer below a back-side of the substrate opposite from the front-side of the substrate, and is coupled to the second and fourth transistor. At least the first, second, third or fourth transistor are on the front-side of the substrate.Type: GrantFiled: June 6, 2023Date of Patent: June 17, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen Lin Chung, Kao-Cheng Lin, Wei Min Chan, Yen-Huei Chen
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Patent number: 12336237Abstract: A device includes a first nanostructure over a semiconductor substrate; a second nanostructure over the first nanostructure; a gate structure surrounding the first nanostructure and the second nanostructure; a first epitaxial region in the semiconductor substrate adjacent the gate structure, wherein the first epitaxial region is a first doped semiconductor material; and a second epitaxial region over the first epitaxial region, wherein the second epitaxial region is adjacent the first nanostructure and the second nanostructure, wherein the second epitaxial region is a second doped semiconductor material that is different from the first doped semiconductor material. In an embodiment, the first doped semiconductor material has a smaller doping concentration than the second doped semiconductor material.Type: GrantFiled: December 14, 2021Date of Patent: June 17, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Min Liu, Li-Li Su, Chii-Horng Li, Yee-Chia Yeo
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Patent number: 12326312Abstract: A bullpup conversion kit and a gun including the same are provided, wherein bullpup conversion kit includes: a housing configured to be attached to the gun; a linkage member rotatably connected to the housing, and including a first end and a second end rotatable in opposing directions, the second end being configured to actuate a trigger of the gun; a trigger rotatably connected to the housing; an adaptor associated and movable with the trigger; and a first rod connected to the adaptor and the first end of the linkage member.Type: GrantFiled: May 24, 2024Date of Patent: June 10, 2025Inventor: Wei-Min Chen
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Publication number: 20250182797Abstract: A method of operating a memory device is provided. A clock signal is received. Each clock cycle of the clock signal initiates a write operation or a read operation in a memory device. A power nap period is then determined. The power nap period is compared with a clock cycle period to determine that the power nap period is less than the clock cycle period of the clock signal. A header control signal is generated in response to determining that the power nap period is less than the clock cycle period. The header control signal turns off a header of a component of the memory device.Type: ApplicationFiled: December 9, 2024Publication date: June 5, 2025Inventors: Chien-Chen Lin, Wei Min Chan
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Publication number: 20250175588Abstract: A head-mounted display apparatus including a casing, an optical engine module, an imaging module, a heat sink, a denoiser, a sensing module, and a control module. The casing includes a body part, from which extends a supporting part. The optical engine and imaging modules are disposed in the body part. An image projected by the optical engine module is displayed on the imaging module. The heat sink is disposed alongside the optical engine module. The sensing module is disposed in the supporting part to detect audio or/and vibration signals generated by the heat sink. The control module is electrically connected to the heat sink, denoiser and sensing module. The control module receives the audio or/and vibration signals detected by the sensing module and controls the denoiser to generate a reverse shock wave to eliminate the audio or/and vibration signals generated by the heat sink.Type: ApplicationFiled: November 17, 2024Publication date: May 29, 2025Applicant: Coretronic CorporationInventors: Wei-Min Chien, Tung-Chou Hu
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Publication number: 20250175606Abstract: A video encoder is coupled to an external memory and configured to encode an input data to generate an output data. The input data includes a coding block. The video encoder includes a control circuit, a data loading circuit, a mode decision circuit, and an entropy coding circuit. The control circuit generates a start signal corresponding to the coding block. The data loading circuit reads the coding block from the external memory according to the start signal. The mode decision circuit processes the coding block according to the starting signal and generate an intermediate data. The entropy coding circuit generates the output data according to the intermediate data. In a video encoding mode, the control circuit further generates an indication signal indicating whether an image block of the coding block exists, and the mode decision circuit processes the image block according to the indication signal.Type: ApplicationFiled: November 1, 2024Publication date: May 29, 2025Inventors: WEI MIN ZENG, CHENG HUNG TSAI
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Patent number: 12313929Abstract: Provided is a display panel, including: a base substrate, a display structure, a black matrix pattern, and a cylindrical lens structure layer. The black matrix pattern includes a plurality of first openings. The display panel is provided with a plurality of sub-pixel regions arranged in rows and columns. The first openings are disposed in the sub-pixel regions. The cylindrical lens structure layer includes a plurality of strip-shaped cylindrical lens structure and has a plurality of focal lines in an orthographic projection on the black matrix pattern. The focal lines are parallel to the length direction of the cylindrical lens structures. The focal lines partition each sub-pixel region into a plurality of regions. One of the plurality of regions is a non-crosstalk region. The black matrix pattern further includes second openings in the non-crosstalk regions. The second openings are disposed outside regions where the first openings are disposed.Type: GrantFiled: August 19, 2022Date of Patent: May 27, 2025Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Shiming Shang, Xiaoqing Peng, Hailin Xue, Weida Qin, Yanyun Li, Shaokai Su, Shaoming Yan, Wei Min
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Patent number: 12315685Abstract: Keycaps for use in association with key switches that facilitate the creation of custom keyboards. Mechanical keyboards feature key switches having standardized top portions that make it possible to fit a wide variety of different keycaps thereon. Specialized, electronic keycaps can introduce different functionalities to improve keyboard customizability. Keycaps can include haptic feedback mechanisms. Keycaps can include a display screen.Type: GrantFiled: May 28, 2021Date of Patent: May 27, 2025Assignee: Hewlett-Packard Development Company, L.P.Inventors: Wei-Min Liang, Huaichung Hsu
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Publication number: 20250159857Abstract: A device includes first and second gate electrodes, a word line and a first metal island. The first gate electrode corresponds to transistors of a memory cell. The second gate electrode is separated from the first gate electrode and corresponds to the transistors. The word line is coupled to the memory cell and located between the first and the second gate electrodes. The first metal island is configured to couple a first power supply to the memory cell. A first boundary of the first metal island is located between first and second boundaries of the first gate electrode and is located between first and second boundaries of the word line, and each of the first boundary of the first gate electrode and the first boundary of the word line is located between first and second boundaries of the first metal island.Type: ApplicationFiled: January 16, 2025Publication date: May 15, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hidehiro FUJIWARA, Wei-Min CHAN, Chih-Yu LIN, Yen-Huei CHEN, Hung-Jen LIAO
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Patent number: 12300605Abstract: Circuit devices, such as integrated circuit devices, are constructed with combination circuits that include two or more cascading transistors, and one or more metal layers disposed over the cascading transistors. The cascading transistors include multiple internal nodes (e.g., common source/drain regions). The multiple internal nodes are not connected to a common metal stripe (the same metal stripe) in the one or more metal layers. The absence of the connections between the internal nodes and a common metal stripe reduce or eliminate the load on the internal nodes. The transistors in the cascading transistors are independent of each other.Type: GrantFiled: July 31, 2023Date of Patent: May 13, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Yuan Chen, Cheng-Hung Lee, Hung-Jen Liao, Hau-Tai Shieh, Kao-Cheng Lin, Wei-Min Chan
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Patent number: D1083889Type: GrantFiled: January 10, 2024Date of Patent: July 15, 2025Assignee: AMBIT MICROSYSTEMS (SHANGHAI) LTD.Inventors: Qian-Kun Han, Wei-Min Chang