Abstract: An apparatus for detecting an anomaly in an electronic system embodying at least two integrated circuits, and where necessary, removing/mitigating the anomaly. The anomaly detection is based on sensing the characteristics of either the current, the voltage, or both the current and voltage of the supply rail connected to the at least two integrated circuits. When an anomaly occurs, the anomaly is detected by one sensing circuit sensing that the characteristics are different from that when the electronic system is functioning normally.

Abstract: An electronic apparatus for detecting or correcting or detecting and correcting at least one datum error in an electronic device or electronic circuit or electronic system is disclosed. The electronic apparatus comprises a controller and a first memory that is connected with the controller and has a first data with an error or a number of errors. The electronic apparatus also comprises a second memory that is connected with the controller and has a second data with no error or with a number of errors that is lower than the number of errors in the first memory, and that is in some fashion related to or resembling the first data. The controller performs the error detection or the error correction or both the error detection and the error correction to the first data by using the second data.

Abstract: A control circuitry of a switched-mode power module, the switched-mode power module comprising a power stage configured to receive input power from a power supply and to output power to a load, the output power having an output voltage, the control circuitry configured to enable the power stage to output power when the output voltage is lower than a reference voltage by one of: a predetermined amount and an adaptive amount, the control circuitry further configured to disable the power stage from providing the output power when the output voltage exceeds the reference voltage by one of: a predetermined amount and an adaptive amount.

Abstract: Systems and methods related to memory status based traffic routing on heterogeneous memory subsystem are disclosed herein. A high bandwidth memory (HBM) may act as a cache for a double data rate (DDR) memory. HBM may have a higher access latency than DDR memory in some situations, such as low usage. Access latency for a read request via a DDR memory may increase substantially when the usage exceeds one or more thresholds. Accordingly, the routing of the read requests may be tailored to reduce access latency. For example, the usage of the DDR memory may be monitored. When the usage is below a percentage threshold, the access request may be routed to DDR memory rather than HBM. When the usage is above a percentage threshold, the access request may be routed to HBM or DDR. Routing read requests in this manner may minimize overall latency of read access requests.

Abstract: Systems and methods related to networks of computational nodes such as cores in a multicore processor are disclosed herein. A disclosed method for executing a computation using a network of computational nodes includes assigning a component computation of the complex computation to a first computational node in the network of computational nodes. The first computational node includes a local memory. The local memory is reserved to be used for a cache by the computational node for executing the component computation. The disclosed method also includes reserving a remote memory on a second computational node in the network of computational nodes to be used for the cache by the computational node for executing the component computation.

Abstract: A circuit for mitigating single-effect-transients (SETs) comprising: a first sub-circuit comprising a first p-type transistor arrangement configured to generate a first output and a first n-type transistor arrangement configured to generate a second output; and a second sub-circuit comprising a connecting p-type transistor arrangement and a connecting n-type transistor arrangement connected in series, wherein the first output and the second output are electrically coupled to each other through the second sub-circuit.

Abstract: Disclosed herein is a folding optical waveguide near-to-eye display device, including: an image source (111), a prism (121) with a cylindrical surface, a curved lens (131), a prism (141), and a prism group (151) connected by two or more prisms glued together in sequence, where a prism surface of the prism (121) is partially or completely a cylindrical surface, the cylindrical surface faces the image source (111), the prism (121) is connected to the prism (141) through a prism surface other than the cylindrical surface to form a first gluing surface, the prism (121) is connected with an opposite surface of a curved surface of the curved lens (131) through another prism surface other than the cylindrical surface to form a second gluing surface, and the prism (141) and the prisms of the prism group (151) are glued and connected in sequence.

Abstract: The present disclosure provides a near-eye display device. The near-eye display device includes: a light source module and an optical module, where the light source module includes multiple laser image sources, which are vertical-cavity surface-emitting laser (VCSEL) image sources or collimated light image sources; the light source module is configured to: perform digital-to-analog (D-A) conversion on an image signal and load the image signal into the laser image sources, such that the laser image sources emit red, green, and blue (RGB) laser beams; the optical module includes a compound eye control chip and a projection element array; the projection element array includes multiple projection elements, which are arranged on the compound eye control chip according to a preset arrangement pattern; and the optical module is configured to: control the projection elements to rotate within a preset angle through the compound eye control chip.

Abstract: The present disclosure provides a near-eye display device. The near-eye display device includes: a light source module and an optical module, where the light source module includes multiple laser image sources, which are vertical-cavity surface-emitting laser (VCSEL) image sources or collimated light image sources; the light source module is configured to: perform digital-to-analog (D-A) conversion on an image signal and load the image signal into the laser image sources, such that the laser image sources emit red, green, and blue (RGB) laser beams; the optical module includes a compound eye control chip and a projection element array; the projection element array includes multiple projection elements, which are arranged on the compound eye control chip according to a preset arrangement pattern; and the optical module is configured to: control the projection elements to rotate within a preset angle through the compound eye control chip.

Abstract: An apparatus for detecting an anomaly in an electronic system embodying at least two integrated circuits, and where necessary, removing/mitigating the anomaly. The anomaly detection is based on sensing the characteristics of either the current, the voltage, or both the current and voltage of the supply rail connected to the at least two integrated circuits. When an anomaly occurs, the anomaly is detected by one sensing circuit sensing that the characteristics are different from that when the electronic system is functioning normally.

Abstract: A device that includes one or more charging circuits is disclosed. Each charging circuit includes an input for connecting to an energy source, an output for connecting to an energy storage device, a signal generator and a switching circuit. The signal generator is configured to generate a control signal that includes enabling and disabling signal portions having a duty cycle that is based on an output voltage at the output. The switching circuit is configured to alternately couple the output to the input and a ground during the enabling signal portions of the control signal, and to isolate the output from the input and the ground during the disabling signal portions of the control signal. A method of charging an energy storage device is also disclosed.

Abstract: Disclosed herein is a folding optical waveguide near-to-eye display device, including: an image source (111), a prism (121) with a cylindrical surface, a curved lens (131), a prism (141), and a prism group (151) connected by two or more prisms glued together in sequence, where a prism surface of the prism (121) is partially or completely a cylindrical surface, the cylindrical surface faces the image source (111), the prism (121) is connected to the prism (141) through a prism surface other than the cylindrical surface to form a first gluing surface, the prism (121) is connected with an opposite surface of a curved surface of the curved lens (131) through another prism surface other than the cylindrical surface to form a second gluing surface, and the prism (141) and the prisms of the prism group (151) are glued and connected in sequence.

Abstract: Antibody molecules that bind to CD73 are disclosed. The anti-CD73 antibody molecules can be used to treat, prevent and/or diagnose cancer.

Abstract: A control circuitry of a switched-mode power module, the switched-mode power module comprising a power stage configured to receive input power from a power supply and to output power to a load, the output power having an output voltage, the control circuitry configured to enable the power stage to output power when the output voltage is lower than a reference voltage by one of: a predetermined amount and an adaptive amount, the control circuitry further configured to disable the power stage from providing the output power when the output voltage exceeds the reference voltage by one of: a predetermined amount and an adaptive amount.

Abstract: A circuit for mitigating single-effect-transients (SETs) comprising: a first sub-circuit comprising a first p-type transistor arrangement configured to generate a first output and a first n-type transistor arrangement configured to generate a second output; and a second sub-circuit comprising a connecting p-type transistor arrangement and a connecting n-type transistor arrangement connected in series, wherein the first output and the second output are electrically coupled to each other through the second sub-circuit.

Abstract: A disclosed power management method includes monitoring a particular connector pin of a storage device and responsive to detecting a predetermined signal on the particular pin, performing rapid throttle operations including throttling the storage device to a low power consumption mode. The storage device might be an NVMe device and the particular connector pin may be a dual port enable pin of a U.2 connector or an EDSFF connector. Following a cold or warm reset, the particular connector pin may be monitored for an indication of whether a dual port enablement feature is provided. When the predetermined signal is not detected on the particular pin, an operating system may be permitted to upwardly adjust power levels for the power supply unit. In at least one embodiment, the predetermined signal may be a square wave signal generated by a field programmable gate array.

Abstract: Antibody molecules that bind to CD73 are disclosed. The anti-CD73 antibody molecules can be used to treat, prevent and/or diagnose cancer.

Abstract: The present invention relates to the field of control device technologies, and discloses a PLC-based electrical automation control device, including an extensible lifting base and a control box mounted on a top of the lifting base. A lifting platform that can move up and down is arranged inside the control box, an automation controller is installed on a top of the lifting platform, both sides of a bottom of the lifting platform are installed with a vertical spring, and a bottom of the spring is fixedly connected to an inner bottom wall of the control box. Left and right inner walls of the control box are each installed with a drive motor, and a rotating disk driven by the drive motor is arranged inside the control box.

Abstract: The present disclosure relates to other garbage and kitchen garbage classification throwing technologies in the technical field of garbage classification, in particular to a garbage bag. The garbage bag comprises a bag body, wherein the bag body is of a hollow structure with an opening in the top, a pouring opening is formed in the bottom of the bag body, and the bag body is formed in a folding mode so that the bottom of the bag body is fixed to one side of the bag body. When garbage in the bag body needs to be poured out, a point-breaking line or glue is torn off, the bottom of the bag body is separated from one side of the bag body, and after the bottom of the bag body naturally droops, the garbage is poured downwards from the point-breaking line under the gravity of the garbage to be separated from the bag body.

Abstract: Disclosed is a subpixel circuit 310 comprising: a first switching device 311 responsive to a digital periodic signal VP to provide a digital control signal VC relating to a digital data signal VD, the digital periodic signal VP defining 2N+1 time slots within each frame cycle, where N is a predetermined integer. The digital data signal VD has a predetermined value at a predetermined one of the 2N+1 time slots; and the subpixel circuit 310 further comprises a second switching device 312 responsive to the control signal Vc to drive an associated light emitting element 320.