Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.

Abstract: A method of forming a semiconductor device structure is provided. The method includes forming a masking structure with first openings over a semiconductor substrate and correspondingly forming metal layers in the first openings. The method also includes recessing the masking structure to form second openings between the metal layers and forming a sacrificial layer surrounded by a first liner in each of the second openings. In addition, after forming a second liner over the sacrificial layer in each of the second openings, the method includes removing the sacrificial layer in each of the second openings to form a plurality of air gaps therefrom.

Abstract: A keyswitch includes a board, a cap located above the board, a membrane circuit board disposed on the board to make first and second engaging structures of the board protrude from first and second holes of the membrane circuit board respectively, and a lifting device. The lifting device is connected to the cap and the board and includes first and second support members. The first support member is movably connected to the cap and has a pivot end portion. The pivot end portion is movably connected to the first and second engaging structures and has a first abutting portion extending toward edges of the first and second holes along a pivot axis of the first engaging structure. The first abutting portion abuts on the membrane circuit board. The second support member rotatably intersects with the first support member and is movably connected to the cap and the board.

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

Abstract: A system and method for managing and controlling power of base station when a connectable terminal device is moving at speed through the coverage area of the base station, the method obtains a transmission power from a terminal through the base station; obtains location of the terminal, and generates a transmission power conversion table according to the terminal transmission power and the terminal location. The transmission power conversion table is transmitted to the terminal by the base station, the transmission power being used by the terminal according to the transmission power conversion table, avoiding repeated communications and electrical energy cost between base station and terminal in respect of the changing location of the terminal.

Abstract: A contact lens includes a central region, an annular region and a peripheral region. The central region includes a central point of the contact lens. The annular region symmetrically surrounds the central region. The peripheral region symmetrically surrounds the annular region. The peripheral region includes at least one color pattern portion. The annular region includes at least one power of critical point.

Abstract: An electronic circuit for operating with a display panel including touch sensors and fingerprint sensors is provided. The electronic circuit includes a first circuit, a second circuit, a third circuit, a first switch circuit and a control circuit. The first circuit generates display driving signals for driving the display panel. The second circuit receives fingerprint sensing signals from the fingerprint sensors. The third circuit determines a touch information according to touch sensing signals from the touch sensors. The first switch circuit includes a plurality of first switch units, each of the first switch units includes a first switch element and a second switch element. The control circuit controls the first switch circuit to transmit the display driving signals in a first time interval, controls the first switch circuit to transmit the fingerprint sensing signals in a second time interval, and controls the third circuit to receive the fingerprint sensing signals in a third time interval.

Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.

Abstract: A semiconductor package includes a chip, a circuit board and a filling material. The circuit board includes a substrate, a patterned metal layer and a protective layer. A circuit area, a chip-mounting area and a flow-guiding area are defined on a surface of the substrate. The chip is mounted on the chip-mounting area. A flow-guiding member of the patterned metal layer is arranged on the flow-guiding area and includes a hollow portion and flow-guiding grooves which are communicated with the hollow portion and arranged radially. The flow-guiding grooves are provided to allow the protective layer to flow toward the hollow portion, and the hollow portion and the flow-guiding grooves are provided to allow the filling material to flow toward the protective layer such that the filling material can cover the protective layer to improve structural strength of the semiconductor package.

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

Abstract: A system and method for managing and controlling power of base station when a connectable terminal device is moving at speed through the coverage area of the base station, the method obtains a transmission power from a terminal through the base station; obtains location of the terminal, and generates a transmission power conversion table according to the terminal transmission power and the terminal location. The transmission power conversion table is transmitted to the terminal by the base station, the transmission power being used by the terminal according to the transmission power conversion table, avoiding repeated communications and electrical energy cost between base station and terminal in respect of the changing location of the terminal.

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

Abstract: A disclosed semiconductor device includes a package substrate, a first semiconductor die coupled to the package substrate, a package lid attached to the package substrate and covering the semiconductor die, and a thermal interface material located between a top surface of the semiconductor die and an internal surface of the package lid. The semiconductor device may further include a dam formed on the internal surface of the package lid. The dam may constrain the thermal interface material on one or more sides of the first semiconductor die such that the thermal interface material is located within a predetermined volume between the top surface of the first semiconductor die and the internal surface of the package lid during a reflow operation. The package lid may include a metallic material and the dam may include an epoxy material formed as a single continuous structure or may be formed as several disconnected structures.

Abstract: A method for managing network connections includes steps of: in response to receipt of a request for establishing a new network connection, storing in a connection-tracking (Conntrack) table an entry of tracked connection data that is related to the new network connection to be established, and updating a current tracked-connection count by adding one thereto; determining a priority level of the new network connection according to a data packet transmitted through the new network connection; and determining whether to output data packets that are received through the new network connection based at least on the current tracked-connection count and the priority level of the new network connection.

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

Abstract: An electronic device includes a substrate, a plurality of electronic components and a conductive material. The electronic components are arranged on the substrate, and the electronic components respectively include a lower electrode, a semiconductor layer and an upper electrode, and they are sequentially stacked on the substrate. The electronic components share the semiconductor layer, and the semiconductor layer forms a plurality of connecting channels through the semiconductor layer. The connecting channels are located between the upper electrode of the first electronic component in the electronic components and the lower electrode of the second electronic component in the electronic components. These connecting channels are processed by lasers of different powers. The conductive material is arranged in the connecting channel so that the upper electrode of the first electronic component is electrically connected to the lower electrode of the second electronic component.

Abstract: A method for adjusting a total bandwidth for a network device is provided. The method includes: for every predetermined time period, determining a data rate of receiving data packets by the network device through a network communication during the predetermined time period; designating the greater one of the data rate and the total bandwidth as a maximal data rate; when a preset condition is not satisfied, using the maximal data rate as the total bandwidth; and when the preset condition is satisfied, determining an adjusted data rate that is smaller than the maximal data rate based on the maximal data rate, and using the adjusted data rate as the total bandwidth.

Abstract: A method is implemented by a router and includes: upon receiving a query on an Internet Protocol (IP) address for a domain name, sending the query to a DNS server in order for the DNS server to translate the domain name to an IP address and to transmit a DNS response containing the domain name and the IP address to the router; recording the domain name and the IP address in a table; sending the DNS response to an endpoint device so as to enable the endpoint device to establish a link with an application server via the router based on the IP address; finding the domain name in the lookup table based on the IP address; and determining a type of a service provided by the application server based on the domain name with reference to another table.

Abstract: A method for managing data throughput of a network device is provided. The method includes: determining a network communication as belonging to a first class or a second class; enqueuing each packet received through the network communication determined as belonging to the first class to a first queue, and enqueuing each packet received through the networking communication determined as belonging to the second class to a second queue; dequeuing the first and second queues at a dequeuing ratio; determining a data rate of dequeuing the second queue; and adjusting the dequeuing ratio based on the data rate of dequeuing the second queue thus determined, a total bandwidth, and a guaranteed minimum bandwidth for the network communication determined as belonging to the first class.

Abstract: The present disclosure provides methods of treating breast cancer, including triple negative breast cancer. The methods disclosed herein comprise administering a cationic liposomal formulation containing one or more cationic lipids and a taxane to a subject in need thereof. The methods also include administering one or more non-liposomal formulations including one or more active agents.