Abstract: An image correction method and an image correction device are provided. The image correction method includes the following steps: obtaining a gray level value of a pixel in an image and a frequency domain value of the gray level value; determining whether the frequency domain value is smaller than a first threshold; performing an adaptive gamma correction procedure on the gray level value according to the frequency domain value and outputting the result if the frequency domain value is smaller than the first threshold; outputting the gray level value directly if the frequency domain value is not smaller than the first threshold.

Abstract: A light source for a display device, includes: a first LED chip emitting a first light having a peak located within the range of wavelengths 380 nm to 500 nm, and a second LED chip emitting a second light having a peak located within the range of wavelengths 380 nm to 500 nm, wherein the peak wavelength of the second light is longer than the peak wavelength of the first light, and the difference between the peak wavelength of the second light and the peak wavelength of the first light is less than 40 nm and greater than or equal to 10 nm.

Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.

Abstract: A pixel structure includes a patterned insulating layer and a patterned electrode layer. The patterned insulating layer includes a first area and a second area, and the patterned electrode layer includes a third layer and a fourth layer. The first area has a plurality of bar-shaped structures, the third area is a block electrode, and the fourth area is composed of a plurality of first bar-shaped electrodes. The third area is disposed opposite to the first area such that the third area is protruded according to the bar-shaped structures thereby forming a plurality of second bar-shaped electrodes. The fourth area is disposed opposite to the second area such that the first bar-shaped electrodes are formed on the second area.

Abstract: The present invention provides a method for providing 3D stereo image. The method comprises: accepting a request submitted from a client system by an intermediate server system; selecting an image server based on the request and responding to the client system from the image server through a processor in the intermediate server system; requesting at least one 3D stereo image by the client system from the image server according to the response; and providing the at least one 3D stereo image to the client system by the image server system. The present invention also provides a system for providing 3D stereo image.

Abstract: A quantum dot nanocrystal structure includes: a core of a compound M1A1, wherein M1 is a metal selected from Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, and A1 is an element selected from Se, S, Te, P, As, N, I, and O; an inner shell having a composition containing a compound M1xM21-xA1yA21-y, wherein M2 is a metal selected from Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, A2 is an element selected from Se, S, Te, P, As, N, I and O; and a multi-pod-structured outer shell of a compound M1A2 or M2A2 enclosing the inner shell and having a base portion and protrusion portions extending from the base portion.

Abstract: A method is provided for operating a NAND array that includes a plurality of blocks of memory cells. A block of memory cells includes a plurality of NAND strings having channel lines between first string select switches and second string select switches. The plurality of NAND strings shares a set of word lines between the first and second string select switches. A channel-side erase voltage is applied to the channel lines through the first string select switches in a selected block. Word line-side erase voltages are applied to a selected subset of the set of word lines in the selected block to induce tunneling in memory cells coupled to the selected subset. Word line-side inhibit voltages are applied to an unselected subset of the set of word lines in the selected block to inhibit tunneling in memory cells coupled to the unselected subset.

Abstract: An image capturing device includes a first housing and a second housing. The first housing includes a first axis and a first slantwise surface. The second housing includes a second axis and a second slantwise surface. When the first housing is at a first state, the first axis and the second axis are substantially parallel to each other. When the first housing is not at the first state, the first axis and the second axis are nonparallel.

Abstract: An embodiment of a graphic remoting system of the present invention includes a network, a server and a client device. The network is applied to a RDP protocol. The server transfers display rendering commands which indicates a destination region through the network. The client device receives the display rendering commands. The client device of the present invention includes at least a graphic render engine, at least a surface, at least a mask generator, a plurality of mask buffer, at least a direct memory access with masks, and a plurality of display buffers. The surface is used for storing an image. The graphic render engine generates the image and stores the image into the surface according to the destination region. The mask buffers is used for storing bit masks; wherein the content values of the mask buffers are indicating updated areas of the image stored in the surface. The mask generator generates the bit masks according to the destination region, and stores the bit masks into the mask buffers.

Abstract: A pixel structure includes a substrate, an opposite substrate, a scan line and a data line, an active device, a pixel electrode, and a passivation layer. The pixel electrode has at least one block-shaped electrode and a plurality of first branch electrodes. The passivation layer has at least one block-shaped protrusion pattern, a plurality of branch protrusion patterns, and a plurality of grooves. The first branch electrodes are located on the block-shaped protrusion patterns. An Edge of the block-shaped electrodes further extends to the block-shaped protrusion patterns. An orthogonal projection gap W1 is between an orthogonal projection edge of the block-shaped electrode and an orthogonal projection edge of the nearest first branch electrode, and 0 ?m<W1?5 ?m. An orthogonal projection distance W2 is between the orthogonal projection edge of the block-shaped electrode and an orthogonal projection edge of the block-shaped protrusion pattern, and 0 ?m<W2?10 ?m.

Abstract: A treadmill comprises a base, a first frame, a second frame, and a driving assembly. The base allows a user to walk or run in place. The first frame and the second frame pivotally couple with a front portion and a rear portion of the base, respectively. The driving assembly moveably couples with the first frame and the second frame. The moving of the driving assembly between the first frame and the second frame will result in an elevation of the front portion or the rear portion.

Abstract: An image correction method and an image correction device are provided. The image correction method includes the following steps: obtaining a gray level value of a pixel in an image and a frequency domain value of the gray level value; determining whether the frequency domain value is smaller than a first threshold; performing an adaptive gamma correction procedure on the gray level value according to the frequency domain value and outputting the result if the frequency domain value is smaller than the first threshold; outputting the gray level value directly if the frequency domain value is not smaller than the first threshold.

Abstract: A method is provided for operating a NAND array that includes a plurality of blocks of memory cells. A block of memory cells includes a plurality of NAND strings having channel lines between first string select switches and second string select switches. The plurality of NAND strings shares a set of word lines between the first and second string select switches. A channel-side erase voltage is applied to the channel lines through the first string select switches in a selected block. Word line-side erase voltages are applied to a selected subset of the set of word lines in the selected block to induce tunneling in memory cells coupled to the selected subset. Word line-side inhibit voltages are applied to an unselected subset of the set of word lines in the selected block to inhibit tunneling in memory cells coupled to the unselected subset.

Abstract: A treadmill comprises a base, a first frame, a second frame, and a driving assembly. The base allows a user to walk or run in place. The first frame and the second frame pivotally couple with a front portion and a rear portion of the base, respectively. The driving assembly moveably couples with the first frame and the second frame. The moving of the driving assembly between the first frame and the second frame will result in an elevation of the front portion or the rear portion.

Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have, a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.

Abstract: A manufacturing method of the thin fan includes the steps of: providing a plastic material containing a plurality of metal particles; processing the plastic material to form a housing; removing a part surface of the housing and forming a layout area and an extended circuit on the housing, wherein one terminal of the extended circuit connects to the layout area; disposing a first signal connecting structure on the housing, wherein the first signal connecting structure connects to the other terminal of the extended circuit; and disposing a metal layer on the layout area and the extended circuit.

Abstract: A pulse width modulation device for use in an N-ports random access memory having a plurality of word line sets, wherein a specified word line set comprises N port word lines. The pulse width modulation device comprises a status detecting device and a clock signal generator. The status detecting device is coupled to the N port word lines having a first and a second port word line, and outputs a first control signal when both the voltage values of the first and second port word lines are within a first level range. The clock signal generator is coupled to the status detecting device and the specified word line set, and generates and outputs a first clock signal to the specified word line set, wherein a duration of the first clock signal kept within the first level range is variable in response to the first control signal.

Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.

Abstract: A display module includes a light source and a display unit. The light source has an emission spectrum having maximum peak values corresponding to a first maximum peak wavelength and a second maximum peak wavelength. The display unit includes a green filter layer having a transmittance spectrum. The emission spectrum and the transmittance spectrum have a right cross-point and a left cross-point. A product of an emission intensity value of the emission spectrum corresponding to the right cross-point and a transmittance intensity value of the transmittance spectrum corresponding to the right cross-point is a first product value. A product of an emission intensity value of the emission spectrum corresponding to the left cross-point and a transmittance intensity value of the transmittance spectrum corresponding to the left cross-point is a second product value. A ratio of the first product value to the second product value is less than 20%.

Abstract: A method of lithography patterning includes forming a first resist pattern on a substrate, wherein the first resist pattern including a plurality of openings. A second resist pattern is formed on the substrate and within the plurality of openings of the first resist pattern, wherein the second resist pattern includes at least one opening therein on the substrate. The first resist pattern is removed to uncover the substrate underlying the first resist pattern.