Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

Abstract: A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.

Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.

Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

Abstract: A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: The present disclosure provides a method to enlarge the process window for forming a source/drain contact. The method may include receiving a workpiece that includes a source/drain feature exposed in a source/drain opening defined between two gate structures, conformally depositing a dielectric layer over sidewalls of the source/drain opening and a top surface of the source/drain feature, anisotropically etching the dielectric layer to expose the source/drain feature, performing an implantation process to the dielectric layer, and after the performing of the implantation process, performing a pre-clean process to the workpiece. The implantation process includes a non-zero tilt angle.

Abstract: A method for forming a semiconductor contact structure is provided. The method includes depositing a dielectric layer over a substrate. The method also includes etching the dielectric layer to expose a sidewall of the dielectric layer and a top surface of the substrate. In addition, the method includes forming a silicide region in the substrate. The method also includes applying a plasma treatment to the sidewall of the dielectric layer and the top surface of the substrate to form a nitridation region adjacent to a periphery of the silicide region. The method further includes depositing an adhesion layer on the dielectric layer and the silicide region.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a source/drain structure disposed in the substrate at two sides of the gate structure, and a conductive plug. The source/drain structure includes an epitaxial layer and a dual metal silicide on the epitaxial layer. The epitaxial layer includes a first semiconductor material and a second semiconductor material. A lattice constant of the second semiconductor material is greater than a lattice constant of the first semiconductor material. The dual metal silicide includes the first semiconductor material, the second semiconductor material, a first metal material and a second metal material. An atomic size of the second metal material is greater than an atomic size of the first metal material. The conductive plug penetrates the dual metal silicide.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.

Abstract: A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.

Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

Abstract: A nitrogen plasma treatment is used on an adhesion layer of a contact plug. As a result of the nitrogen plasma treatment, nitrogen is incorporated into the adhesion layer. When a contact plug is deposited in the opening, an interlayer of a metal nitride is formed between the contact plug and the adhesion layer. A nitrogen plasma treatment is used on an opening in an insulating layer. As a result of the nitrogen plasma treatment, nitrogen is incorporated into the insulating layer at the opening. When a contact plug is deposited in the opening, an interlayer of a metal nitride is formed between the contact plug and the insulating layer.

Abstract: A nitrogen plasma treatment is used on an adhesion layer of a contact plug. As a result of the nitrogen plasma treatment, nitrogen is incorporated into the adhesion layer. When a contact plug is deposited in the opening, an interlayer of a metal nitride is formed between the contact plug and the adhesion layer. A nitrogen plasma treatment is used on an opening in an insulating layer. As a result of the nitrogen plasma treatment, nitrogen is incorporated into the insulating layer at the opening. When a contact plug is deposited in the opening, an interlayer of a metal nitride is formed between the contact plug and the insulating layer.