Patents by Inventor Wei-Yu Chen

Wei-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220310800
    Abstract: The present disclosure describes a semiconductor device and a method for forming the semiconductor device. The method includes forming a fin structure on a substrate, forming a gate structure on the fin structure, and forming a source/drain (S/D) region on the fin structure not covered by the gate structure. The method further includes forming a contact structure on the S/D region. Forming the contact structure includes forming a transition metal chalcogenide (TMC) layer on the S/D region, and forming a contact plug on the TMC layer.
    Type: Application
    Filed: November 23, 2021
    Publication date: September 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mrunal Abhijith Khaderbad, Wei-Yen WOON, Cheng-Ming LIN, Han-Yu LIN, Szu-Hua CHEN
  • Publication number: 20220308320
    Abstract: An optical photographing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof. The second lens element has refractive power. The third lens element has refractive power. The fourth lens element has refractive power. The fifth lens element with refractive power has an image-side surface being convex in a paraxial region thereof, wherein an object-side surface and the image-side surface of the fifth lens element are both aspheric. The sixth lens element with refractive power has an object-side surface and an image-side surface being both aspheric. The optical photographing lens assembly has a total of six lens elements with refractive power.
    Type: Application
    Filed: June 9, 2022
    Publication date: September 29, 2022
    Inventor: Wei-Yu CHEN
  • Publication number: 20220307869
    Abstract: A dynamic displacement error compensation system by which detection error information obtained based on calibration detection of first and second axes, is respectively made into first and second compensation tables for compensating displacement on the axes by using positional information of the axes as variables, the first compensation table is stored in a first driver of a first motor device for driving a first moving element to move linearly on the first axis, the second compensation table is stored in a second driver of a second motor device for driving a second moving element to move linearly on the second axis, the drivers simultaneously or successively obtain a first dynamic positional information of the first moving element on the first axis and a second dynamic positional information of the second moving element on the second axis, and the moving elements are respectively displaceably compensated according to the compensation tables.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 29, 2022
    Inventors: Kai-Ti CHEN, Chun-Yi YI, Wei-Te CHUANG, Yen-Yu CHEN
  • Patent number: 11456295
    Abstract: A semiconductor device includes a gate stack, an epitaxy structure, a first spacer, a second spacer, and a dielectric residue. The gate stack is over a substrate. The epitaxy structure is formed raised above the substrate. The first spacer is on a sidewall of the gate stack. The first spacer and the epitaxy structure define an air gap therebetween. The second spacer seals the air gap between the first spacer and the epitaxy structure. The dielectric residue is in the air gap and has an upper portion and a lower portion under the upper portion. The upper portion of the dielectric residue has higher etch resistance to phosphoric acid than that of the lower portion of the dielectric residue.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: September 27, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bo-Yu Lai, Kai-Hsuan Lee, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11454820
    Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yu Chen, Yen-Chiang Liu, Jiun-Jie Chiou, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Hsi-Cheng Hsu
  • Publication number: 20220299740
    Abstract: An optical lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof. The second lens element has refractive power. The third lens element has refractive power. The fourth lens element has refractive power. The fifth lens element with refractive power has an image-side surface being concave in a paraxial region thereof. The sixth lens element with refractive power has an object-side surface being concave in a paraxial region thereof. The seventh lens element with refractive power has an image-side surface being concave in a paraxial region thereof.
    Type: Application
    Filed: June 10, 2022
    Publication date: September 22, 2022
    Inventor: Wei-Yu CHEN
  • Publication number: 20220302064
    Abstract: A chip package structure includes a fan-out package containing at least one semiconductor die, an epoxy molding compound (EMC) die frame laterally surrounding the at least one semiconductor die, and a redistribution structure. The fan-out package has chamfer regions at which horizontal surfaces and vertical surfaces of the fan-out package are connected via angled surfaces that are not horizontal and not vertical. The chip package structure may include a package substrate that is attached to the fan-out package via an array of solder material portions, and an underfill material portion that laterally surrounds the array of solder material portions and contacts an entirety of the angled surfaces. The angled surfaces eliminate a sharp corner at which mechanical stress may be concentrated, and distribute local mechanical stress in the chamfer regions over a wide region to prevent cracks in the underfill material portion.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 22, 2022
    Inventors: Wei-Yu CHEN, Chi-Yang YU, Kuan-Lin HO, Chin-Liang CHEN, Yu-Min LIANG, Jiun Yi WU
  • Patent number: 11448891
    Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yu Chen, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Yen-Chiang Liu, Jiun-Jie Chiou, Li-Yang Tu, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Hsi-Cheng Hsu
  • Patent number: 11442256
    Abstract: An imaging optical lens assembly includes an aperture stop and a plurality of lens elements. The aperture stop has a fixed elliptical shape, and the aperture stop has a major axis and a minor axis.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: September 13, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Wei-Yu Chen, Hsiang-Chi Tang
  • Publication number: 20220285171
    Abstract: A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Inventors: Chen-Hua Yu, Hsien-Wei Chen, Chi-Hsi Wu, Der-Chyang Yeh, An-Jhih Su, Wei-Yu Chen
  • Publication number: 20220285221
    Abstract: The present disclosure provides low resistance contacts and damascene interconnects with one or more graphene layers in fin structures of FETs. An example semiconductor device can include a substrate with a fin structure that includes an epitaxial region. The semiconductor device can also include an etch stop layer on the epitaxial region, and an interlayer dielectric layer on the etch stop layer. The semiconductor device can further include a metal contact, above the epitaxial region, formed through the etch stop layer and the interlayer dielectric layer, and a graphene film at interfaces between the metal contact and each of the epitaxial region, the etch stop layer, and the interlayer dielectric layer.
    Type: Application
    Filed: December 14, 2021
    Publication date: September 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mrunal Abhijith Khaderbad, Wei-Yen Woon, Cheng-Ming Lin, Han-Yu Lin, Szu-Hua Chen, Jhih-Rong Huang, Tzer-Min Shen
  • Patent number: 11437420
    Abstract: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: September 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Chi Hung, Dun-Nian Yaung, Jen-Cheng Liu, Wei Chuang Wu, Yen-Yu Chen, Chih-Kuan Yu
  • Patent number: 11432372
    Abstract: A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Da Cheng, Hsiu-Jen Lin, Cheng-Ting Chen, Wei-Yu Chen, Chien-Wei Lee, Chung-Shi Liu
  • Patent number: 11424783
    Abstract: A transceiver includes a radio-frequency (RF) front-end circuit, a dedicated RF front-end circuit, and a switchable matching circuit. The RF front-end circuit deals with communications of at least a first wireless communication standard. The dedicated RF front-end circuit deals with communications of a second wireless communication standard only. The switchable matching circuit is coupled to the RF front-end circuit, the dedicated RF front-end circuit, and a signal port of a chip. The switchable matching circuit provides impedance matching between the signal port and the RF front-end circuit when the RF front-end circuit is in operation, and provides impedance matching between the signal port and the dedicated RF front-end circuit when the dedicated RF front-end circuit is in operation. The RF front-end circuit, the dedicated RF front-end circuit, and the switchable matching circuit are integrated in the chip.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: August 23, 2022
    Assignee: MEDIATEK INC.
    Inventors: Wei-Chia Chan, Tse-Yu Chen, Hui-Hsien Liu, Jui-Lin Hsu, Chun-Wei Lin
  • Publication number: 20220260811
    Abstract: An optical lens system includes nine lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element and a ninth lens element. At least one lens surface of the seventh lens element, the eighth lens element and the ninth lens element has at least one critical point in an off-axis region thereof, and each of the seventh lens element, the eighth lens element and the ninth lens element has at least one lens surface being aspheric.
    Type: Application
    Filed: April 18, 2022
    Publication date: August 18, 2022
    Applicant: LARGAN PRECISION CO., LTD.
    Inventor: Wei-Yu CHEN
  • Publication number: 20220262892
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation element over the magnetic element. The i magnetic element is wider than the isolation element. The semiconductor device structure further includes a conductive line over the isolation element.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 18, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Yu KU, Chi-Cheng CHEN, Hon-Lin HUANG, Wei-Li HUANG, Chun-Yi WU, Chen-Shien CHEN
  • Publication number: 20220262301
    Abstract: A display device with sensing element includes a substrate having a disposing surface, a plurality of display elements, at least one sensing element, and at least one lighting adjustment element. The display elements are disposed above the disposing surface to present an image. The at least one sensing element disposed above the disposing surface to sense a light brightness projected toward either side of the substrate. The at least one light adjustment element is in signal transmittable connection with the display elements and the at least one sensing element. The at least one light adjustment element adjusts a plurality of control signals inputted into the display elements to determine a contrast of the image.
    Type: Application
    Filed: November 18, 2021
    Publication date: August 18, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yu KUO, Wei-Chung CHEN, Yi-Hsiang HUANG, Yu- Hsiang LIU
  • Publication number: 20220261949
    Abstract: Examples described herein relate to a software and hardware optimization that manages scenarios where a write operation to a register is less than an entirety of the register. A compiler detects instructions that make partial writes to the same register, groups such instructions, and provides hints to hardware of the partial write. The execution unit combines the output data for grouped instructions and updates the destination register as single write instead of multiple separate partial writes.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Inventors: Chandra S. GURRAM, Gang Y. CHEN, Subramaniam MAIYURAN, Supratim PAL, Ashutosh GARG, Jorge E. PARRA, Darin M. STARKEY, Guei-Yuan LUEH, Wei-Yu CHEN
  • Patent number: 11415780
    Abstract: An imaging optical system includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with refractive power has an object-side surface being convex in a paraxial region and an image-side surface being concave in a paraxial region. The second lens element with positive refractive power has an image-side surface being convex in a paraxial region. The third lens element with negative refractive power has an image-side surface being concave in a paraxial region. The fourth lens element with positive refractive power has an image-side surface being convex in a paraxial region. The fifth lens element with negative refractive power has an image-side surface being concave in a paraxial region and having a convex shape in an off-axial region thereof.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: August 16, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Dung-Yi Hsieh, Chun-Che Hsueh, Wei-Yu Chen
  • Publication number: 20220254687
    Abstract: Methods for tuning threshold voltages of fin-like field effect transistor (FinFET) devices are disclosed herein. An exemplary integrated circuit device includes a high voltage n-type FinFET, a high voltage p-type FinFET, a low voltage n-type FinFET, and a low voltage p-type FinFET. Threshold voltages of the high voltage n-type FinFET and the high voltage p-type FinFET are greater than threshold voltages of the low voltage n-type FinFET and the low voltage p-type FinFET, respectively. The high voltage n-type FinFET, the high voltage p-type FinFET, the low voltage n-type FinFET, and the low voltage p-type FinFET each include a threshold voltage tuning layer that includes tantalum and nitrogen. Thicknesses of the threshold voltage tuning layer of the low voltage n-type FinFET and the low voltage p-type FinFET are less than thicknesses of the threshold voltage tuning layer of the high voltage n-type FinFET and the high voltage p-type FinFET, respectively.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 11, 2022
    Inventors: Chung-Liang Cheng, Wei-Jen Chen, Yen-Yu Chen, Ming-Hsien Lin