Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

Abstract: A data processing method applied in a data center is provided.

Abstract: Tag-guided image positioning method includes: defining a three-dimensional space coordinate system based on tag spatial position information obtained by identifying reference image(s) of a patient's body part disposed with reference tag(s), and position/direction data related to a medical device reference point (MDC)/direction (MDD); estimating a target coordinate in system representing a position of a target point based on three-dimensional medical image of patient's body part marked with target point and reference marker(s) corresponding to position(s) of reference tag(s) and reference coordinate(s) in system representing position(s) of reference tag(s); and outputting a positioning result as a basis for whether patient's body part should be adjusted based on a judgment result indicating whether or not in system a distance between target coordinate and a device coordinate representing a position of MDC and a pointing representing MDD are respectively consistent with a predetermined distance/medical device i

Abstract: An imaging optical lens system includes eight lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. The first lens element has positive refractive power. The second lens element has negative refractive power. The seventh lens element has an image-side surface being concave in a paraxial region thereof, and the image-side surface of the seventh lens element has at least one convex critical point in an off-axis region thereof.

Abstract: A semiconductor device, and method of fabricating the same, includes a first substrate, the first substrate including at least one visible light photosensor disposed between a first side and a second side of the first substrate, a second substrate including an infrared light photosensor disposed between a second side of the second substrate and a first side of the second substrate, and a metalens disposed between the visible light photosensor and the infrared light photosensor, the metalens configured to focus infrared light impinging on a surface of the first substrate onto the infrared light photosensor.

Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.

Abstract: A photographing optical lens system includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. Each of the seven lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The object-side surface of the first lens element is convex in a paraxial region thereof. The seventh lens element has negative refractive power. The object-side surface of the seventh lens element is concave in a paraxial region thereof. At least one of all lens surfaces of the seven lens elements is aspheric and has at least one inflection point.

Abstract: A method (of manufacturing a memory device) includes forming active regions extending in a first direction; over the active regions, doing as follows including, forming gate structures extending in a second direction perpendicular to the first direction, and forming contact-to-source/drain structures (MD structures) which extend in the second direction and are interspersed among corresponding ones of the gate structures; forming via-to-gate/MD (VGD) structures over corresponding ones of the gate structures and the MD structures; in a first metallization layer over the VGD structures, forming first front-side segments extending in the first direction and including one or more front-side routing (FRTE) segments; under the active regions, forming buried segment-to-source/drain structures (BVD structures); and in a first buried metallization layer under the BVD structures, forming first back-side segments extending in the first direction and including one or more first back-side power grid (BPG) segments.

Abstract: Aspects of the invention include generating a plurality of predictions that each define a plurality of future inputs for a model. A deviation curve is generated by determining a distance between each prediction of the plurality of predictions and a respective known data point of a plurality of known data points. One or more points in the deviation curve are sampled and the sampled points are compared to a low threshold and a high threshold. A judgement is determined for each prediction to determine whether the respective prediction will be accepted or denied as an input to the model. The future inputs for the model are modified based on the judgments.

Abstract: A light-emitting assembly includes a substrate and a plurality of light-emitting elements disposed on the substrate. The substrate includes a base material layer, a first electrical conductive layer and a protection layer in a sectional view. A thickness of the first electrical conductive layer is greater than a thickness of the protection layer. The thickness of the protection layer is greater than 0 ?m and less than 30 ?m. This disclosure can improve the non-uniform brightness issue (hotspots) or enhance the optical performance.

Abstract: A package structure is provided. The package structure includes a semiconductor chip and a protective layer laterally surrounding the semiconductor chip. The package structure also includes a polymer-containing element over the protective layer. The protective layer is wider than the polymer-containing element.

Abstract: A memory device includes a first word line and a second word line. A first portion of the first word line is formed in a first metal layer, a second portion of the first word line is formed in a second metal layer above the first metal layer, and a third portion of the first word line is formed in a third metal layer below the second metal layer. A first portion of the second word line is formed in the first metal layer. A second portion of the second word line is formed in the second metal layer. The first portion, the second portion, and the third portion of the first word line have sizes that are different from each other, and the first portion and the second portion of the second word line have sizes that are different from each other.

Abstract: A semiconductor structure includes a first transistor having a first source/drain (S/D) feature and a first gate; a second transistor having a second S/D feature and a second gate; a multi-layer interconnection disposed over the first and the second transistors; a signal interconnection under the first and the second transistors; and a power rail under the signal interconnection and electrically isolated from the signal interconnection, wherein the signal interconnection electrically connects one of the first S/D feature and the first gate to one of the second S/D feature and the second gate.

Abstract: An integrated circuit (IC) package includes a first integrated circuit (IC) device. An interconnection structure is disposed over the first IC device in a cross-sectional side view. The interconnection structure includes a plurality of interconnection components. A cavity is disposed in the interconnection structure in the cross-sectional side view. A second IC device is disposed at least partially within the cavity in the cross-sectional side view. The second IC device is electrically coupled to the first IC device through at least a subset of the interconnection components of the interconnection structure. A non-metallic material partially fills the cavity. The second IC device is at least partially surrounded by the non-metallic material in the cross-sectional side view and in a top view.

Abstract: A memory cell includes a write port and a read port. The write port includes two cross-coupled inverters that form a storage unit. The cross-coupled inverters are connected between a first power source signal line and a second power source signal line. The write port also includes a first local interconnect line in an interconnect layer that is connected to the second power source signal line. The read port includes a transistor that is connected to the storage unit in the write port and to the second power source signal line, and a second local interconnect line in the interconnect layer that is connected to the second power source signal line. The second local interconnect line in the read port is separate from the first local interconnect line in the write port.

Abstract: A chip package is provided. The chip package includes a device substrate, a first redistribution layer (RDL), a carrier base, and at least one conductive connection structure. The device substrate has at least one first through-via opening extending from the backside surface of the device substrate to the active surface of the device substrate. The first RDL is disposed on the backside surface of the device substrate and extends in the first through-via opening. The carrier base carries the device substrate, and has a first surface facing the backside surface of the device substrate and a second surface opposite the first surface. The conductive connection structure is disposed on the second surface of the carrier base and is electrically connected to the first RDL.

Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.

Abstract: A semiconductor structure includes an interconnect structure, a passivation structure, a first capacitor, and a contact feature. The interconnect structure is disposed over a semiconductor substrate. The passivation structure is disposed over the interconnect structure. The first capacitor is disposed within the passivation structure. The contact feature is disposed over the passivation structure, wherein the first capacitor is proximal to a corner of the contact feature. A method of manufacturing the semiconductor structure is also provided.

Abstract: An imaging optical lens assembly includes five optical elements with refractive power. The five optical elements, in order from an object side to an image side along an optical path, are a first optical element, a second optical element, a third optical element, a fourth optical element, and a fifth optical element. The first optical element has an object-side surface being concave in a paraxial region thereof. The third optical element has negative refractive power.

Abstract: A photographing optical lens system includes five lens elements being, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each lens element has an object-side surface facing the object side and an image-side surface facing the image side. The first lens element has positive refractive power and the object-side surface being convex in a paraxial region thereof. The image-side surface of the third lens element is convex in a paraxial region thereof. The object-side surface of the fourth lens element is convex in a paraxial region thereof. The fifth lens element has negative refractive power, the object-side surface being convex, and the image-side surface being concave in a paraxial region thereof.