Abstract: Implementations of the disclosure provide video processing apparatuses and methods for inter-prediction. A video processing method for the inter-prediction performed by a video decoder includes determining a reference index for a video block in a video frame of a video from a bitstream. The video processing method also includes generating a joint list including a plurality pairs of reference pictures based on a first reference list and a second reference list for the video block. The video processing method further includes reordering the plurality pairs of reference pictures in the joint list based on bilateral matching using one or more motion vectors of the video block to generate a reordered joint list. The video processing method further includes performing the inter-prediction on the video block based on the reordered joint list and the reference index.

Abstract: Methods, devices, and storage mediums are provided for encoding video signals. An encoder determines at least one versatile video coding (VVC) syntax flag. The encoder determines, in response to a syntax element indicating that inter prediction is allowed, inter related syntax elements. The encoder obtains a first reference picture I(0) and a second reference picture I(1) associated with a video block. The encoder obtains first prediction samples I(0)(i,j) of the video block from a reference block in the first reference picture I(0). The encoder obtains second prediction samples I(1)(i,j) of the video block from a reference block in the second reference picture I(1). The encoder obtains bi-prediction samples based on the at least one VVC syntax flag, the inter related syntax elements, the first prediction samples I(0)(i,j), and the second prediction samples I(1)(i,j).

Abstract: Methods for video decoding and encoding, apparatuses and non-transitory storage media are provided. In one decoding method, the decoder obtains a first geometric partition mode (GPM) part and a second GPM part for a coding unit (CU). The decoder disables template matching (TM) based GPM split modes reordering for multiple GPM split modes that are applied to the CU in response to determining that the first GPM part or the second GPM part is predicted with intra prediction. Furthermore, the decoder enables the TM based GPM split modes reordering for the multiple GPM split modes in response to determining that both the first GPM part and the second GPM part are predicted with inter prediction.

Abstract: Implementations of the disclosure provide a video processing apparatus and method for performing intra prediction on a video block. The video processing method may include receiving, by a processor, reference samples from a video frame of a video comprising the video block. The video processing method may further include determining, by the processor, a reference sample filter based on a size of each video block. The reference sample filter is among a plurality of reference sample filters each derived for a different video block size. The video processing method may also include applying, by the processor, the determined reference sample filter to the received reference samples. The video processing method may additionally include performing, by the processor, the intra prediction on the video block using the filtered reference samples.

Abstract: Methods, apparatuses, and non-transitory computer-readable storage mediums are provided for video coding. In one method, a decoder obtains a first flag that indicates whether a template-based intra mode derivation (TIMD) mode is applied to a current video block; and in response to determining that the TIMD mode is applied to the current video block based on the first flag, the decoder obtains a set of candidate list for the TIMD mode, where the set of candidate list includes a set of reference line list or a set of template candidate list.

Abstract: An electronic device includes a transparent substrate, a number of pixel structures and a first trace structure. The transparent substrate includes a transparent region and a trace region. Each of the pixel structures has a sub-pixel structure of first color and a sub-pixel structure of second color. The sub-pixel structure of first color has a light emitting element of first color. The sub-pixel structure of second color has a light emitting element of second color. The first trace structure includes a first main trace, a first auxiliary trace and a second auxiliary trace. The first main trace is disposed in the trace region and surrounds a portion of the transparent region. The first auxiliary trace and the second auxiliary trace are electrically connected to the first main trace, and are electrically connected to the corresponding sub-pixel structure of first color and the corresponding sub-pixel structure of second color, respectively.

Abstract: Methods and apparatuses for video coding are provided. The method includes that a decoder determines whether one or more reference picture lists are signaled in a picture header (PH) associated with a picture and whether the one or more reference picture lists indicate that one or more slices associated with the picture are bi-predictive. The method further includes that the decoder adds one or more constraints to one or more syntax elements in the PH in response to determining that the one or more reference picture lists are signaled in the PH and the one or more reference picture lists indicate that the one or more slices are not bi-predictive.

Abstract: An optical lens system comprising ten lens elements, the ten lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element, a ninth lens element and a tenth lens element, and each of the ten lens elements having an object-side surface facing toward the object side and an image-side surface facing toward the image side.

Abstract: A stacked via structure disposed on a conductive pillar of a semiconductor die is provided. The stacked via structure includes a first dielectric layer, a first conductive via, a first redistribution wiring, a second dielectric layer, a second conductive via, and a second redistribution wiring. The first dielectric layer covers the semiconductor die. The first conductive via is embedded in the first dielectric layer and electrically connected to the conductive pillar. The first redistribution wiring covers the first conductive via and the first dielectric layer. The second dielectric layer covers the first dielectric layer and the first redistribution wiring. The second conductive via is embedded in the second dielectric layer and landed on the first redistribution wiring. The second redistribution wiring covers the second conductive via and the second dielectric layer. A lateral dimension of the first conductive via is greater than a lateral dimension of the second conductive via.

Abstract: An image lens assembly includes five lens elements, which are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The third lens element has negative refractive power. The fourth lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof. The fifth lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The image-side surface of the fifth lens element includes at least one convex critical point in an off-axis region thereof.

Abstract: Methods for video decoding and encoding, apparatuses and non-transitory computer-readable storage media thereof are provided. In one method for video decoding, a binary arithmetic decoder may obtain a first probability for a binary symbol according to a first adaptation parameter, where the binary symbol is related to one given context model for the binary arithmetic decoder and the binary symbol is from a plurality of binary symbols associated with the context model. Furthermore, the decoder may obtain a second probability for the binary symbol according to a second adaptation parameter, and then obtain a multi-hypothesis probability according to the first probability, a first adaptive weight, the second probability, and a second adaptive weight, where the multi-hypothesis probability determines a probability of the binary symbol equaling to a binary value. Moreover, the decoder may decode the binary symbol according to the multi-hypothesis probability.

Abstract: A photographing optical lens system includes five lens elements being, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each lens element has an object-side surface facing the object side and an image-side surface facing the image side. The first lens element has positive refractive power and the object-side surface being convex in a paraxial region thereof. The image-side surface of the third lens element is convex in a paraxial region thereof. The object-side surface of the fourth lens element is convex in a paraxial region thereof. The fifth lens element has negative refractive power, the object-side surface being convex, and the image-side surface being concave in a paraxial region thereof.

Abstract: An electronic apparatus performs a method of decoding video data. The method includes: receiving, from the bitstream, a plurality of syntax elements associated with a coding unit, the plurality of syntax elements indicating the coding tree type of the coding unit, and whether the local dual tree mode is enabled for the coding unit; and in accordance with the determination that the coding tree type of the coding unit is a single tree, and the local dual tree mode is enabled for the coding unit: disabling the palette mode for the coding unit when the coding unit has the size equal to or less than a predefined threshold. The disabling palette mode for the coding unit may include: disabling the palette mode for both the luma component and chroma component of the coding unit, or disabling the palette mode for only the chroma component of the coding unit.

Abstract: An integrated circuit includes a first-type active-region structure and a second-type active-region structure extending in a first direction and a first terminal-conductor and a second terminal-conductor extending in a second direction. The integrated circuit also includes a first power stub and a second power stub in a first metal layer and a first power line and a second power line in a second metal layer. The integrated circuit further includes a first via connector directly connected between the first power stub and the first terminal-conductor, a second via connector directly connected between the second power stub and the second terminal-conductor, a third via connector directly connected between the first power stub and the first power line, and a fourth via connector directly connected between the second power stub and the second power line.

Abstract: An electronic apparatus performs a method of decoding video data. The method includes: receiving, from the bitstream, a plurality of syntax elements associated with a coding unit, the plurality of syntax elements indicating the coding tree type of the coding unit, and whether the local dual tree mode is enabled for the coding unit; and in accordance with the determination that the coding tree type of the coding unit is a single tree, and the local dual tree mode is enabled for the coding unit: disabling the palette mode for the coding unit when the coding unit has the size equal to or less than a predefined threshold. The disabling palette mode for the coding unit may include: disabling the palette mode for both the luma component and chroma component of the coding unit, or disabling the palette mode for only the chroma component of the coding unit.

Abstract: A processing apparatus includes a processing resource including a general-purpose parallel processing engine and a matrix accelerator. The matrix accelerator includes first circuitry to receive a command to perform operations associated with an instruction, second circuitry to configure the matrix accelerator according to a physical depth of a systolic array within the matrix accelerator and a logical depth associated with the instruction, third circuitry to read operands for the instruction from a register file associated with the systolic array, fourth circuitry to perform operations for the instruction via one or more passes through one or more physical pipeline stages of the systolic array based on a configuration performed by the second circuitry, and fifth circuitry to write output of the operations to the register file associated with the systolic array.

Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

Abstract: A static random access memory includes a first and second memory cell array, a first word line, a bit line, a bit line bar, a primary driver circuit, and a first and second supplementary driver circuit. The first supplementary driver circuit is configured to pull a voltage of a first signal of the bit line or a second signal of the bit line bar to a first voltage level during a write operation in response to a supplementary driver circuit enable signal. The second supplementary driver circuit is configured to sense the voltage of the first or second signal. The second supplementary driver circuit includes a first pass-gate transistor. A first terminal of the first pass-gate transistor is coupled to a reference voltage supply. A second terminal of the first pass-gate transistor is electrically floating. A third terminal of the first pass-gate transistor is coupled to a first node.

Abstract: An imaging optical lens system includes eight lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. The first lens element has positive refractive power. The second lens element has negative refractive power. The seventh lens element has an image-side surface being concave in a paraxial region thereof, and the image-side surface of the seventh lens element has at least one convex critical point in an off-axis region thereof.

Abstract: A system for judging input mode of form data is configured to extract a study-use field information and a study-use volume of time stamp from each form data having a ground truth of being manually input or automatically input to accordingly execute a learning calculation to generate a judgment calculation model, further to extract an under-judged field information and an under-judged volume of time stamp from each under-judged form data without the ground truth to accordingly generate a judgment result for predicting that the under-judged form data is manually input or automatically input, and further to define judgment-abnormal form data and a trace back ground truth to re-execute the learning calculation for revising the judgment calculation model when the judgment result does not comply with a feedback ground truth.