Patents by Inventor Wei-Yu Chen
Wei-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12681276Abstract: A photographing optical lens system includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. The second lens element has positive refractive power. The eighth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface of the eighth lens element has at least one convex shape in an off-axis region thereof, and both an object-side surface and the image-side surface thereof are aspheric. The photographing optical lens system has a total of eight lens elements. An air gap in a paraxial region is located between every two lens elements of the photographing optical lens system that are adjacent to each other.Type: GrantFiled: May 2, 2024Date of Patent: July 14, 2026Assignee: LARGAN PRECISION CO., LTD.Inventor: Wei-Yu Chen
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Patent number: 12672587Abstract: An electronic apparatus including a package substrate and a structure disposed on and electrically connected to the package substrate through conductive bumps is provided. The material of the conductive bumps includes a bismuth (Bi) containing alloy or an indium (In) containing alloy. In some embodiments, the bismuth (Bi) containing alloy includes Sn—Ag—Cu—Bi alloy. In some embodiments, a concentration of bismuth (Bi) contained in the Sn—Ag—Cu—Bi alloy ranges from about 1 wt % to about 10 wt %. Methods for forming the Sn—Ag—Cu—Bi alloy are also provided.Type: GrantFiled: March 13, 2023Date of Patent: June 30, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chao-Wei Chiu, Wei-Yu Chen, Chih-Chiang Tsao, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
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Publication number: 20260182427Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.Type: ApplicationFiled: February 18, 2026Publication date: June 25, 2026Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
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Patent number: 12660646Abstract: A method includes forming a composite package substrate. The formation of the composite package substrate includes encapsulating an interconnect die in an encapsulant, with the interconnect die including a plurality of through-vias therein, and forming a first plurality of redistribution lines (RDLs) and a second plurality of RDLs on opposite sides of the interconnect die. The method further includes bonding an organic package substrate to the composite package substrate, and bonding a first package component and a second package component to the first plurality of RDLs. The first package component and the second package component are electrically interconnected through the interconnect die and the first plurality of RDLs.Type: GrantFiled: January 9, 2023Date of Patent: June 16, 2026Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hao-Cheng Hou, Tsung-Ding Wang, Jung Wei Cheng, Yu-Min Liang, Chien-Hsun Lee, Shang-Yun Hou, Wei-Yu Chen, Collin Jordon Fleshman, Kuo-Lung Pan, Shu-Rong Chun, Sheng-Chi Lin
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Patent number: 12650578Abstract: An optical imaging lens assembly includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The seventh lens element has an image-side surface being concave in a paraxial region thereof. At least one of an object-side surface and the image-side surface of the seventh lens element has at least one critical point in an off-axis region thereof. The object-side surface and the image-side surface of the seventh lens element are both aspheric.Type: GrantFiled: November 15, 2023Date of Patent: June 9, 2026Assignee: LARGAN PRECISION CO., LTD.Inventor: Wei-Yu Chen
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Patent number: 12649194Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.Type: GrantFiled: November 7, 2024Date of Patent: June 9, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
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Patent number: 12642111Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: GrantFiled: August 28, 2022Date of Patent: May 26, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Publication number: 20260144074Abstract: A method of manufacturing a package structure includes the following processes. An encapsulant is formed to laterally encapsulate a die. A plurality of first connectors are formed over the encapsulant. A warpage control material is formed over the die, wherein the first connectors are exposed by the warpage control material. A protection material is formed over the encapsulant between the first connectors. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.Type: ApplicationFiled: January 18, 2026Publication date: May 21, 2026Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
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Publication number: 20260144075Abstract: A package structure includes a die, an encapsulant, a warpage control material and a protection material. The encapsulant laterally encapsulates the die. The warpage control material is disposed over the die. The protection material is disposed on a first sidewall of the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.Type: ApplicationFiled: January 19, 2026Publication date: May 21, 2026Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
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Publication number: 20260140347Abstract: An imaging optical lens system includes eleven lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element, a ninth lens element, a tenth lens element and an eleventh lens element. There is an air gap in a paraxial region between each of all adjacent lens elements of the imaging optical lens system. At least one of an object-side surface and an image-side surface of each of at least two lens elements located between an aperture stop and an image surface of the imaging optical lens system is concave in a paraxial region thereof and has at least one convex critical point in an off-axis region thereof.Type: ApplicationFiled: January 14, 2026Publication date: May 21, 2026Applicant: LARGAN PRECISION CO., LTD.Inventors: Wei-Yu CHEN, Hsin-Hsuan HUANG
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Patent number: 12635581Abstract: A package structure including a first semiconductor die, at least one second semiconductor die conductive terminals and an insulating encapsulation is provided. The at least one second semiconductor die is stacked on and electrically connected to the first semiconductor die. The conductive terminals are disposed on and electrically connected to the first semiconductor die. The insulating encapsulation laterally encapsulates the first semiconductor die, the at least one second semiconductor die and the conductive terminals, wherein the conductive terminals protrude from a surface of the insulating encapsulation. Furthermore, a method for forming the above-mentioned is also provided.Type: GrantFiled: February 10, 2023Date of Patent: May 19, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yu Chen, Chien-Hsun Lee
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Patent number: 12624178Abstract: A manufacturing method of a modified polymer layer modified by hydroxyapatite is provided in the present disclosure, including following steps: (a) providing a polymer layer; (b) plasma-activating acrylic acid using an atmospheric cold plasma device to modify a surface of the polymer layer to obtain an acrylic-modified polymer layer; (c) immersing the acrylic-modified polymer layer in a first solution containing a calcium ion to obtain a calcium-containing modified layer; and (d) immersing the calcium-containing modified layer in a second solution containing phosphate salt to obtain a modified polymer layer modified by hydroxyapatite.Type: GrantFiled: June 9, 2023Date of Patent: May 12, 2026Assignee: TAIWAN TEXTILE RESEARCH INSTITUTEInventors: Wei-Yu Chen, Jui-Sheng Lee, Hui-Ju Hsu
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Publication number: 20260126628Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.Type: ApplicationFiled: December 30, 2025Publication date: May 7, 2026Applicant: LARGAN PRECISION CO., LTD.Inventors: Po-Lun HSU, Wei-Yu CHEN, Kuan-Ting YEH, Ssu-Hsin LIU
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Publication number: 20260120989Abstract: A detection system includes a first electron source configured to generate a first electron beam and to cause the first electron beam to impinge on a sample, a second electron source configured to generate a second electron beam and to cause the second electron beam to impinge on the sample, a detector, and a control system. The control system is configured to control the first electron source to cause the first electron beam to scan an area of the sample, control a charge state of the sample by varying at least one of a landing energy and a beam current of the second electron beam, control the detector to detect electrons emitted by the sample, receive a detector signal from the detector, and generate a voltage contrast image from the detector signal.Type: ApplicationFiled: March 10, 2025Publication date: April 30, 2026Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-hung KUO, Wei-Yu CHEN, Kuang-Shing CHEN, Xiaomeng CHEN
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Publication number: 20260112332Abstract: A dual-mode transmission device includes a dual-mode signal output port, a detection module and a signal mode switching module. The dual-mode signal output port is configured to switchably connect a data source to a DP signal receiving port or an HDMI signal receiving port. The detection module is configured for detecting the type of a signal receiving port connected to the dual-mode signal output port. The signal mode switching module converts the dual-mode signal output port into a DP specification signal output port according to the type of the signal receiving port, and connects to the DP signal receiving port accordingly; or converts the dual-mode signal output port into an HDMI specification signal output port, and connects to the HDMI signal receiving port. The signal mode switching module switches the DP and the HDMI specification signal output ports by detecting potentials of pins through the detection module.Type: ApplicationFiled: June 23, 2025Publication date: April 23, 2026Applicant: Qisda CorporationInventors: Wei-Yu CHEN, Fu-Tsu YEN, Chien-Szu CHIU, Yu-Liang CHEN
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Patent number: 12596239Abstract: An electronic device includes an optical lens assembly. The optical lens assembly includes four lens elements which are, in order from an outer side to an inner side: a first lens element, a second lens element, a third lens element and a fourth lens element. The first lens element has negative refractive power. An outer-side surface of the first lens element is concave in a paraxial region thereof and has at least one convex critical point in an off-axis region thereof. The third lens element has positive refractive power. The fourth lens element has an inner-side surface being convex in a paraxial region thereof and having at least one concave critical point in an off-axis region thereof. The optical lens assembly has a total of four lens elements.Type: GrantFiled: December 16, 2021Date of Patent: April 7, 2026Assignee: LARGAN PRECISION CO., LTD.Inventors: Yu Jui Lin, Wei-Yu Chen
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Patent number: 12581977Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.Type: GrantFiled: March 22, 2024Date of Patent: March 17, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
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Publication number: 20260074883Abstract: An apparatus to facilitate a fused instruction to accelerate performance of secure hash algorithm 2 (SHA-2) in a graphics environment is disclosed. The apparatus includes a processor comprising processing resources, the processing resources comprising execution circuitry to receive a fused SHA instruction identifying a length corresponding to a data size of the fused SHA instruction and a functional control identifying an operation type of the fused SHA instruction; based on decoding the fused SHA instruction, cause a sub-function identified by the length and the function control to be scheduled to an integer pipeline of the execution resource; and execute the sub-function of the fused SHA instruction in an integer pipeline of the execution circuitry, the sub-function to perform merged operations on a source operand of the fused SHA instruction, the merged operations comprising a rotate operation, a shift operation, and an xor operation.Type: ApplicationFiled: May 13, 2025Publication date: March 12, 2026Applicant: Intel CorporationInventors: Supratim Pal, Wajdi Feghali, Changwon Rhee, Wei-Yu Chen, Timothy R. Bauer, Alexander Lyashevsky
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Patent number: 12564008Abstract: A method includes attaching a carrier to a semiconductor wafer using a release film; removing the carrier from the semiconductor wafer; and performing a treatment process to remove the release film from the semiconductor wafer, the treatment process comprising: flowing an etchant through a diffusion plate within a treatment chamber, the diffusion plate comprising concentric rings separated by dividers, the concentric rings comprising a first concentric ring of holes, a second concentric ring of holes, and a third concentric ring of holes, each of the concentric rings having a different hole density; and performing a cleaning process on the semiconductor wafer.Type: GrantFiled: January 10, 2023Date of Patent: February 24, 2026Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Shiuan Wong, Chao-Wei Chiu, Wei-Yu Chen, Chih-Chiang Tsao, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 12564054Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.Type: GrantFiled: November 23, 2023Date of Patent: February 24, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong