Abstract: The present disclosure provides a method and an apparatus for testing a semiconductor device. The method includes providing an active area in an integrated circuit design layout; grouping the active area into a first region and a second region; calculating a first self-heating temperature of the first region of the active area; calculating a second self-heating temperature of the second region of the active area; and determining an Electromigration (EM) evaluation based on the first self-heating temperature and the second self-heating temperature.

Abstract: An apparatus includes a wafer stage and a particle removing assembly. The wafer stage includes a cup adjacent to a wafer chuck. The particle removing assembly is configured to remove contaminant particles from the cup. In some embodiments, the particle removing assembly comprises a flexible ejecting member that includes one or more elongated tubes, a front tip, and a cleaning tip adapter configured to attach the front tip to each of the one or more elongated tubes. The front tip includes front openings and lateral openings from which pressurized cleaning material are introduced onto an unreachable area of the cup to remove the contaminant particles from the cup.

Abstract: A stacked via structure disposed on a conductive pillar of a semiconductor die is provided. The stacked via structure includes a first dielectric layer, a first conductive via, a first redistribution wiring, a second dielectric layer, a second conductive via, and a second redistribution wiring. The first dielectric layer covers the semiconductor die. The first conductive via is embedded in the first dielectric layer and electrically connected to the conductive pillar. The first redistribution wiring covers the first conductive via and the first dielectric layer. The second dielectric layer covers the first dielectric layer and the first redistribution wiring. The second conductive via is embedded in the second dielectric layer and landed on the first redistribution wiring. The second redistribution wiring covers the second conductive via and the second dielectric layer. A lateral dimension of the first conductive via is greater than a lateral dimension of the second conductive via.

Abstract: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.

Abstract: A semiconductor package includes an interposer that has a first side and a second side opposing the first side. A semiconductor device that is on the first side of the interposer and an optical device that is on the first side of the interposer and next to the semiconductor device. A first encapsulant layer includes a first portion and a second portion. The first portion of the first encapsulant layer is on the first side of the interposer and along sidewalls of the semiconductor device. A gap is between a first sidewall of the optical device and a second sidewall of the first portion of the first encapsulant layer. A substrate is over the second side of the interposer. The semiconductor device and the optical device are electrically coupled to the substrate through the interposer.

Abstract: Methods and apparatuses for video coding are provided. A method includes signaling a first syntax element for determining whether information of one or more reference picture lists is present in a picture header (PH) associated with a picture; and signaling the information of the one or more reference picture lists in the PH in a case that the first syntax element has a first value, wherein in a case that the information of the one or more reference picture lists is signaled in the PH and one or more slices associated with the picture are determined, from the information of the one or more reference picture lists, as being not bi-predictive, one or more second syntax elements in the PH are not parsed.

Abstract: An optical lens system includes nine lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element and a ninth lens element. At least one lens surface of the seventh lens element, the eighth lens element and the ninth lens element has at least one critical point in an off-axis region thereof, and each of the seventh lens element, the eighth lens element and the ninth lens element has at least one lens surface being aspheric.

Abstract: A photographing optical lens assembly includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element has negative refractive power. The third lens element has positive refractive power. The fourth lens element has negative refractive power. The sixth lens element has an image-side surface being convex in a paraxial region thereof. The seventh lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The image-side surface of the seventh lens element has at least one critical point in an off-axis region thereof. There is an air gap in a paraxial region between all adjacent lens elements of the seven lens elements.

Abstract: Methods and apparatuses for video coding are provided. The method includes that a decoder determines whether a disable flag is present in a picture header (PH) associated with a picture, wherein the disable flag specifies whether a coding tool is disabled in one or more slices associated with the PH. Additionally, the method includes that the decoder infers value of the disable flag according to one or more enable flags signaled in a sequence parameter set (SPS) of the picture in response to determining that the disable flag is not present in the PH, inferring, by the decoder.

Abstract: A gesture recognition method includes steps of (S1) capturing a current image; (S2) determining whether the image includes a hand image; (S3) when a determination result of step S2 is satisfied, determining whether the hand image is a valid gesture; (S4) when a determination result of step S3 is satisfied, the gesture recognition unit records multiple coordinate information and time information of multiple locations corresponding to multiple fingers in a finger list, and storing the finger list in the storage unit; (S5) the gesture recognition unit obtaining an orientation of the palm; (S6) the gesture recognition unit calculating a width of the palm and a dynamic displacement threshold; (S7) the gesture recognition unit determining whether to launch an action command according to the orientation of the palm, the dynamic displacement threshold, and a determination condition; (S8) when the determination result of step S7 is satisfied, launching the action command.

Abstract: A chip package includes a semiconductor substrate, an anti-reflection layer, and a metal multi-layer. The semiconductor substrate has an optical sensing area. The anti-reflection layer is located on the semiconductor substrate. The metal multi-layer is located on and in contact with the anti-reflection layer. The metal multi-layer includes a redistribution line and two probe pads. Two ends of the redistribution line respectively extend to the two probe pads. The redistribution line is located in the optical sensing area, and the two probe pads are located outside the optical sensing area. The orthographic projection area of the redistribution line in the optical sensing area is less than 1% of the area of the optical sensing area.

Abstract: A method and system for establishing a model for sensing ions in a solution, and a method and system for sensing ions in a solution apply an ion-sensitive field effect transistor in a machine learning model for ion detection in training solutions. The method for establishing a model includes adjusting environmental parameters, where the environmental parameters are selected from any one of multiple target temperatures or from any one of multiple external electric fields; establishing at least one virtual sensor based on the biasing relationship of the multi-gate ion sensitive field effect transistor; obtaining, by the at least one virtual sensor, multiple training features of the training solution based on the environmental parameters and bias parameters; and loading, by a computer, the environmental parameters and the training features into a machine learning model to establish an ion detection model, which is used to sense the types and concentrations of ions.

Abstract: Methods and devices are provided for reducing the decoding latency introduced by LMCS. In one method, during encoding of a coding unit (CU), a plurality of reconstructed luma samples is selected from a first pre-determined region neighboring to a second pre-determined region where the CU is located, an average of the plurality of reconstructed luma samples is calculated, and the average of the plurality of reconstructed luma samples is used directly, without any clipping, in deriving a chroma residual scaling factor, a bitstream comprising luma mapping with chroma scaling (LMCS) related information is formed.

Abstract: A device includes first and second gate electrodes, a word line and a first metal island. The first gate electrode corresponds to transistors of a memory cell. The second gate electrode is separated from the first gate electrode and corresponds to the transistors. The word line is coupled to the memory cell and located between the first and the second gate electrodes. The first metal island is configured to couple a first power supply to the memory cell. A first boundary of the first metal island is located between first and second boundaries of the first gate electrode and is located between first and second boundaries of the word line, and each of the first boundary of the first gate electrode and the first boundary of the word line is located between first and second boundaries of the first metal island.

Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

Abstract: Tag-guided image positioning method includes: defining a three-dimensional space coordinate system based on tag spatial position information obtained by identifying reference image(s) of a patient's body part disposed with reference tag(s), and position/direction data related to a medical device reference point (MDC)/direction (MDD); estimating a target coordinate in system representing a position of a target point based on three-dimensional medical image of patient's body part marked with target point and reference marker(s) corresponding to position(s) of reference tag(s) and reference coordinate(s) in system representing position(s) of reference tag(s); and outputting a positioning result as a basis for whether patient's body part should be adjusted based on a judgment result indicating whether or not in system a distance between target coordinate and a device coordinate representing a position of MDC and a pointing representing MDD are respectively consistent with a predetermined distance/medical device i

Abstract: A data processing method applied in a data center is provided.

Abstract: An imaging optical lens system includes eight lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. The first lens element has positive refractive power. The second lens element has negative refractive power. The seventh lens element has an image-side surface being concave in a paraxial region thereof, and the image-side surface of the seventh lens element has at least one convex critical point in an off-axis region thereof.

Abstract: A semiconductor device, and method of fabricating the same, includes a first substrate, the first substrate including at least one visible light photosensor disposed between a first side and a second side of the first substrate, a second substrate including an infrared light photosensor disposed between a second side of the second substrate and a first side of the second substrate, and a metalens disposed between the visible light photosensor and the infrared light photosensor, the metalens configured to focus infrared light impinging on a surface of the first substrate onto the infrared light photosensor.

Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.