Abstract: A uniform pressure gang bonding device and fabrication method are presented using an expandable upper chamber with an elastic surface. Typically, the elastic surface is an elastomer material having a Young's modulus in a range of 40 to 1000 kilo-Pascal (kPA). After depositing a plurality of components overlying a substrate top surface, the substrate is positioned over the lower plate, with the top surface underlying and adjacent (in close proximity) to the elastic surface. The method creates a positive upper chamber medium pressure differential in the expandable upper chamber, causing the elastic surface to deform. For example, the positive upper chamber medium pressure differential may be in the range of 0.05 atmospheres (atm) and 10 atm. Typically, the elastic surface deforms between 0.5 millimeters (mm) and 20 mm, in response to the positive upper chamber medium pressure differential.

Abstract: Facilitating model-driven automated cell allocation in advanced networks (e.g., 5G and beyond) is provided herein. Operations of a method can comprise determining, by a system comprising a processor, a solution to an integer programming problem based on input data associated with a network inventory and configuration data for network devices of a group of network devices included in a communications network. Also, the method can comprise determining, by the system, respective cell identities and respective root sequence index assignments for the network devices. Further, the method can comprise implementing, by the system, a deployment of the respective cell identities and respective root sequence index assignments at the network devices.

Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. An exemplary semiconductor device comprises a fin disposed over a substrate, wherein the fin includes a channel region and a source/drain region; a gate structure disposed over the substrate and over the channel region of the fin; a source/drain feature epitaxially grown in the source/drain region of the fin, wherein the source/drain feature includes a top epitaxial layer and a lower epitaxial layer formed below the top epitaxial layer, and the lower epitaxial layer includes a wavy top surface; and a contact having a wavy bottom surface matingly engaged with the wavy top surface of the lower epitaxial layer of the source/drain feature.

Abstract: A catalyst includes a carbon black support and active metal particles. A surface of the carbon black support has a relative atomic percentage of oxygen atoms ranged from 2 atom % to 12 atom %. The active metal particles are distributed on the carbon black support. Each of the active metal particles includes rhodium metal and rhodium oxide. A method for manufacturing the catalyst and a method for hydrogenating an aromatic epoxy compound are also provided herein.

Abstract: A white light quantum dot light emitting diode device, including: a substrate; an anode layer formed on the substrate; a hole injection layer formed on the anode layer; a hole transport layer formed on the hole injection layer; a plurality of quantum dot layers formed on the hole injection layer, wherein the plurality of quantum dot layers includes a blue quantum dot layer, a green quantum dot layer, and a red light quantum dot layer; a plurality of isolation layers, each of the isolation layers is formed between any two of the plurality of quantum dot layers; an electron transport layer formed on the plurality of quantum dot layers; and a cathode layer formed on the electron transport layer.

Abstract: The present invention provides an organic electroluminescent diode device, a display panel, and a manufacturing method thereof. The organic electroluminescent diode device includes a first electrode layer, a conductive layer, an electron injection layer, a light-emitting layer, a hole injection layer, and a second electrode layer, and the conductive layer is provided between the first electrode layer and the electron injection layer.

Abstract: A method includes forming a metal-oxide-semiconductor field-effect transistor (MOSFET). The Method includes performing an implantation to form a pre-amorphization implantation (PAI) region adjacent to a gate electrode of the MOSFET, forming a strained capping layer over the PAI region, and performing an annealing on the strained capping layer and the PAI region to form a dislocation plane. The dislocation plane is formed as a result of the annealing, with a tilt angle of the dislocation plane being smaller than about 65 degrees.

Abstract: A method of manufacturing a structure having conductive lines is disclosed by forming a patterned catalyst material layer on a substrate; activating the patterned catalyst material layer to form an activated patterned catalyst material layer including activated catalysts; and growing a conductive layer on the activated catalysts of the activated patterned catalyst material layer. The patterned catalyst material layer is formed from a catalyst material including 40 wt % to 90 wt % of polymer and 10 wt % to 60 wt % of catalyzer. An uppermost portion of the activated patterned catalyst material layer includes the activated catalysts, and the activated catalysts include metal reduced from the catalyzer. The pattern of the conductive layer corresponds to that of the patterned catalyst material layer. The structure of the conductive line of the disclosure has the characteristics of high conductivity.

Abstract: A uniform pressure gang bonding device and fabrication method are presented using an expandable upper chamber with an elastic surface. Typically, the elastic surface is an elastomer material having a Young's modulus in a range of 40 to 1000 kilo-Pascal (kPA). After depositing a plurality of components overlying a substrate top surface, the substrate is positioned over the lower plate, with the top surface underlying and adjacent (in close proximity) to the elastic surface. The method creates a positive upper chamber medium pressure differential in the expandable upper chamber, causing the elastic surface to deform. For example, the positive upper chamber medium pressure differential may be in the range of 0.05 atmospheres (atm) and 10 atm. Typically, the elastic surface deforms between 0.5 millimeters (mm) and 20 mm, in response to the positive upper chamber medium pressure differential.

Abstract: A method and a circuit for viewing-angle image compensation applied to a flat panel display are provided. A viewing-angle image compensation scheme is applied to an input image for improving a problem of color shift caused by a large viewing angle. The method further solves the blur effect in high frequency regions and color bleeding in low saturation regions of the input image after viewing-angle image compensation. In the method, a frequency distribution of the input image is detected and decremental frequency weights are assigned to the regions having high to low frequencies. A saturation distribution of the input image is detected and incremental saturation weights are assigned to the regions having high to low saturations. The weights assigned to the regions are used to designate degrees of the viewing-angle image compensation. The method can effectively reduce the effect of the viewing-angle image compensation on the image.

Abstract: The present disclosure provides a housing assembly and a cooking appliance. The housing assembly includes a metal housing and an insulating member. The metal housing takes the shape of a disconnected ring on the whole, with a notch formed at a disconnected portion of the metal housing; the insulating member connects a disconnected end of the metal housing and covers the notch so that the housing assembly forms a closed-loop open circuit structure. According to the housing assembly provided by the present disclosure, as the metal housing is disconnected, and the disconnected portion of the metal housing is connected by the insulating member, so that the housing assembly is disconnected on the circuit, therefore, the magnetic field induction of the metal housing can be weaken to reduce the temperature rise.

Abstract: A method comprises growing an epitaxial layer on a first region of a first wafer while remaining a second region of the first wafer exposed; forming a first dielectric layer over the epitaxial layer and the second region; forming a first transistor on a second wafer; forming a second dielectric layer over the first transistor; bonding the first and second dielectric layers; and forming second and third transistors on the epitaxial layer and on the second region of the first wafer, respectively.

Abstract: A method and system is disclosed for measuring a wideband loop sensitivity SL(f) for an acoustic transducer in an acoustic probe. A pulse signal is employed as a wideband reference signal Vr(t); and, in a pulse-echo measurement a corresponding wideband echo signal Ve(t) is obtained. A normalized loop frequency response {circumflex over (X)}(f) for the acoustic transducer is defined as a ratio of a Fourier Transform of the Ve(t) to a Fourier Transform of the Vr(t). A wideband loop sensitivity SL(f) for the acoustic transducer is defined as an absolute square of the {circumflex over (X)}(f) in decibel.

Abstract: A method for fabricating a semiconductor device that includes a merged source/drain feature extending between two adjacent fin structures. An air gap is formed under the merged source/drain feature. Forming the epitaxial feature includes growing a first epitaxial feature having a first portion over the first fin structure and a second portion over the second fin structure, growing a second epitaxial feature over the first and second portions of the first epitaxial feature, and growing a third epitaxial feature over the second epitaxial feature. The second epitaxial feature includes a merged portion between the first fin structure and the second fin structure.

Abstract: The present invention discloses an injection molding control method. The injection molding control method comprises the following steps: establishing a work command according to a plurality of production process parameters; receiving a position information directly from an injection molding machine; and controlling a servo pump to drive the injection molding machine according to the position information and the work command.

Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.

Abstract: Disclosed are a composite microstructured current collector for a lithium ion battery and a fabricating method therefor. The composite microstructured current collector comprises a smooth bottom surface (9) and a top surface with a composite microstructure. The top surface comprises micro protrusions (10) and grooves (11), and the micro protrusions (10) are surrounded by the grooves (11). The micro protrusions (10) are provided with concave holes, scaly burrs, and sunken structures. The fabricating method comprises the following steps: (1) design of a cutter and pretreatment of a copper sheet; and (2) processing of a surface microstructure by plowing.

Abstract: A display device includes a backlight module, and the backlight module includes a light-guiding plate, a light-emitting assembly, and an adhesive member. The light-emitting assembly is disposed correspondingly to the light-guiding plate, and includes a substrate and a plurality of light-emitting elements. The substrate includes a component arrangement region and a planar region in a top view, and includes a base material layer, a filled layer and a protection layer in a sectional view. A thickness of the protection layer is greater than 0 ?m and less than 30 ?m. The light-emitting elements are located on the component arrangement region. The adhesive member connects the light-guiding plate and the planar region of the substrate. An assembling method of the display device is also provided. This disclosure can improve the non-uniform brightness issue (hotspots) or enhance the optical performance.

Abstract: A plasticizer, which is biodegradable, has a molecule including a central structure, at least two connecting structures and at least one side-chain structure. The central structure includes at least one of a benzene derivative and at least one amino acid. The connecting structures are respectively connected to the central structure, wherein the connecting structures include a first connecting structure and a second connecting structure. The first connecting structure is an amine group, and the second connecting structure is a carboxyl group. The side-chain structure is a chain of multiple carbon atoms, and the side-chain structure is connected to at least one of the first connecting structure and the second connecting structure. An amide bond is formed as the side-chain structure connected to the amine group, and an ester bond is formed as the side-chain structure connected to the carboxyl group.

Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. In some embodiments, the semiconductor device includes a fin extending from a substrate and a gate structure disposed over the fin. The gate structure includes a gate dielectric formed over the fin, a gate electrode formed over the gate dielectric, and a sidewall spacer formed along a sidewall of the gate electrode. In some cases, a U-shaped recess is within the fin and adjacent to the gate structure. A first source/drain layer is conformally formed on a surface of the U-shaped recess, where the first source/drain layer extends at least partially under the adjacent gate structure. A second source/drain layer is formed over the first source/drain layer. At least one of the first and second source/drain layers includes silicon arsenide (SiAs).