Patents by Inventor Wei-Chuan Chen

Wei-Chuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972537
    Abstract: A method for flattening a three-dimensional shoe upper template is provided. The method includes providing a three-dimensional last model, obtaining a three-dimensional grid model, obtaining a three-dimensional thickened grid model, obtaining a two-dimensional initial-value grid model, and obtaining a two-dimensional grid model with the smallest energy value. A system and a non-transitory computer-readable medium for performing the method are also provided. The method makes it possible to precisely flatten a three-dimensional last model with a non-developable surface and thereby convert the three-dimensional last model into a two-dimensional grid model.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: April 30, 2024
    Assignee: YU JUNG CHANG TECHNOLOGY CO., LTD.
    Inventors: Chih-Chuan Chen, Wei-Hsiang Tsai, Chin-Yu Chen, Ching-Cherng Sun, Jann-Long Chern, Yu-Kai Lin
  • Publication number: 20240134170
    Abstract: An ultra-short focus projection lens is configured to receive an image beam from an image source side and project the image beam toward a projection surface. The ultra-short focus projection lens has an optical axis. The ultra-short focus projection lens includes a reflective optical element, a first lens group, a stop, and a second lens group arranged in sequence along the optical axis. The image beam from the image source side passes through the second lens group, the stop, and the first lens group in sequence, and is reflected by the reflective optical element and projected to the projection surface. The first lens group includes a plurality of lenses having diopters. The second lens group 10 includes a plurality of lenses having diopters. The first lens group and the second lens group include ten lenses having diopters in total. A projection device is also provided.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 25, 2024
    Applicant: Coretronic Corporation
    Inventors: Wei-Ting Wu, You-Da Chen, Ching-Chuan Wei
  • Publication number: 20240088293
    Abstract: An n-type metal oxide semiconductor transistor includes a gate structure, two source/drain regions, two amorphous portions and a silicide. The gate structure is disposed on a substrate. The two source/drain regions are disposed in the substrate and respectively located at two sides of the gate structure, wherein at least one of the source/drain regions is formed with a dislocation. The two amorphous portions are respectively disposed in the two source/drain regions. The silicide is disposed on the two source/drain regions, wherein at least one portion of the silicide overlaps the two amorphous portions.
    Type: Application
    Filed: October 5, 2022
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ya Chiu, Ssu-I Fu, Chin-Hung Chen, Jin-Yan Chiou, Wei-Chuan Tsai, Yu-Hsiang Lin
  • Publication number: 20240081155
    Abstract: A semiconductor memory device includes a bottom electrode, a magnetic tunnel junction (MTJ) structure disposed over the bottom electrode, a seed layer disposed between the MTJ structure and the bottom electrode, and a non-magnetic amorphous insertion layer disposed between the seed layer and the bottom electrode.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Applicant: HeFeChip Corporation Limited
    Inventors: Young-suk Choi, Qinli Ma, Wei-Chuan Chen
  • Patent number: 11747742
    Abstract: An apparatus for removing a photoresist layer from at least one alignment mark of a wafer is provided. The apparatus includes a holder, a solvent dispenser, and a suction unit. The holder is used to support the wafer, wherein the alignment mark is formed in a peripheral region of the wafer. The solvent dispenser is used to spray a solvent onto the photoresist layer on the alignment mark of the wafer to generate a dissolved photoresist layer. The suction unit is used to remove the dissolved photoresist layer and the solvent from the wafer through exhausting.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: September 5, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Yuan-Chun Chao, Tian-Wen Liao, Wei-Chuan Chen, Yi-Chang Chang, Yu-Ming Tseng
  • Patent number: 11625111
    Abstract: A control method is provided, applied to an electronic device. The electronic device includes a screen and a knob module. The control method includes: receiving a trigger signal to enable the knob module, and displaying an operating interface corresponding to the knob module on the screen according to the trigger signal, where the operating interface includes a plurality of functional regions that is arranged annularly, and the functional regions are configured to display a plurality of function options, where one of the functional regions shows a marked state; switching the functional region corresponding to the marked state according to a first input signal from the knob module; and selecting the functional region corresponding to the marked state according to a second input signal from the knob module.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: April 11, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Mu-Chern Fong, Wei-Chuan Chen, Chi-Rong Hsu, Po-Nien Chen, Lan-Hua Huang, Wen Hui Huang, Chi-Ming Huang, Zhong Wei Hong, Siao-Yun Yang, Hsiao Fan Chen, Hsiu-Yu Kao
  • Publication number: 20230054249
    Abstract: An electronic device includes a first body, a first pivot structure, a second body, a first plate, a second plate, a third plate, a second pivot structure, and a third pivot structure. The first body includes a first region and a second region. The second body includes a third region and a fourth region. The second body is pivotally connected to the first body by the first pivot structure. The first plate is disposed corresponding to the first region. The second plate is disposed corresponding to the third region. The third plate is disposed corresponding to the fourth region. One side of the third plate is adjacent to the second plate, and the other side of the third plate is detachably coupled to the first plate. The second pivot structure connects the first body and the first plate. The third pivot structure connects the second body and the second plate.
    Type: Application
    Filed: May 13, 2022
    Publication date: February 23, 2023
    Inventors: YALIN WU, Tsung-Ju CHIANG, Wei-Chuan CHEN, Po-Nien CHEN
  • Patent number: 11538986
    Abstract: A storage layer of a magnetic tunnel junction (MTJ) element is disclosed. The storage layer having perpendicular magnetic anisotropy includes a first ferromagnetic layer, a first dust layer disposed directly on the first ferromagnetic layer, a second ferromagnetic layer disposed directly on the first dust layer, a second dust layer disposed directly on the second ferromagnetic layer, and a third ferromagnetic layer disposed directly on the second dust layer. A material of the first dust layer is different from a material of the second dust layer.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: December 27, 2022
    Assignee: HeFeChip Corporation Limited
    Inventors: Qinli Ma, Wei-Chuan Chen, Shu-Jen Han
  • Patent number: 11456411
    Abstract: A method for fabricating a magnetic tunneling junction (MTJ) element is disclosed. A substrate is provided. A reference layer is formed on the substrate. A tunnel barrier layer is formed on the reference layer. A free layer is formed on the tunnel barrier layer. A composite capping layer is formed on the free layer. The composite capping layer comprises an amorphous layer, a light-element sink layer, and/or a diffusion-stop layer. The reference layer, the tunnel barrier layer, the free layer, and the composite capping layer constitute an MTJ stack.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: September 27, 2022
    Assignee: HeFeChip Corporation Limited
    Inventors: Qinli Ma, Wei-Chuan Chen, Youngsuk Choi, Shu-Jen Han
  • Publication number: 20220229500
    Abstract: A control method is provided, applied to an electronic device. The electronic device includes a screen and a knob module. The control method includes: receiving a trigger signal to enable the knob module, and displaying an operating interface corresponding to the knob module on the screen according to the trigger signal, where the operating interface includes a plurality of functional regions that is arranged annularly, and the functional regions are configured to display a plurality of function options, where one of the functional regions shows a marked state; switching the functional region corresponding to the marked state according to a first input signal from the knob module; and selecting the functional region corresponding to the marked state according to a second input signal from the knob module.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 21, 2022
    Inventors: Mu-Chern FONG, Wei-Chuan CHEN, Chi-Rong HSU, Po-Nien CHEN, Lan-Hua HUANG, Wen Hui HUANG, Chi-Ming HUANG, Zhong Wei HONG, Siao-Yun YANG, Hsiao Fan CHEN, Hsiu-Yu KAO
  • Patent number: 11342496
    Abstract: A semiconductor memory structure includes a substrate, a magnetic tunneling junction (MTJ) stack disposed on the substrate, and an encapsulation layer surrounding the MTJ stack. The encapsulation layer comprises an outer silicon oxynitride layer with a composition of SiOx1Ny1 and an inner silicon oxynitride layer with a composition of SiOx2Ny2, wherein x1/y1>x2/y2.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: May 24, 2022
    Assignee: HeFeChip Corporation Limited
    Inventors: Hong-Hui Hsu, Wei-Chuan Chen, Qinli Ma, Shu-Jen Han
  • Publication number: 20210343930
    Abstract: A semiconductor memory structure includes a substrate, a magnetic tunneling junction (MTJ) stack disposed on the substrate, and an encapsulation layer surrounding the MTJ stack. The encapsulation layer comprises an outer silicon oxynitride layer with a composition of SiOx1Ny1 and an inner silicon oxynitride layer with a composition of SiOx2Ny2, wherein x1/y1>x2/y2.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 4, 2021
    Inventors: Hong-Hui Hsu, Wei-Chuan Chen, Qinli Ma, Shu-Jen Han
  • Publication number: 20210328135
    Abstract: A storage layer of a magnetic tunnel junction (MTJ) element is disclosed. The storage layer having perpendicular magnetic anisotropy includes a first ferromagnetic layer, a first dust layer disposed directly on the first ferromagnetic layer, a second ferromagnetic layer disposed directly on the first dust layer, a second dust layer disposed directly on the second ferromagnetic layer, and a third ferromagnetic layer disposed directly on the second dust layer. A material of the first dust layer is different from a material of the second dust layer.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 21, 2021
    Inventors: Qinli Ma, Wei-Chuan Chen, Shu-Jen Han
  • Publication number: 20210265561
    Abstract: A magnetic tunneling junction (MTJ) element includes a reference layer, a tunnel barrier layer on the reference layer, a free layer on the tunnel barrier layer, and a composite capping layer on the free layer. The composite capping layer comprises a diffusion-stop layer on the free layer, a light-element sink layer on the diffusion-stop layer, and an amorphous layer on the light-element sink layer.
    Type: Application
    Filed: May 9, 2021
    Publication date: August 26, 2021
    Inventors: Qinli Ma, Wei-Chuan Chen, Youngsuk Choi, Shu-Jen Han
  • Publication number: 20210020215
    Abstract: A magnetic tunneling junction (MTJ) element is disclosed. The MTJ element includes a reference layer, a tunnel barrier layer on the reference layer, a free layer on the tunnel barrier layer, and a composite capping layer on the free layer. The composite capping layer includes an amorphous layer, a light-element sink layer, and/or a diffusion-stop layer. The composite capping layer is in direct contact with the free layer and forms a first interface with the free layer. The composite capping layer is in direct contact with a top electrode and forms a second interface with the top electrode.
    Type: Application
    Filed: July 21, 2019
    Publication date: January 21, 2021
    Inventors: Qinli Ma, Wei-Chuan Chen, Youngsuk Choi, Shu-Jen Han
  • Publication number: 20210005809
    Abstract: A method for fabricating a magnetic tunneling junction (MTJ) element is disclosed. A substrate is provided. A reference layer is formed on the substrate. A tunnel barrier layer is formed on the reference layer. A free layer is formed on the tunnel barrier layer. A composite capping layer is formed on the free layer. The composite capping layer comprises an amorphous layer, a light-element sink layer, and/or a diffusion-stop layer. The reference layer, the tunnel barrier layer, the free layer, and the composite capping layer constitute an MTJ stack.
    Type: Application
    Filed: September 18, 2019
    Publication date: January 7, 2021
    Inventors: Qinli Ma, Wei-Chuan Chen, Youngsuk Choi, Shu-Jen Han
  • Patent number: 10869725
    Abstract: A simulated method and system for surgical instrument based on tomography are provided. The method includes obtaining a biological stereoscopic image and inputting a parameter set of an implant to be implanted, denoting a target position and an initial position in the biological stereoscopic image, estimating a dimensional coordinate of a contact area of the implant and a living organism when the implant has been implanted into the living organism based on the parameter set, the target position and the initial position in the biological stereoscopic image, and obtaining a physiological data set by re-sampling corresponding to the dimensional coordinate of the implant in the living organism for evaluating the effect after the implant has been implanted into the living organism. Surgeons may evaluate the effect after implantation of implant into the living organism by using the simulated method, enhancing the overall quality and result of the surgery.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: December 22, 2020
    Assignees: China Medical University, China Medical University Hospital
    Inventors: Yi-Wen Chen, Cheng-Ting Shih, Wei-Chuan Chen
  • Patent number: 10868238
    Abstract: Certain aspects of the present disclosure provide techniques for fabricating an integrated circuit with a magnetic tunnel junction (MTJ) without a patterning process for the MTJ. An example method generally includes depositing a first diffusion barrier layer above an oxide layer having a conductive pillar therein, forming a first trench in the first diffusion barrier layer above the conductive pillar, depositing a first electrode in the first trench such that the first electrode is coupled to the conductive pillar, removing the oxide layer and the first diffusion barrier layer to expose the conductive pillar and the first electrode, and depositing an MTJ above the first electrode according to a shape of the first electrode.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: December 15, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Xia Li, Wei-Chuan Chen, Seung Hyuk Kang
  • Patent number: 10811068
    Abstract: Varying energy barriers of magnetic tunnel junctions (MTJs) in different magneto-resistive random access memory (MRAM) arrays in a semiconductor die to facilitate use of MRAM for different memory applications is disclosed. In one aspect, energy barriers of MTJs in different MRAM arrays are varied. The energy barrier of an MTJ affects its write performance as the amount of switching current required to switch the magnetic orientation of a free layer of the MTJ is a function of its energy barrier. Thus, by varying the energy barriers of the MTJs in different MRAM arrays in a semiconductor die, different MRAM arrays may be used for different types of memory provided in the semiconductor die while still achieving distinct performance specifications. The energy barrier of an MTJ can be varied by varying the materials, heights, widths, and/or other characteristics of MTJ stacks.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: October 20, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Xia Li, Wei-Chuan Chen, Wah Nam Hsu, Seung Hyuk Kang
  • Patent number: 10740017
    Abstract: Aspects of the present disclosure relate to protecting the contents of memory in an electronic device, and in particular to systems and methods for transferring data between memories of an electronic device in the presence of strong magnetic fields. In one embodiment, a method of protecting data in a memory in an electronic device includes storing data in a first memory in the electronic device; determining, via a magnetic sensor, a strength of an ambient magnetic field; comparing the strength of the ambient magnetic field to a threshold; transferring the data in the first memory to a second memory in the electronic device upon determining that the strength of the ambient magnetic field exceeds the threshold; and transferring the data from the second memory to the first memory upon determining that the strength of the ambient magnetic field no longer exceeds the threshold.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: August 11, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Chando Park, Wei-Chuan Chen, Sungryul Kim, Adam Edward Newham, Seung Hyuk Kang, Rashid Ahmed Akbar Attar