Patents by Inventor Weihua Tang
Weihua Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11574851Abstract: An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.Type: GrantFiled: February 27, 2019Date of Patent: February 7, 2023Assignee: Intel CorporationInventors: Aastha Uppal, Omkar Karhade, Ram Viswanath, Je-Young Chang, Weihua Tang, Nitin Deshpande, Mitul Modi, Edvin Cetegen, Sanka Ganesan, Yiqun Bai, Jan Krajniak, Kumar Singh
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Publication number: 20220384306Abstract: A thermal interface structure for facilitating heat transfer from an integrated circuit device to a heat dissipation device may be fabricated to include at least one conductive wire structure wherein each conductive wire structure includes a conductive wire having a first end, a first barrier layer adjacent the first end of the conductive wire, and a first solder structure adjacent the first barrier layer. The thermal interface structure may further include an encapsulation material substantially encapsulating each conductive wire structure and a first solder layer abutting the encapsulation material and abutting the first solder structure of each conductive wire structure.Type: ApplicationFiled: May 26, 2021Publication date: December 1, 2022Applicant: Intel CorporationInventors: Weihua Tang, Chandra Mohan Jha, Nicholas S. Haehn
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Patent number: 11444003Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).Type: GrantFiled: September 27, 2018Date of Patent: September 13, 2022Assignee: Intel CorporationInventors: Zhimin Wan, Chia-Pin Chiu, Chandra Mohan Jha, Weihua Tang, Shankar Devasenathipathy
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Patent number: 11398414Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.Type: GrantFiled: September 26, 2018Date of Patent: July 26, 2022Assignee: Intel CorporationInventors: Zhimin Wan, Chia-Pin Chiu, Pooya Tadayon, Joe F. Walczyk, Chandra Mohan Jha, Weihua Tang, Shrenik Kothari, Shankar Devasenathipathy
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Patent number: 11374605Abstract: A wireless data communication radio includes a first transceiver configured to be coupled to a first antenna, and a second transceiver configured to be coupled to a second antenna. The second transceiver includes a multi-path detector. The wireless data communication radio transmits a radio signal via the first transceiver, receives the radio signal at the second transceiver, and determines, by the multi-path detector, that the radio signal, as received by the second transceiver, was transmitted by the first antenna and received by second antenna.Type: GrantFiled: April 19, 2021Date of Patent: June 28, 2022Assignee: NXP USA, Inc.Inventor: Weihua Tang
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Publication number: 20210398966Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a plurality of dies, a logic die coupled to the plurality of dies, and a dummy die thereon. In selected examples, the dummy die is located between the logic die and the plurality of silicon dies. In selected examples, the dummy die is attached to the logic die.Type: ApplicationFiled: August 31, 2021Publication date: December 23, 2021Inventors: Robert L. Sankman, Pooya Tadayon, Weihua Tang, Chandra M. Jha, Zhimin Wan
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Publication number: 20210391244Abstract: Embodiments disclosed herein comprise a die and methods of forming a die. In an embodiment, a die comprises, a die substrate, wherein the die substrate has a first thermal conductivity, and a first layer over the die substrate, wherein the first layer has a second thermal conductivity that is greater than the first thermal conductivity. In an embodiment, the die further comprises a second layer over the first layer, wherein the second layer comprises transistors.Type: ApplicationFiled: June 10, 2020Publication date: December 16, 2021Inventors: Chandra Mohan JHA, Pooya TADAYON, Aastha UPPAL, Weihua TANG, Paul DIGLIO, Xavier BRUN
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Patent number: 11127727Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a plurality of dies, a logic die coupled to the plurality of dies, and a dummy die thereon. In selected examples, the dummy die is located between the logic die and the plurality of silicon dies. In selected examples, the dummy die is attached to the logic die.Type: GrantFiled: June 6, 2019Date of Patent: September 21, 2021Assignee: Intel CorporationInventors: Robert L. Sankman, Pooya Tadayon, Weihua Tang, Chandra M. Jha, Zhimin Wan
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Publication number: 20210249375Abstract: An integrated circuit (IC) die structure comprises a substrate material comprising silicon. Integrated circuitry is over a first side of the substrate material. A composite layer is in direct contact with a second side of the substrate material. The second side is opposite the first side. The composite layer comprises a first constituent material associated with a first linear coefficient of thermal expansion (CTE), and a first thermal conductivity exceeding that of the substrate. The composite layer also comprises a second constituent material associated with a second CTE that is lower than the first, and a second thermal conductivity exceeding that of the substrate.Type: ApplicationFiled: February 7, 2020Publication date: August 12, 2021Applicant: INTEL CORPORATIONInventors: Feras Eid, Joe Walczyk, Weihua Tang, Akhilesh Rallabandi, Marco Aurelio Cartas Ayala
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Publication number: 20200388603Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a plurality of dies, a logic die coupled to the plurality of dies, and a dummy die thereon. In selected examples, the dummy die is located between the logic die and the plurality of silicon dies. In selected examples, the dummy die is attached to the logic die.Type: ApplicationFiled: June 6, 2019Publication date: December 10, 2020Inventors: Robert L. Sankman, Pooya Tadayon, Weihua Tang, Chandra M. Jha, Zhimin Wan
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Publication number: 20200294884Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.Type: ApplicationFiled: March 15, 2019Publication date: September 17, 2020Applicant: Intel CorporationInventors: Javed Shaikh, Je-Young Chang, Kelly Lofgreen, Weihua Tang, Aastha Uppal
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Publication number: 20200273772Abstract: An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: February 27, 2019Publication date: August 27, 2020Applicant: Intel CorporationInventors: Aastha Uppal, Omkar Karhade, Ram Viswanath, Je-Young Chang, Weihua Tang, Nitin Deshpande, Mitul Modi, Edvin Cetegen, Sanka Ganesan, Yiqun Bai, Jan Krajniak, Kumar Singh
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Publication number: 20200219790Abstract: An integrated circuit assembly may be formed using a phase change material as an electromagnetic shield and as a heat dissipation mechanism for the integrated circuit assembly. In one embodiment, the integrated circuit assembly may comprise an integrated circuit package including a first substrate having a first surface and an opposing second surface, and at least one integrated circuit device having a first surface and an opposing second surface, wherein the at least one integrated circuit device is electrically attached by the first surface thereof to the first surface of the first substrate; and a phase change material formed on the integrated circuit package.Type: ApplicationFiled: January 7, 2019Publication date: July 9, 2020Applicant: INTEL CORPORATIONInventors: Aastha Uppal, Je-Young Chang, Weihua Tang, Minseok Ha
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Publication number: 20200219789Abstract: An integrated circuit structure may be formed using a phase change material to substantially fill at least one chamber within the integrated circuit assembly to increase thermal capacitance. The integrated circuit assembly may comprise a substrate, at least one integrated circuit device electrically attached to the substrate, a heat dissipation device, a thermal interface material between the integrated circuit device and the heat dissipation device, a chamber defined by the heat dissipation device, the substrate, and the integrated circuit device, and a phase change material within the chamber.Type: ApplicationFiled: January 7, 2019Publication date: July 9, 2020Applicant: Intel CorporationInventors: Aastha Uppal, Je-Young Chang, Javed Shaikh, Divya Mani, Weihua Tang
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Publication number: 20200111720Abstract: An Integrated Circuit (IC) device structure is provided. The IC device structure includes a first substrate, first one or more dies coupled to a first side of the first substrate by a first plurality of interconnect structures, second one or more dies coupled to a first section of a second side of the substrate by a second plurality of interconnect structures, and a third plurality of interconnect structures to couple a second section of the second side of the substrate to a second substrate. In an example, at least a part of the second one or more dies are within a cavity in the second substrate.Type: ApplicationFiled: October 5, 2018Publication date: April 9, 2020Inventors: Zhimin Wan, Shankar Devasenathipathy, Chia-Pin Chiu, Chandra Mohan Jha, Weihua Tang
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Publication number: 20200105643Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Applicant: INTEL CORPORATIONInventors: ZHIMIN WAN, CHIA-PIN CHIU, CHANDRA MOHAN JHA, WEIHUA TANG, SHANKAR DEVASENATHIPATHY
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Publication number: 20200105639Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.Type: ApplicationFiled: October 2, 2018Publication date: April 2, 2020Applicant: Intel CorporationInventors: Krishna Vasanth Valavala, Ravindranath Mahajan, Chandra Mohan Jha, Kelly Lofgreen, Weihua Tang
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Publication number: 20200098666Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.Type: ApplicationFiled: September 26, 2018Publication date: March 26, 2020Applicant: INTEL CORPORATIONInventors: ZHIMIN WAN, CHIA-PIN CHIU, POOYA TADAYON, JOE F. WALCZYK, CHANDRA MOHAN JHA, WEIHUA TANG, SHRENIK KOTHARI, SHANKAR DEVASENATHIPATHY
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Patent number: 9608844Abstract: Embodiments of systems and methods for performing channel estimation on Orthogonal frequency-division multiplexing (OFDM) signals are described. In one embodiment, a method for performing channel estimation on an OFDM signal involves performing blind channel phase estimation on an OFDM signal to obtain channel phase information and performing blind channel magnitude estimation on the OFDM signal to obtain channel magnitude information. Each of performing blind channel phase estimation on the OFDM signal and performing blind channel magnitude estimation on the OFDM signal involves detecting and suppressing a signal path of the OFDM signal. Other embodiments are also described.Type: GrantFiled: May 27, 2014Date of Patent: March 28, 2017Assignee: NXP B.V.Inventors: Weihua Tang, Semih Serbetli
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Publication number: 20160377658Abstract: Improved fluid flow is described for a temperature control actuator that is used in semiconductor device test. In one example, the apparatus includes a top plate configured to thermally connect to a semiconductor device under test, a channel plate thermally connected to the top plate and having a plurality of fluid channels to receive a thermally controlled fluid from an inlet to exchange heat with the thermally controlled fluid in the channel and to eliminate the thermally controlled fluid to an outlet, a manifold to provide the thermally controlled fluid to the inlet and to receive the thermally controlled fluid through the outlet, and a flow guide in the channel thermally connected to the top plate.Type: ApplicationFiled: June 24, 2015Publication date: December 29, 2016Applicant: INTEL CORPORATIONInventors: Paul J. DIGLIO, John C. JOHNSON, Weihua TANG