Abstract: The present application provides a food thermometer system capable of clearing cache data, comprising a main control device and a probe. The probe is detachably connected to the main control device. When the probe is electrically connected to the main control device, the main control device charges the probe. When the electrical connection is disconnected, a power-on restart of the probe is triggered, and at least a portion of stored first cache data is cleared. Each time the probe is removed, the system triggers a power-on restart and initialization of a control module of the probe, automatically clears temporary temperature data in a memory, avoids memory exhaustion, and significantly extends the service life of the product.

Abstract: A processor is provided. The processor includes a first register, a decoder, and an execution unit. The first register is configured to store a first approximation-number evaluation threshold. The decoder is configured to decode an approximation-number instruction to obtain an operator, a first operand, and a second operand. The execution unit is configured to compare the first operand with the first approximation-number evaluation threshold to obtain a first comparison result. The execution unit is configured to compare the second operand with the first approximation-number evaluation threshold to obtain a second comparison result. Based on the first comparison result and the second comparison result, the execution unit is configured to selectively output the first operand, the second operand, or a computation result. The computation result is obtained by the execution unit performing an operation that corresponds to the operator on the first operand and the second operand.

Abstract: A method for managing micro-operations is provided. The method includes determining whether a translation buffer and a micro-operation cache store a micro-operation corresponding to a translation instruction using a processing unit, when the processing unit executes the translation instruction. The method includes outputting a certain micro-operation to enter a system management mode using the processing unit, when the translation buffer and the micro-operation cache don’t store the micro-operation corresponding to the translation instruction. The method includes translating the translation instruction into the micro-operation corresponding to the translation instruction in the system management mode using the processing unit. The method includes storing the micro-operation corresponding to the translation instruction into the micro-operation cache using the processing unit.

Abstract: An instruction conversion method is provided. The instruction conversion method includes: determining whether a ready-for-execution instruction is an extended instruction, wherein the extended instruction is not a supported instruction of the current processor, but belongs to a new instruction set or an extended instruction set of a same ISA as an instruction set of the current processor; and sending a format information of the extended instruction to a conversion system, and then returning a converted instruction sequence from the conversion system to the processor for executions if the ready-for-execution instruction is the extended instruction.

Abstract: A battery pack detection connection apparatus includes: a communication module used for communicating with a vehicle communication interface and a battery pack; a microcontroller unit used for extracting change features of an externally inputted signal, performing signal feature reconstruction on the extracted change features of the signal, and transmitting the reconstructed signal features to a function generator or signal module; at least one function generator used for outputting, according to the reconstructed signal features, a first-type waveform signal exchanged between a vehicle and the battery pack; and the signal module used for outputting, according to the reconstructed signal features, a second-type waveform signal exchanged between the vehicle and the battery pack. The present apparatus uses the function generator and the signal module to achieve signals required by the battery pack for interaction. The same hardware can be used to match different brands of vehicle models.

Abstract: A method for executing target instructions and being used in a processor includes the steps of: receiving an instruction; determining whether the received instruction is a target instruction according to an operation code of the received instruction; when the received instruction is not the target instruction, executing the received instruction in a first mode; and when the received instruction is the target instruction, simulating the execution of the target instruction according to basic decoding information of the target instruction in a second mode. The basic decoding information includes the operation code, and is stored in an internal register.

Abstract: Live objects in heap memory exceeding a threshold size and that have not been recently accessed are compressed or offloaded to secondary memory or storage. Compressing or offloading an object can further be based on how old the object is, which can be determined based on how many garbage collections the object has survived. Objects comprising references to other objects can be split into two sub-objects, one containing value fields that is compressed or offloaded and one containing reference fields that remains uncompressed in heap memory. Heap memory can undergo compaction after objects are compressed or offloaded. Compression accelerators can be used for compression and the decision of whether to compress or offload an object can be based on accelerator throughput, latency, availability, as well as other computing system metrics or characteristics. The compressing and offloading of objects and subsequent compaction can make more heap memory available for object allocation.

Abstract: The embodiments of the present invention relate to the technical field of vehicle maintenance and repair, and in particular to a vehicle bus topological graph display method and apparatus, and a device. In the method, display priorities are set for vehicle buses of various types, display weights of different display areas of a display interface are acquired, and the buses with different display priorities are displayed in different display areas, such that a user can conveniently view the buses, and the ease of use by the user is improved.

Abstract: An instruction conversion system including a processor is provided. The processor receives a ready-for-execution instruction from an application program. The processor decodes the ready-for-execution instruction, and determines that the ready-for-execution instruction is an extended instruction. The processor sends the information of the ready-for-execution instruction to an external conversion system. The conversion system converts the ready-for-execution instruction into a converted instruction sequence, and then sends the converted instruction sequence to the processor for executions.

Abstract: Methods and systems are provided for use in evaluating quality of pollen grains. One example method includes germinating pollen grains of a crop in a fluid media and inserting a sample of the germinated pollen grains and fluid media into a flow chamber of a fluid imaging system. The sample flows through the flow chamber at a predefined rate, and images of the sample are captured by a camera of the fluid imaging system. The method then includes comparing the captured images of the sample to reference images specific to the crop and, based on the comparison, generating a pollen germination score for the sample, the pollen germination score indicative of germinated pollen grains in the sample.

Abstract: A computer system with a processor having an encryption and decryption engine is shown. The encryption and decryption engine includes a key table, which is provided for encryption and decryption of the system memory. In response to a platform setting instruction, the processor reads a key identification code from a key identification code register, and reads control parameters from a control parameter register. Based on the control parameters, the processor manages a key, associated with the key identification code, in the key table.

Abstract: A computer system with data encryption and decryption on system memory is shown. The computer system has a system memory storing data, and a processor coupled to the system memory. The processor has key registers storing multiple keys. Based on the access address on the system memory, the processor selects a target key from the key registers, to apply the target key to perform data encryption and decryption on the system memory.

Abstract: A computer-implemented method for generating an improved map of field anomalies using digital images and machine learning models is disclosed.

Abstract: A battery discharging circuit includes a resistor configuration branch, a current sampling branch, a switch branch, a signal amplification branch and a controller. The resistor configuration branch is connected between a battery and the switch branch, the resistor configuration branch is connected with the controller. The current sampling branch is connected between the battery and the switch branch, and the current sampling branch outputs a sampling signal. The controller is connected with the signal amplification branch, and the controller outputs a voltage signal corresponding to a target discharging current of the battery. The signal amplification branch is connected between the switch branch and the switch branch, and the signal amplification branch outputs a regulation signal based on the sampling signal and the voltage signal. The switch branch regulates a turn-on degree of the switch branch based on a regulation signal. The battery is discharged through the switch branch.

Abstract: Embodiments of the present invention relate to the technical field of vehicle detection, and disclose an automatic construction method and apparatus for an automobile bus topology map. The method includes; acquiring automobile bus data and electronic control unit data; performing bus layout according to the automobile bus data and the electronic control unit data, and constructing an automobile bus topology map framework; and performing layout on an electronic control unit according to the automobile bus topology map framework to generate an automobile bus topology map. By means of the method, personalized bus layout can be supported, a complex bus relationship can be supported, more vehicle model coverage can be supported while the accuracy of the topology map is maintained, and the development difficulty of diagnostic tools can be reduced.

Abstract: A brake disc wear degree measuring method comprises: obtaining a brake disc image comprising a laser pattern (110); extracting the laser pattern from the brake disc image, and generating a projection depth point cloud map according to the extracted laser pattern (120); identifying the projection depth point cloud map by means of a point cloud map identification model to obtain a matching sample, and determining a measurement feature of the matching sample as a measurement feature of the projection depth point cloud map (130); determining a position of a reference point in the projection depth point cloud map according to the measurement feature (140); determining a position of a measurement point in the projection depth point cloud map according to the measurement feature (150); and determining, according to the position of the reference point and the position of the measurement point, a difference value of the laser projection depths of the reference point and the measurement point, wherein the difference va

Abstract: The present invention relates to a method for a processor and a computer system to enter system management mode (SMM). The method is applied to the processor, which includes at least one logical core. The method includes entering the SMM in response to a system management interrupt (SMI), storing current state information to a corresponding state save area; setting operation mode to target operating mode, and executing the SMI handler under the target operating mode. The address of the state save area, the address of the core configuration information memory space, and the address of the SMI handler can be determined directly. Each logical core may enter the target operating mode directly through hardware setting every time after entering the SMM, and thus does not need to perform a fixed operation of mode switching when executing the SMI handler, which may improve the execution efficiency of the SMI handler.

Abstract: The embodiments of the present invention relate to the field of vehicle diagnosis technologies, and specifically disclose a communication method and apparatus, and a related device.

Abstract: The present invention provides a double-crosslinked fibrin gel, which is a solid hydrogel composed of a network structure with a blocking function and a network structure with an adhesion function, where the network structure with the blocking function is a three-dimensional fibrin network, and the network structure with the adhesion function is a three-dimensional photosensitive gel network; each channel of the photosensitive gel network has a group of the fibrin network inside, and each group of the fibrin network has overall continuity; on the whole, the three-dimensional fibrin network disperses disorderly throughout a surface and an interior of the solid hydrogel. The present invention further provides a raw material composition, a kit for preparing the double-crosslinked fibrin gel, and an application of the kit to prepare an in-situ rapid clotting and hemostatic material.

Abstract: The present invention relates to a method for a processor and a computer system to enter system management mode (SMM). The method is applied to the processor, which includes at least one logical core. The method includes entering the SMM in response to a system management interrupt (SMI), storing current state information to a corresponding state save area; setting operation mode to target operating mode, and executing the SMI handler under the target operating mode. The address of the state save area, the address of the core configuration information memory space, and the address of the SMI handler can be determined directly. Each logical core may enter the target operating mode directly through hardware setting every time after entering the SMM, and thus does not need to perform a fixed operation of mode switching when executing the SMI handler, which may improve the execution efficiency of the SMI handler.