Abstract: A method for compressing images based on joint photographic experts group (JPEG) standard includes: compressing data of one or more first image blocks with a first compression level to produce compression data of the one or more first image blocks; adjusting the first compression level to obtain a second compression level according to at least one of a data size-related index regarding the compression data of the one or more first image blocks or a transmission-related index regarding transmission of the compression data of the one or more first image blocks; and compressing data of a second image block with the second compression level.

Abstract: The present invention provides an encoder including a quantization circuit, a control circuit and an encoding circuit is disclosed. The quantization circuit is configured to generate quantized data corresponding to a CTU according to image data, wherein the CTU comprises at least one TU. The control circuit is configured to determine a number of allocated bits for each TU in the CTU, where the number of allocated bits for each TU is determined based on a sum of remaining bits of the TUs that have been encoded. The encoding circuit is configured to encode each TU to obtain encoded data according to the number of allocated bits of the TU in the CTU.

Abstract: An electrostatic chuck including a clamping layer having a first clamping electrode and a second clamping electrode is disclosed. A first clamping electrode defining a first clamping zone and a second clamping zone is provided. The first clamping zone and the second clamping zone are separated by a first gap and are electrically connected by at least one electrical connection extending across the first gap. A second clamping electrode disposed radially outward from the first clamping electrode. The second clamping electrode defining a third clamping zone and a fourth clamping zone that are separated by a second gap. The third clamping zone and the fourth clamping zone are electrically connected by at least one electrical connection extending across the second gap. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: An electrostatic chuck including a clamping layer having a first clamping electrode and a second clamping electrode is disclosed. A first clamping electrode defining a first clamping zone and a second clamping zone is provided. The first clamping zone and the second clamping zone are separated by a first gap and are electrically connected by at least one electrical connection extending across the first gap. A second clamping electrode disposed radially outward from the first clamping electrode. The second clamping electrode defining a third clamping zone and a fourth clamping zone that are separated by a second gap. The third clamping zone and the fourth clamping zone are electrically connected by at least one electrical connection extending across the second gap. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: The present invention provides an encoder including a quantization circuit, an encoding circuit, an energy parameter calculation circuit and a quantization parameter determination circuit. The quantization circuit is configured to perform quantization operations on a plurality of CTUs in image data in sequence to generate quantized data respectively corresponding to the plurality of CTUs. The encoding circuit is configured to perform encoding operations on the quantized data of the plurality of CTUs in sequence to generate encoded data. The energy parameter calculation circuit is configured to receive the image data, and calculate a plurality of energy parameters respectively corresponding to the plurality of CTUs in the image data. The quantization parameter determination circuit is configured to determine a plurality of quantization parameters of the plurality of CTUs according to at least a portion of the plurality of energy parameters, for the quantization circuit to perform the quantization operations.

Abstract: The present invention provides an encoder including a quantization circuit, a control circuit and an encoding circuit is disclosed. The quantization circuit is configured to generate quantized data corresponding to a CTU according to image data, wherein the CTU comprises at least one TU. The control circuit is configured to determine a number of allocated bits for each TU in the CTU, where the number of allocated bits for each TU is determined based on a sum of remaining bits of the TUs that have been encoded. The encoding circuit is configured to encode each TU to obtain encoded data according to the number of allocated bits of the TU in the CTU.

Abstract: The present invention provides an encoder including a quantization circuit, an encoding circuit, an energy parameter calculation circuit and a quantization parameter determination circuit. The quantization circuit is configured to perform quantization operations on a plurality of CTUs in image data in sequence to generate quantized data respectively corresponding to the plurality of CTUs. The encoding circuit is configured to perform encoding operations on the quantized data of the plurality of CTUs in sequence to generate encoded data. The energy parameter calculation circuit is configured to receive the image data, and calculate a plurality of energy parameters respectively corresponding to the plurality of CTUs in the image data. The quantization parameter determination circuit is configured to determine a plurality of quantization parameters of the plurality of CTUs according to at least a portion of the plurality of energy parameters, for the quantization circuit to perform the quantization operations.

Abstract: An electrostatic chuck including a clamping layer having a first clamping electrode and a second clamping electrode is disclosed. A first clamping electrode defining a first clamping zone and a second clamping zone is provided. The first clamping zone and the second clamping zone are separated by a first gap and are electrically connected by at least one electrical connection extending across the first gap. A second clamping electrode disposed radially outward from the first clamping electrode. The second clamping electrode defining a third clamping zone and a fourth clamping zone that are separated by a second gap. The third clamping zone and the fourth clamping zone are electrically connected by at least one electrical connection extending across the second gap. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: An electrostatic chuck including a clamping layer having a first clamping electrode and a second clamping electrode is disclosed. A first clamping electrode defining a first clamping zone and a second clamping zone is provided. The first clamping zone and the second clamping zone are separated by a first gap and are electrically connected by at least one electrical connection extending across the first gap. A second clamping electrode disposed radially outward from the first clamping electrode. The second clamping electrode defining a third clamping zone and a fourth clamping zone that are separated by a second gap. The third clamping zone and the fourth clamping zone are electrically connected by at least one electrical connection extending across the second gap. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: A method for compressing images based on joint photographic experts group (JPEG) standard includes: compressing data of one or more first image blocks with a first compression level to produce compression data of the one or more first image blocks; adjusting the first compression level to obtain a second compression level according to at least one of a data size-related index regarding the compression data of the one or more first image blocks or a transmission-related index regarding transmission of the compression data of the one or more first image blocks; and compressing data of a second image block with the second compression level.

Abstract: A loop filter utilized in an encoder includes a constrained directional enhancement filter and a decision circuit. The constrained directional enhancement filter is arranged to process multiple frames, wherein for a first frame in the multiple frames, the constrained directional enhancement filter determines a best filter strength of each block in the first frame in a first filter strength list, and determines a second filter strength list according to content of the first frame. The decision circuit is coupled to the constrained directional enhancement filter, and is arranged to record which index in the first filter strength list is the best filter strength corresponding to each block in the first frame, and provide the first filter strength list and the index corresponding to each block to an encoding circuit of the encoder as an output of the encoder.

Abstract: A prediction circuit in an encoder utilizes a specific partition mode to process a super block for generating a plurality of reconstructed pixel values for each block in the super block, and the reconstructed pixel values of each block are directly utilized as reference pixels for other blocks to perform intra-frame prediction, so as to improve the efficiency of the encoder.

Abstract: A loop filter utilized in an encoder includes a constrained directional enhancement filter and a decision circuit. The constrained directional enhancement filter is arranged to process multiple frames, wherein for a first frame in the multiple frames, the constrained directional enhancement filter determines a best filter strength of each block in the first frame in a first filter strength list, and determines a second filter strength list according to content of the first frame. The decision circuit is coupled to the constrained directional enhancement filter, and is arranged to record which index in the first filter strength list is the best filter strength corresponding to each block in the first frame, and provide the first filter strength list and the index corresponding to each block to an encoding circuit of the encoder as an output of the encoder.

Abstract: An electrostatic chuck including a clamping layer having a first clamping electrode and a second clamping electrode is disclosed. A first clamping electrode defining a first clamping zone and a second clamping zone is provided. The first clamping zone and the second clamping zone are separated by a first gap and are electrically connected by at least one electrical connection extending across the first gap. A second clamping electrode disposed radially outward from the first clamping electrode. The second clamping electrode defining a third clamping zone and a fourth clamping zone that are separated by a second gap. The third clamping zone and the fourth clamping zone are electrically connected by at least one electrical connection extending across the second gap. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.

Abstract: A plasma processing apparatus including a processing chamber having one or more sidewalls and a dome is provided. The plasma processing apparatus includes a workpiece support disposed in the processing chamber configured to support a workpiece during processing, an induction coil assembly for producing a plasma in the processing chamber, a Faraday shield disposed between the induction coil assembly and the dome, the Faraday shield comprising an inner portion and an outer portion, and a thermal management system. The thermal management system including one or more heating elements configured to heat the dome, and one or more thermal pads disposed between an outer surface of the dome and the heating elements, wherein the one or more thermal pads are configured to facilitate heat transfer between the one or more heating elements and the dome. Thermal management systems and methods for processing workpieces are also provided.

Abstract: An encoder includes a frame level processing circuit, a coding tree unit (CTU) level processing circuit and an encoding circuit. The frame level processing circuit is arranged to calculate a bit number of a current frame according a target bitrate and a frame rate, and the frame level processing circuit is further arranged to calculate a quantization parameter of the current frame according to the bit number of the current frame and at least one parameter. The CTU level processing circuit is arranged to use an adaptive quantization mode to adjust the quantization parameter to generate an adjusted quantization parameter. The encoding circuit is arranged to encode the current frame to generate output data according to the adjusted quantization parameter.

Abstract: The present application provides a method for storing an image frame in a memory, including: receiving the image frame; dividing the image frame into M rows of data block rows along a first direction; dividing each of the M rows of data block rows into N data blocks along a second direction perpendicular to the first direction; performing a compression operation upon each of the M*N data blocks individually to generate M*N compressed data blocks; and storing N compressed data blocks corresponding to the 1st data block row of the M data block rows and N compressed data blocks corresponding to the (P+1)th data block row of the M data block rows in a continuous storage space in the memory, wherein M, N, and P are integers, and M>1, N>0 and P<M.

Abstract: A guide plate for spine surgery incl odes a guide plate body. The guide plate body includes a medial surface matching the back surface of surgical segment centrum. The guide plate body is provided with a guide hole. The outer surface of guide block is conical, the guide plate body is provided with a drill hole corresponding to the guide block. The drill hole matches the outer surface of front end of guide block, the guide block is embedded in the drill hole.

Abstract: An encoder includes a frame level processing circuit, a coding tree unit (CTU) level processing circuit and an encoding circuit. The frame level processing circuit is arranged to calculate a bit number of a current frame according a target bitrate and a frame rate, and the frame level processing circuit is further arranged to calculate a quantization parameter of the current frame according to the bit number of the current frame and at least one parameter. The CTU level processing circuit is arranged to use an adaptive quantization mode to adjust the quantization parameter to generate an adjusted quantization parameter. The encoding circuit is arranged to encode the current frame to generate output data according to the adjusted quantization parameter.

Abstract: A gas injection assembly for injecting gas into a processing chamber is provided. In some examples, the gas injection assembly can include an inlet for receiving a gas flow. The gas injection assembly can include a plurality of gas feed ports for distributing the gas flow received from the inlet. The gas injection assembly can include a plurality of subchannels vertically arranged inside of the gas injection assembly, including: an upper subchannel for receiving the gas flow from the inlet and subdividing the gas flow into a set of orifices to form a first gas flow branch and a second gas flow branch, the first gas flow branch corresponding to a first portion of the gas flow passing through a first subset of the set of orifices and the second gas flow branch corresponding to a second portion of the gas flow passing through a second subset of the set of orifices; and a plurality of outlet subchannels for subdividing the gas flow into the plurality of gas feed ports.