Abstract: The present disclosure provides a method and an apparatus for testing a semiconductor device. The method includes providing an active area in an integrated circuit design layout; grouping the active area into a first region and a second region; calculating a first self-heating temperature of the first region of the active area; calculating a second self-heating temperature of the second region of the active area; and determining an Electromigration (EM) evaluation based on the first self-heating temperature and the second self-heating temperature.

Abstract: A conjugate cam reducer includes input and output units disposed at two opposite sides of a transmission unit along an output axis. The transmission unit includes input-side and output-side cam discs having first and second grooved surfaces. The input unit includes an input disc having a plurality of first receiving grooves registered with the first grooved surfaces to receive input rollers, and an eccentric shaft rotated to drive rotation of the transmission unit in an eccentric cam motion. The output unit includes an output disc having an inner peripheral wall which engages with the output-side cam disc, and a plurality of second receiving grooves which are registered with the second grooves to receive output rollers. An outer diameter of each first toothed surface and an outer diameter of each second toothed surface is gradually increased along a direction parallel to the output axis.

Abstract: The present disclosure provides a method and an apparatus for testing a semiconductor device. The method includes providing an active area in an integrated circuit design layout; grouping the active area into a plurality of regions, each of the regions including at least one polysilicon gate; calculating an operating temperature of the at least one polysilicon gate in each of the regions; calculating a self-heating temperature of each of the regions based on the operating temperature of the at least one polysilicon gate in each of the regions; determining an Electromigration (EM) evaluation based on the self-heating temperatures of the regions; and generating a semiconductor device based on the integrated circuit design layout passing the EM evaluation, wherein one of the regions includes a number of polysilicon gates disposed thereon different from the number of polysilicon gates disposed on the rest of regions.

Abstract: A system including computer readable storage media including executable instructions and one or more processors configured to execute the executable instructions to obtain a schematic netlist and a performance specification for an integrated circuit, determine electrical constraints for nets in the schematic netlist based on the performance specification, determine physical constraints from the electrical constraints, rout the nets in the schematic netlist based on the electrical constraints and the physical constraints, and provide a data file of a layout.

Abstract: A pressure generating device includes a tank, a deformable membrane, a driving device, and an actuating arm. The tank defines a chamber therein, and includes an opening and a communication port each of which is in fluid communication with the chamber. The deformable membrane is disposed to seal the opening, and is deformable between a flat state and a deformed state. The actuating arm is coupled to be driven by the driving device to move between a first position, where the deformable membrane is in the flat state, and a second position, where the deformable membrane is forced to be in the deformed state, such that a predetermined negative pressure is generated through the communication port when the actuating arm is driven from one of the first and second positions to the other one of the first and second positions.

Abstract: The disclosure relates to methods for determining an endometrial status using a sample, for example, an endometrial biopsy, from a woman, comprising: (a) performing an assay on the endometrial sample from the woman to determine a microRNA (miRNA) expression profile of the endometrial sample, wherein the miRNA expression profile comprises expression levels of a plurality of miRNAs, for example, 167 miRNAs having the sequences of SEQ ID NOs:1-167, respectively; and (b) analyzing the miRNA expression profile to obtain a receptivity predictive score using, for example, a computer-based algorithm. Aspects of the disclosure further relate to kits suitable for performing the methods, as well as uses of the kits for diagnostic and therapeutic purposes.

Abstract: A system including computer readable storage media including executable instructions and one or more processors configured to execute the executable instructions to obtain a schematic netlist and a performance specification for an integrated circuit, determine electrical constraints for nets in the schematic netlist based on the performance specification, determine physical constraints from the electrical constraints, rout the nets in the schematic netlist based on the electrical constraints and the physical constraints, and provide a data file of a layout.

Abstract: The present disclosure generally relates to systems and methods for evaluating viability of oocytes. In some implementation examples, an image sequence associated with an oocyte being aspirated into a pressure tool is obtained. Based on the image sequence and pressures applied on the oocyte, morphological features and mechanical features associated with the oocyte can be derived. At least some of the features can then be fed into a machine learning model to determine metrics indicative of quality of the oocyte, where a particular metric may be indicative of blastocyst formation. Optionally, the determined oocyte quality information can be presented to a user via an interactive user interface.

Abstract: The present disclosure provides a method and a non-transitory computer-readable medium for arranging components within a semiconductor device. The method includes providing a plurality of electrical components in a pre-layout, generating a first layout by routing the plurality of electrical components, obtaining a first resistance between a power terminal of the first layout and a first terminal of a first electrical component in the first layout, comparing the first resistance and a first threshold, adjusting routing of the first layout such that the first resistance is less than the first threshold, and generating a tape out file for the semiconductor device according to the first layout.

Abstract: A conjugate cam reducer includes input and output units disposed at two opposite sides of a transmission unit. The transmission unit includes smaller-diameter and larger-diameter cam discs axially connected with each other. The smaller-diameter and larger-diameter cam discs have first and second grooves. The input unit includes an input disc, an eccentric shaft and a plurality of input rollers. The input disc has a smaller inner peripheral wall engaging with the smaller-diameter cam disc, and a plurality of first receiving grooves registered with the first grooves to receive the input rollers. The eccentric shaft is rotated to drive rotation of the transmission unit in an eccentric cycloidal motion. The output unit includes an output disc having a larger inner peripheral wall which engages with the larger-diameter cam disc, and a plurality of second receiving grooves which are registered with the second grooves to receive a plurality of output rollers.

Abstract: The present disclosure provides a method for evaluating a heat sensitive structure. The method includes identifying a heat sensitive structure in an integrated circuit design layout and identifying a heat generating structure in the integrated circuit design layout. The method also includes calculating an operating temperature of the heat generating structure by taking a practical current distribution into consideration. The method also includes calculating an anticipated temperature increase for the heat sensitive structure induced by thermal coupling of the heat generating structure at the operating temperature.

Abstract: A true wireless multichannel-speakers device and a multiple sound-source voicing method thereof are disclosed. The true wireless multichannel-speakers device includes a first and a second sounder. The first and the second sounders respectively include a first and a second sound effect generators, a first and a second sound effect value providers, and a first and a second speakers. The first sound effect value provider provides a first sound effect control value set to the first sound effect generator to generate a first sound effect output signal so that the first speaker outputs the first sound effect output signal. The second sound effect value provider provides a second sound effect control value set to the second sound effect generator to generate a second sound effect output signal so that the second speaker outputs the second sound effect output signal.

Abstract: An ejecting mechanism is provided and includes a main body, a driving component and a driven component. The main body is slidable relative to a casing. The driving component and the driven component are pivotable relative to the main body. When the driving component switches from a first position to a second position, the driving component drives the driven component to switch from a third position to a fourth position. During a process that the driving component and the driven component respectively switch from the first position and the third position to the second position and the fourth position, the driving component and the driven component respectively push two opposite lateral walls of the casing to drive the main body to slide from an installation position to a detachment position relative to the casing. Furthermore, an electronic device with the aforementioned ejecting mechanism is provided.

Abstract: The present disclosure provides a method and a non-transitory computer readable media for inter-metal dielectric reliability check. The method comprises: receiving an electronic layout, the electronic layout including a first plurality of electrical components in a first layer; determining an internal voltage difference within each electrical component in the first layer based on parasitic effect; generating a simulation voltage value for each electrical component in the first layer based on the internal voltage differences; and tagging a pair of electrical components in the first layer when a first voltage difference between the pair of electrical components exceeds a first voltage threshold. The first voltage difference is determined based on the simulation voltage value of each electrical component.

Abstract: The present disclosure provides a method and an apparatus for testing a semiconductor device. The method includes providing an active area in an integrated circuit design layout; grouping the active area into a first region and a second region; calculating a first self-heating temperature of the first region of the active area; calculating a second self-heating temperature of the second region of the active area; and determining an Electromigration (EM) evaluation based on the first self-heating temperature and the second self-heating temperature.

Abstract: An ejecting mechanism is provided and includes a main body, a driving component and a driven component. The main body is slidable relative to a casing. The driving component and the driven component are pivotable relative to the main body. When the driving component switches from a first position to a second position, the driving component drives the driven component to switch from a third position to a fourth position. During a process that the driving component and the driven component respectively switch from the first position and the third position to the second position and the fourth position, the driving component and the driven component respectively push two opposite lateral walls of the casing to drive the main body to slide from an installation position to a detachment position relative to the casing. Furthermore, an electronic device with the aforementioned ejecting mechanism is provided.

Abstract: The present disclosure provides a method and an apparatus for testing a semiconductor device. The method includes providing an active area in an integrated circuit design layout; grouping the active area into a first region and a second region; calculating a first self-heating temperature of the first region of the active area; calculating a second self-heating temperature of the second region of the active area; and determining an Electromigration (EM) evaluation based on the first self-heating temperature and the second self-heating temperature.

Abstract: A cam transmission mechanism includes a rotary disk, a camshaft, contact members and a housing. The rotary disk has a periphery formed with equidistant projections, any two adjacent ones of which define an accommodating recess. The camshaft includes a shaft rod and a cam body that has at least one groove communicated with some of the recesses of the rotary disk. The groove and the recesses cooperate to form a plurality of confining spaces, within which the contact members are accommodated freely rollably for rotation transfer from the camshaft to the rotary disk. The housing is connected to the rotary disk for confining the contact members in the confining spaces, respectively.

Abstract: A temperature control system, adapted to a central processing unit powered by a power supply module of an electronic device, is provided. The temperature control system includes a setting module, a first temperature detecting module, a second temperature detecting module, and a power adjusting module. The setting module is configured to set a target temperature of the CPU and a target temperature of the power supply module. The first temperature detecting module is configured to obtain a detected temperature of the CPU. The second temperature detecting module is electrically connected to the power supply module, to obtain a detected temperature of the power supply module.

Abstract: A cam transmission mechanism includes a rotary disk, a camshaft, contact members and a housing. The rotary disk has a periphery formed with equidistant projections, any two adjacent ones of which define an accommodating recess. The camshaft includes a shaft rod and a cam body that has at least one groove communicated with some of the recesses of the rotary disk. The groove and the recesses cooperate to form a plurality of confining spaces, within which the contact members are accommodated freely rollably for rotation transfer from the camshaft to the rotary disk. The housing is connected to the rotary disk for confining the contact members in the confining spaces, respectively.