Abstract: An image sensor includes a unit cell having a plurality of pixels; the unit cell comprising an amplifier input transistor that is shared by the plurality of pixels; a plurality of floating diffusions that are joined by a floating diffusion interconnect layer and are connected to the amplifier input transistor; and an interconnect layer which forms an output signal wire which shields the floating diffusion interconnect layer.

Abstract: An image sensor includes a plurality of photo-sensitive elements arranged in an array in which each photo-sensitive element converts incident light into a charge packet; a charge-to-voltage converter that receives each charge packet and converts the charge packet into a voltage; a voltage-to-frequency converter that receives each voltage and converts the voltage into a signal having a frequency; and a frequency-to-digital signal converter that receives each signal having the frequency and converts the signal having the frequency into a digital signal.

Abstract: A CMOS image sensor includes a plurality of pixels defining an imaging area each pixel includes a photosensitive area that converts incident light into a charge; a first transistor having a transfer gate that transfers charge from the photosensitive area to a charge-to-voltage region; a second transistor that resets the voltage of the charge-to-voltage region; a third transistor that amplifies voltage from the charge-to-voltage region; and a select mechanism positioned outside the imaging area on the image sensor that selects a predefined number of pixels for readout from the third transistor.

Abstract: An image sensor includes a plurality of pixels for capturing incident light that is converted to a signal representing an image; wherein noise is combined with a signal representing both the image and a reset level; a plurality of dark reference pixels that generate noise that substantially correspond or equally correspond to the noise in the image and reset level; and a sample and hold circuit that reads out the image signal and cancels or substantially cancels out the noise from the image signal and reset level by canceling the noise from image and reset level with the noise generated from the dark reference pixels.

Abstract: A method for outputting signals from dark reference pixels, the method includes the steps of transferring signals from dark reference pixels that are shielded from light to a plurality of storage circuit elements; and transferring signals substantially simultaneously from each of the plurality of storage circuit elements to an operational amplifier on one clock cycle which operational amplifier averages all the signals from the sample and hold circuits for providing an approximate average dark reference signal.

Abstract: A correlated double sampling unit within a CMOS imager employs an image sensor having a plurality of photodetectors arranged in a series of rows and columns with a row addressing circuit, a column addressing circuit, a first sample and hold circuit allocated for each of the columns, a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns, and a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits.

Abstract: A CMOS imager is arranged in a plurality of rows and columns with a gain compensation circuit supplied for each of the column. The gain compensation circuit has a first source follower circuit that employs majority carriers of a first polarity yielding a first voltage gain, and a second source follower circuit employing majority carriers of second polarity opposite the first polarity yielding a voltage gain that is essentially the opposite of the first voltage gain variation as compared to the input voltage. The input to the second source follower circuit that is electrically coupled to the output of the second source follower circuit resulting in a gain compensation between the first and second source follower circuits. A selection circuit is configured to enable the gain compensation circuit upon activation of a column select signal.