Patents by Inventor Wen-An LIN

Wen-An LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10193812
    Abstract: In general, techniques are described for load-balancing responsibility for forwarding of multicast traffic into an active-active Ethernet segment between two or more multi-homed provider edge (PE) routers in an Ethernet Virtual Private Network (EVPN). In one example, a PE router may receive an Internet Group Management Protocol (IGMP) join report for a multicast group. The PE router may send join synch routes used to synchronize the join report for the multicast group across the Ethernet segment. The PE router may deterministically determine whether the PE router is configured to be an elected multicast forwarder for one of a plurality of multicast groups. If the PE router is elected a multicast forwarder, the PE router may configure a forwarding state of the PE router to ignore a designated forwarder calculation and to forward the multicast traffic into the Ethernet segment regardless of whether the PE router is a designated forwarder.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: January 29, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Vikram Nagarajan, Wen Lin, Robert W. Kebler, Princy T. Elizabeth, Kapil Arora
  • Patent number: 10187290
    Abstract: The disclosed computer-implemented method for preventing tromboning in inter-subnet traffic within data center architectures may include (1) detecting, at a leaf node of a data center, a route advertisement that advertises a route to a spine node of another data center that interfaces with the data center, (2) identifying, at the leaf node, an IP identifier of the spine node included in the route advertisement, (3) determining, at the leaf node, that the route corresponds to the spine node based at least in part on the IP identifier identified in the route advertisement, and then in response to determining that the route corresponds to the spine node, (4) rejecting the route to the spine node at the leaf node such that the leaf node does not learn the route to the spine node. Various other methods, systems, and apparatuses are also disclosed.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 22, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Wen Lin, John E. Drake
  • Patent number: 10187304
    Abstract: A device may receive, from a first device associated with a first LAN, network traffic destined for a second LAN. The device may provide the first LAN with access to a core network. The device may not provide the second LAN with access to the core network. The device may identify, based on the network traffic, a Layer 3 address associated with a second device. The second device may be associated with the second LAN. The device may determine that the first device is categorized as a leaf device within an Ethernet Tree provided by the device. The device may determine, based on the Layer 3 address, that the second device is categorized as a leaf device within the Ethernet Tree. The device may drop the network traffic based on determining that the first device and the second device are categorized as leaf devices within the Ethernet Tree.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: January 22, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Manoj Sharma, Wen Lin, Nitin Singh, John E. Drake
  • Publication number: 20190012957
    Abstract: A micro LED display panel includes a first metal layer, a micro LED layer on the first metal layer, and a transparent conductive layer on a side of the micro LED layer opposite from the first metal layer. The micro LED layer includes a plurality of micro LEDs spaced apart from each other. The first metal layer includes a plurality of first metal units spaced apart from each other. The plurality of first metal units serve as anodes or cathodes of the plurality of micro LEDs. The transparent conductive layer includes a plurality of transparent conductive units spaced apart from each other. The plurality of transparent conductive units serve as anodes or cathodes of the plurality of micro LEDs and are multiplexed as touch electrodes. The micro LED display panel of the present disclosure has both a display function and a touch function.
    Type: Application
    Filed: July 6, 2018
    Publication date: January 10, 2019
    Inventors: CHIA-LIN LIU, YU-FU WENG, CHIEN-WEN LIN, TZU-YU CHENG
  • Publication number: 20190013214
    Abstract: A manufacturing method of a package structure is described. The method includes at least the following steps. A carrier is provided. A semiconductor die and a sacrificial structure are disposed on the carrier. The semiconductor die is electrically connected to the bonding pads on the sacrificial structure through a plurality of conductive wires. As encapsulant is formed on the carrier to encapsulate the semiconductor die, the sacrificial structure and the conductive wires. The carrier is debonded, and at least a portion of the sacrificial structure is removed through a thinning process. A redistribution layer is formed on the semiconductor die and the encapsulant. The redistribution layer is electrically connected to the semiconductor die through the conductive wires.
    Type: Application
    Filed: July 10, 2017
    Publication date: January 10, 2019
    Applicant: Powertech Technology Inc.
    Inventors: Han-Wen Lin, Hung-Hsin Hsu, Shang-Yu Chang Chien, Nan-Chun Lin
  • Publication number: 20190011259
    Abstract: A MEMS device includes at least two masses and at least one spring assembly, each of the spring assemblies including at least two folded-shape springs and at least two connection portions. The folded-shape springs are directly connected to each other at a connection point, and the folded-shape springs are respectively connected to the masses through the corresponding connection portions, for operably driving the masses to move simultaneously inward or outward in a first direction.
    Type: Application
    Filed: August 30, 2017
    Publication date: January 10, 2019
    Inventors: Chiung-Wen Lin, Chiung-Cheng Lo
  • Patent number: 10174322
    Abstract: Disclosed herein is novel double-stranded short interfering ribonucleic acid (siRNA) capable of suppressing the translation of Aurora-A mRNA. Also disclosed are use of the novel siRNA as disclosed herein for manufacturing a medicament suitable for treating a cancer, which is mediated through epidermal growth factor receptor (EGFR) signaling. Accordingly, a pharmaceutical composition comprising the disclosed novel siRNA molecules is provided; as well as a method of treating a subject suffering from EGFR-mediated cancer via administering to the subject the disclosed novel siRNA molecule.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: January 8, 2019
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Liang-Yi Hung, Chien-Hsien Lai, Ta-Chien Tseng, Jeng-Chang Lee, Bo-Wen Lin
  • Publication number: 20180364993
    Abstract: Embodiments of the present invention may track a user's interaction trajectory associated with a problem occurred on a website. According to an embodiment of the present invention, a first symbol of a first definition associated with a first object file is obtained. Then, in response to the first symbol matching a second symbol of a second definition associated with a second object file, the first object file is optimized based on a first segment associated with the first definition in the first object file and an optimization to the second object file is skipped. Next, an executable file is generated based on the optimized first object file and the second object file.
    Type: Application
    Filed: August 22, 2018
    Publication date: December 20, 2018
    Inventors: Jin Song Ji, Ke Wen Lin, Zhao Wu, Qing S. Zhang
  • Patent number: 10156784
    Abstract: A method includes directing an acoustically agitated fluid stream at a first surface of a substrate to cause the substrate to vibrate mechanically thereby dislodging contaminant particles on the substrate. The first surface of the substrate is opposite a second surface of the substrate. The second surface of the substrate includes a pattern. An amplitude of the acoustically agitated fluid stream is configured to produce an acoustic response along an entirety of the second surface.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Wei Shen, Chi-Lun Lu, Kuan-Wen Lin
  • Patent number: 10156918
    Abstract: A TFT substrate comprising a first conductive layer, a first semiconductor layer, a second semiconductor layer, a second conductive layer formed over the first semiconductor layer, a first transparent layer, a third conductive layer, and a second transparent layer. The TFT substrate further comprises a plurality of touch sensor units. Each of the touch sensor units includes a plurality of first wires and a plurality of second wires crossed with the first wires. The first wires and the second wires are electrically connected each other for detecting touch operations at a position corresponding to a junction of the first wires and the second wires. Each of the touch sensor units comprises two sub-pixel electrodes and a TFT structure; the TFT structure simultaneously drives the two sub-pixels.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 18, 2018
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Fu Weng, Chien-Wen Lin, Chia-Lin Liu
  • Publication number: 20180355628
    Abstract: An automatic wall adhesion and cleaning system includes a cleaning mechanism for cleaning the outer wall of a building, and a vacuum-based wall adhesion mechanism adherable to the outer wall of the building by a vacuum suction force and adapted for carrying and moving the cleaning mechanism on the outer wall of the building. Thus, the automatic wall adhesion and cleaning system can save labor cost and eliminate the risk of human life due to rupture of the ropes of a hanging cage.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 13, 2018
    Inventor: YI-WEN LIN
  • Publication number: 20180356852
    Abstract: Some embodiments relate to a method. A semiconductor substrate is provided and has a base region and a crown structure extending upwardly from the base region. A plurality of fins are formed to extend upwardly from an upper surface of the crown structure. A gate dielectric material is formed over upper surfaces and sidewalls of the plurality of the fins. A conductive electrode material is formed over upper surfaces and sidewalls of the gate dielectric material. An etch is performed to etch back the conductive electrode material so upper surfaces of etched back conductive electrodes reside below the upper surfaces of the plurality of fins.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Yvonne Lin, Da-Wen Lin, Peter Huang, Paul Rousseau, Sheng-Jier Yang
  • Patent number: 10153344
    Abstract: Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee, Da-Wen Lin
  • Patent number: 10153203
    Abstract: A method includes forming an Inter-layer Dielectric (ILD) having a portion at a same level as a metal gate of a transistor. The ILD and the metal gate are parts of a wafer. The ILD is etched to form a contact opening. The wafer is placed into a PVD tool, with a metal target in the PVD tool. The metal target has a first spacing from a magnet over the metal target, and a second spacing from the wafer. A ratio of the first spacing to the second spacing is greater than about 0.02. A metal layer is deposited on the wafer, with the metal layer having a bottom portion in the contact opening, and a sidewall portion in the contact opening. An anneal is performed to react the bottom portion of the metal layer with the source/drain region to form a silicide region.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: December 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Wang, Yu-Ting Lin, Hung-Chang Hsu, Hsiao-Ping Liu, Hung Pin Lu, Yuan Wen Lin
  • Publication number: 20180344724
    Abstract: Described herein are compounds and compositions for treating glaucoma and/or reducing intraocular pressure. Compositions may comprise an isoquinoline compound and a prostaglandin or a prostaglandin analog. Compounds described herein include those in which an isoquinoline compound is covalently linked to a prostaglandin or a prostaglandin analog, and those in which an isoquinoline compound and a prostaglandin free acid together form a salt.
    Type: Application
    Filed: May 3, 2018
    Publication date: December 6, 2018
    Inventors: Casey Kopczynski, Cheng-Wen Lin, Jill Marie Sturdivant, Mitchell A. deLong
  • Publication number: 20180348171
    Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.
    Type: Application
    Filed: July 27, 2018
    Publication date: December 6, 2018
    Inventors: Jun-Hao Deng, Kuan-Wen Lin, Sheng-Chi Chin, Yu-Ching Lee
  • Publication number: 20180350697
    Abstract: A semiconductor device includes a P-type Field Effect Transistor (PFET) and an NFET. The PFET includes an N-well disposed in a substrate, a first fin structure disposed over the N-well, a first liner layer disposed over the N-well, and a second liner layer disposed over the first liner layer. The first liner layer and the second liner layer include different materials. The NFET includes a P-well disposed in the substrate, a second fin structure disposed over the P-well, a third liner layer disposed over the P-well. The third liner layer and the second liner layer include the same materials.
    Type: Application
    Filed: July 26, 2018
    Publication date: December 6, 2018
    Inventors: Ming-Lung Cheng, Yen-Chun Lin, Da-Wen Lin
  • Publication number: 20180333405
    Abstract: Described herein are compounds and compositions for treating glaucoma and/or reducing intraocular pressure. Compositions may comprise an isoquinoline compound and a prostaglandin or prostaglandin analog. Compounds described herein include those in which an isoquinoline compound is covalently linked to a prostaglandin or a prostaglandin analog, and those in which an isoquinoline compound and a prostaglandin free acid together form a salt.
    Type: Application
    Filed: February 21, 2018
    Publication date: November 22, 2018
    Inventors: Casey Kopczynski, Cheng-Wen Lin, Jill Marie Sturdivant, Mitchell A. deLong
  • Patent number: 10133559
    Abstract: Embodiments of the present invention may track a user's interaction trajectory associated with a problem occurred on a website. According to an embodiment of the present invention, a first symbol of a first definition associated with a first object file is obtained. Then, in response to the first symbol matching a second symbol of a second definition associated with a second object file, the first object file is optimized based on a first segment associated with the first definition in the first object file and an optimization to the second object file is skipped. Next, an executable file is generated based on the optimized first object file and the second object file.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jin Song Ji, Ke Wen Lin, Zhao Wu, Qing S. Zhang
  • Patent number: 10133427
    Abstract: An embedded touch-screen display panel includes a first substrate and a second substrate sandwiching a driving circuit disposed on the second substrate. The second substrate also carries a touch electrode layer and a first selecting circuit. The driving circuit generates signals of touches and driving signals, and includes a plurality of touch detecting pins and a plurality of controlling pins. The touch electrode layer includes a plurality of touch electrodes. At least two touch electrodes are electrically connected to one touch detecting pin via the first selecting circuit. A touch signal is transmitted between the two touch electrodes and the touch detecting pin. The controlling pin generates signals to the first selecting circuit to establish or cut off electrical connections between the touch detecting pins and the touch electrodes.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: November 20, 2018
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Fu Weng, Chien-Wen Lin, Chia-Lin Liu