Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.

Abstract: A multi-channel switch device is provided. The multi-channel switch device includes a first-stage switch circuit, at least one second-stage switch circuit, and multiple third-stage switch circuits. The first-stage switch circuit includes a first common-mode node, a first input/output terminal, and at least one first-stage connection terminal. The second-stage switch circuit includes a second common-mode node, a second-stage transmission terminal, and multiple second-stage connection terminals. Each of the third-stage switch circuits includes a third common-mode node, a third-stage transmission terminal, a reference terminal, and a second input/output terminal. Two of the first input/output terminal and the at least one first-stage connection terminal are connected through the first common-mode node. Two of the second-stage transmission terminal and the second-stage connection terminals are connected through the second common-mode node.

Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.

Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.

Abstract: A container with a handle includes a container body. The container body has a peripheral edge extending outward to form a ring portion. The ring portion is provided with a first slot penetrating through the ring portion. The first slot cuts the ring portion to form a first handle portion and a first edge portion completely connected to the container body. In addition, the ring portion is further provided with a second slot penetrating through the ring portion. The first slot and the second slot are respectively located on two opposite sides of the ring portion. The second slot cuts the ring portion to form a second handle portion and a second edge portion completely connected to the container body. The first handle portion and the second handle portion each have two ends connected to the container body and may be pulled up as the handle.

Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an ultra-high voltage resistor and methods of manufacture. The structure includes at least one resistor coupled to a well of a doped substrate, the at least one resistor being separated vertically from the well by an isolation region with one end of the resistor being attached to an input pad and another end coupled to circuitry.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an ultra-high voltage resistor and methods of manufacture. The structure includes at least one resistor coupled to a well of a doped substrate, the at least one resistor being separated vertically from the well by an isolation region with one end of the resistor being attached to an input pad and another end coupled to circuitry.

Abstract: A device and a method for forming a device are disclosed. The device includes a substrate with a high voltage (HV) device region. The HV device region is defined with first and second device isolation regions and an internal dielectric region which are shallow trench isolation (STI) regions. A HV transistor is disposed in the HV device region. The HV transistor includes a gate dielectric layer on the substrate, a gate disposed on the gate dielectric layer, and a source region disposed in the substrate adjacent to the gate and first device isolation region while a drain region disposed in the substrate adjacent to the second device isolation region. A drift well and a body well are disposed in the substrate. At least one buried RESURF region is disposed under the internal dielectric region.

Abstract: A device and a method for forming a device are disclosed. The device includes a substrate with a high voltage (HV) device region. The HV device region is defined with first and second device isolation regions and an internal dielectric region which are shallow trench isolation (STI) regions. A HV transistor is disposed in the HV device region. The HV transistor includes a gate dielectric layer on the substrate, a gate disposed on the gate dielectric layer, and a source region disposed in the substrate adjacent to the gate and first device isolation region while a drain region disposed in the substrate adjacent to the second device isolation region. A drift well and a body well are disposed in the substrate. At least one buried RESURF region is disposed under the internal dielectric region.

Abstract: A semiconductor device is provided. The device includes a semiconductor substrate and a gate structure thereon. A well region is formed in the semiconductor substrate. A drain region and a source region are respectively formed in the semiconductor substrate inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. The semiconductor substrate and the first heavily doped region have a first conductivity type and the well region and the second heavily doped region have a second conductivity type. A method for fabricating a semiconductor device is also disclosed.

Abstract: A semiconductor device is provided. The device includes a semiconductor substrate and a gate structure thereon. A well region is formed in the semiconductor substrate. A drain region and a source region are respectively formed in the semiconductor substrate inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. The semiconductor substrate and the first heavily doped region have a first conductivity type and the well region and the second heavily doped region have a second conductivity type. A method for fabricating a semiconductor device is also disclosed.

Abstract: A semiconductor device including a semiconductor substrate of a first conductivity type and an epitaxial structure of the first conductivity type disposed thereon is disclosed. A well region of a second conductivity type is formed in the epitaxial structure and the semiconductor substrate. A drain region and a source region are respectively formed in the epitaxial structure inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions of the first and second conductivity type, respectively, are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. A gate structure is disposed on the epitaxial structure. A method for fabricating a semiconductor device is also disclosed.

Abstract: A semiconductor device including a semiconductor substrate of a first conductivity type and an epitaxial structure of the first conductivity type disposed thereon is disclosed. A well region of a second conductivity type is formed in the epitaxial structure and the semiconductor substrate. A drain region and a source region are respectively formed in the epitaxial structure inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions of the first and second conductivity type, respectively, are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. A gate structure is disposed on the epitaxial structure. A method for fabricating a semiconductor device is also disclosed.

Abstract: A method of preparing conductive gaskets on a chassis includes steps as follows. A chassis is provided. An elastomer is pasted on an inner surface of the chassis. A conductive film is formed to cover both the inner surface of the chassis and the elastomer. The chassis with conductive gaskets, and a method of assembling an electric device including the same are also provided in the invention.

Abstract: An electromagnetic interference preventing module is provided. The module includes a metal pad that is disposed on a circuit board. The metal pad includes a soldering portion and a grounding portion that are connected to each other. At least one fixing lug of a connector is soldered to the soldering portion. At least one protrusion of a grounding housing is in contact with the grounding portion, so as to electrically connect the connector with the grounding housing.

Abstract: A multimedia-messaging-service (MMS) system and the service method thereof are provided. The MMS system integrates the mobility management scheme of a GSM/GPRS/UMTS mobile network and the broadband transmission service of a wireless LAN, and has a user authentication and a location management. The MMS system uses a MMS server to communicate with a wireless LAN, a GSM/GPRS/UMTS mobile network and an Internet for providing the MMS service including user registration, message submission, message forwarding, message notification, message retrieval and location update.

Abstract: An audio circuit board includes a main body, an audio connector, a digital ground loop, an analog ground portion and a moat. The main body includes an edge and a surface. The audio connector is disposed on one side of the main body and includes a fixing portion. The digital ground loop completely surrounds the edge of the main body. The audio connector is connected with the digital ground loop via the fixing portion. The analog ground portion is disposed on the surface of the main body and is disposed adjacent to the digital ground loop. The analog ground portion is separated from the main body via the moat.

Abstract: An electromagnetic interference preventing module is provided. The module includes a metal pad that is disposed on a circuit board. The metal pad includes a soldering portion and a grounding portion that are connected to each other. At least one fixing lug of a connector is soldered to the soldering portion. At least one protrusion of a grounding housing is in contact with the grounding portion, so as to electrically connect the connector with the grounding housing.

Abstract: A KVM switch expansion device includes a box disposed with multiple I/O ports thereon and containing a control component connected to those I/O ports; one or a multiple space is disposed to the box for accommodating expansion module at where other than those I/O ports are provided or the expansion module is separately provided in the form of another box to directly create telecommunication connection with the control component by means of a connection interface for the existing KVM switch to provide new user interface with an expansion module.