Patents by Inventor Wen-Ching Hsu

Wen-Ching Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140103518
    Abstract: A structure and method for air cavity packaging, the structure comprises a carrier having plural die pads and leads, plural dies, plural wires, plural walls, and a lid. The dies are mounted on the die pads. The wires electrically connect the dies to the leads. The plural walls are disposed on the carrier and form plural cavities in a way that each cavity contains at least one die pad and plural leads, and each wall is provided with at least one air vent for exhausting air to the outside. The lid is attached on the plural walls via an adhesive agent to seal the plural air cavities, so that the plural connected air cavity packages are formed.
    Type: Application
    Filed: February 6, 2013
    Publication date: April 17, 2014
    Applicant: WIN Semiconductors Corp.
    Inventors: Zi-Hong FU, Sung-Mao YANG, Chun-Ting CHU, Wen-Ching HSU
  • Patent number: 8624279
    Abstract: A light emitting diode (LED) substrate includes a sapphire substrate which is characterized by having a surface consisting of irregular hexagonal pyramid structures, wherein a pitch of the irregular hexagonal pyramid structure is less than 10 ?m. A symmetrical cross-sectional plane of each of the irregular hexagonal pyramid structures has a first base angle and a second base angle, wherein the second base angle is larger than the first base angle, and the second base angle is 50° to 70°. This LED substrate has high light-emitting efficiency.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: January 7, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Bo-Hsiang Tseng, Yi-Shan Hsieh, Bo-Wen Lin, Kun-Lin Yang, Chun-Yen Peng, Wen-Ching Hsu
  • Publication number: 20130291936
    Abstract: A solar cell is provided. The solar cell includes a substrate, a first electrode, a second electrode, a seed layer, and a plurality of nanorods. The substrate has a first surface and a second surface opposite to each other. A conductive type of a portion of the substrate adjacent to the first surface is first conductive type, and a conductive type of the remaining portion of the substrate is second conductive type. The first electrode is disposed on the first surface. The second electrode is disposed on the second surface. The seed layer is disposed on the first surface. The nanorods are disposed on the seed layer.
    Type: Application
    Filed: April 9, 2013
    Publication date: November 7, 2013
    Applicants: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Miin-Jang Chen, Hsin-Jui Chen, Wei-Cheng Wang, Wen-Ching Hsu
  • Publication number: 20130285098
    Abstract: A patterned substrate includes a substrate and a plurality of protrusions. The protrusions are formed on the substrate. Each protrusion has a top face and a base. Each pair of immediately adjacent protrusions is minimally parted by 0 to 0.2 ?m. When the distance between the adjacent protrusions falls as 0 ?m, the bases thereof contact each other. A horizontal and a vertical light emitting diode structures using the patterned substrate are also discussed.
    Type: Application
    Filed: April 26, 2013
    Publication date: October 31, 2013
    Applicant: CRYSTALWISE TECHNOLOGY INC
    Inventors: BO-WEN LIN, SHIH-CHIEH HSU, CHUN-YEN PENG, WEN-CHING HSU
  • Publication number: 20130133569
    Abstract: A crystal growth device includes a crucible and a heater setting. The crucible has a bottom and a top opening. The heater setting surrounds the crucible and is movable relative to the crucible along a top-bottom direction of the crucible and between first and second positions. The heater setting includes a first temperature heating zone and a second temperature heating zone higher in temperature than the first temperature heating zone. The heater setting is in the first position when the crucible is in the second temperature heating zone and in the second position when the crucible is in the first temperature heating zone.
    Type: Application
    Filed: May 24, 2012
    Publication date: May 30, 2013
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Chung-Wen Lan, Bruce Hsu, Wen-Huai Yu, Wen-Chieh Lan, Yu-Min Yang, Kai-Yuan Pai, Wen-Ching Hsu
  • Publication number: 20130136918
    Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
    Type: Application
    Filed: March 9, 2012
    Publication date: May 30, 2013
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Wen-Huai YU, Cheng-Jui YANG, Yu-Min YANG, Kai-Yuan PAI, Wen-Chieh LAN, Chan-Lu SU, Yu-Tsung CHIANG, Sung-Lin HSU, Wen-Ching HSU, Chung-Wen LAN
  • Publication number: 20130095027
    Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
    Type: Application
    Filed: March 9, 2012
    Publication date: April 18, 2013
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Sung-Lin HSU, Cheng-Jui YANG, Pei-Kai HUANG, Sheng-Hua NI, Yu-Min YANG, Ming-Kung HSIAO, Wen-Huai YU, Ching-Shan LIN, Wen-Ching HSU, Chung-Wen LAN
  • Publication number: 20130095028
    Abstract: A crystalline silicon ingot and a method of manufacturing the same are provided. Using a crystalline silicon seed layer, the crystalline silicon ingot is formed by a directional solidification process. The crystalline silicon seed layer is formed of multiple primary monocrystalline silicon seeds and multiple secondary monocrystalline silicon seeds. Each of the primary monocrystalline silicon seeds has a first crystal orientation different from (100). Each of the secondary monocrystalline silicon seeds has a second crystal orientation different from the first crystal orientation. Each of the primary monocrystalline silicon seeds is adjacent to at least one of the secondary monocrystalline silicon seeds, and separate from the others of the primary monocrystalline silicon seeds.
    Type: Application
    Filed: March 26, 2012
    Publication date: April 18, 2013
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Wen-Chieh LAN, Yong-Cheng Liu, Wen-Huai YU, Sung-Lin HSU, Wen-Ching HSU
  • Publication number: 20120305965
    Abstract: A light emitting diode (LED) substrate includes a sapphire substrate which is characterized by having a surface consisting of irregular hexagonal pyramid structures, wherein a pitch of the irregular hexagonal pyramid structure is less than 10 ?m. A symmetrical cross-sectional plane of each of the irregular hexagonal pyramid structures has a first base angle and a second base angle, wherein the second base angle is larger than the first base angle, and the second base angle is 50° to 70°. This LED substrate has high light-emitting efficiency.
    Type: Application
    Filed: May 16, 2012
    Publication date: December 6, 2012
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Bo-Hsiang Tseng, Yi-Shan Hsieh, Bo-Wen Lin, Kun-Lin Yang, Chun-Yen Peng, Wen-Ching Hsu
  • Publication number: 20120292630
    Abstract: A light emitting diode (LED) substrate including a sapphire substrate is provided. The sapphire substrate has a surface consisting of a plurality of upper trigonal and lower hexagonal tapers, wherein each of the upper trigonal and lower hexagonal tapers is consisted of a hexagonal taper and a trigonal taper on the hexagonal taper, and a pitch of the upper trigonal and lower hexagonal tapers is less than 10 ?m. This LED substrate has high light-emitting efficiency.
    Type: Application
    Filed: June 7, 2011
    Publication date: November 22, 2012
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Yew-Chung Sermon Wu, Feng-Ching Hsiao, Yu-Chung Chen, Bo-Hsiang Tseng, Bo-Wen Lin, Chun-Yen Peng, Wen-Ching Hsu
  • Publication number: 20120273821
    Abstract: A method for patterning an epitaxial substrate includes: (a) forming an etch mask layer over an epitaxial substrate, and patterning the etch mask layer using a patterned cover mask layer to form the etch mask layer into a plurality of spaced apart mask patterns; and (b) etching the epitaxial substrate that is exposed from the mask patterns, and removing the mask patterns such that the epitaxial substrate is formed with a plurality of spaced apart substrate patterns.
    Type: Application
    Filed: April 18, 2012
    Publication date: November 1, 2012
    Applicant: SINO-AMERICAN SILICON PRODCUTS INC.
    Inventors: Cheng-Hung Wei, Bo-Wen Lin, Ching-Yen Peng, Hao-Chung Kuo, Wen-Ching Hsu
  • Publication number: 20120199935
    Abstract: The invention discloses an optoelectronic device and method of fabricating the same. The optoelectronic device according to the invention includes a semiconductor structure combination, a first surface passivation layer formed on an upper surface of the semiconductor structure combination, and a second surface passivation layer formed on the first surface passivation layer. The semiconductor structure combination includes at least one P-N junction. In particular, the interfacial state density of the first surface passivation layer is lower than that of the second surface passivation layer, and the fixed oxide charge density of the second surface passivation layer is higher than that of the first surface passivation layer.
    Type: Application
    Filed: November 28, 2011
    Publication date: August 9, 2012
    Applicants: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Miin-Jang Chen, Hsin-Jui Chen, Wen-Ching Hsu
  • Publication number: 20120193764
    Abstract: The instant disclosure relates to a nanostructuring process for an ingot surface prior to the slicing operation. A surface treatment step is performed for at least one surface of the ingot in forming a nanostructure layer thereon. The nanostructure layer is capable of enhancing the mechanical strength of the ingot surface to reduce the chipping ratio of the wafer during slicing.
    Type: Application
    Filed: January 19, 2012
    Publication date: August 2, 2012
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Jiunn-Yih CHYAN, Jian-Jhih LI, Kun-Lin YANG, Wen-Ching HSU
  • Patent number: 8203136
    Abstract: The invention provides an epitaxial substrate, a semiconductor light-emitting device using such epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, a crystal surface of the crystalline substrate thereon has a plurality of randomly arranged nanorods. The plurality of nanorods is formed of oxide of a material different from that forms the crystalline substrate.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: June 19, 2012
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Jiunn-Yih Chyan, Hung-Chi Chien, Kun-Lin Yang, Wen-Ching Hsu
  • Publication number: 20120112158
    Abstract: The invention provides an epitaxial substrate, a semiconductor light-emitting device using such epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, a crystal surface of the crystalline substrate thereon has a plurality of randomly arranged nanorods. The plurality of nanorods is formed of oxide of a material different from that forms the crystalline substrate.
    Type: Application
    Filed: February 9, 2011
    Publication date: May 10, 2012
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Jiunn-Yih Chyan, Hung-Chi Chien, Kun-Lin Yang, Wen-Ching Hsu
  • Patent number: 8163651
    Abstract: The invention discloses a method of fabricating a first substrate and a method of recycling a second substrate during fabrication of the first substrate. The second substrate is heterogeneous for the first substrate. First, the fabricating method according to the invention is to prepare the second substrate. Subsequently, the fabricating method is to deposit a buffer layer on the second substrate. Then, the fabricating method is to deposit a semiconductor material layer on the buffer layer. The buffer layer assists the epitaxial growth of the semiconductor material layer, and serves as a lift-off layer. Finally, with an etching solution, the fabricating method is to only etch the lift-off layer to debond the second substrate away from the semiconductor material layer, where the semiconductor material layer serves as the first substrate.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: April 24, 2012
    Assignees: Sino-American Silicon Products Inc.
    Inventors: Miin-Jang Chen, Wen-Ching Hsu, Suz-Hua Ho
  • Patent number: 8110739
    Abstract: The invention provides a solar cell and a method of fabricating the same. The solar cell, according to a preferred embodiment of the invention, includes a semiconductor structure combination and a multi-atomic-layer structure formed of at least one oxide. The semiconductor structure combination includes at least one p-n junction and has an illuminated surface. The multi-atomic-layer structure overlays the illuminated surface of the semiconductor structure combination. In particular, the multi-atomic-layer structure serves as a surface passivation layer, a transparent conductive layer, and further as an anti-reflective layer.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: February 7, 2012
    Assignees: Sino-American Silicon Products, Inc.
    Inventors: Miin-Jang Chen, Wen-Ching Hsu, Ya-Lan Ho, Jung-Tsung Wang
  • Publication number: 20120015143
    Abstract: The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.
    Type: Application
    Filed: June 22, 2011
    Publication date: January 19, 2012
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Jiunn-Yih Chyan, Jer-Liang Yeh, Wen-Ching Hsu, Suz-Hua Ho
  • Publication number: 20110303143
    Abstract: An approach is provided for a method to manufacture a crystalline silicon ingot. The method comprises providing a mold formed for melting and cooling a silicon feedstock by using a directional solidification process, disposing a barrier layer inside the mold, disposing one or more silicon crystal seeds on the barrier layer, loading the silicon feedstock on the silicon crystal seeds, heating the mold to obtain a silicon melt, and cooling the mold by the directional solidification process to solidify the silicon melt into a silicon ingot. The mold is heated until the silicon feedstock is fully melted and the silicon crystal seeds are at least partially melted.
    Type: Application
    Filed: April 29, 2011
    Publication date: December 15, 2011
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Chung-Wen Lan, Ya-Lu Tsai, Sung-Lin Hsu, Chao-Kun Hsieh, Wen-Chieh Lan, Wen-Ching Hsu
  • Publication number: 20110168670
    Abstract: A patterned sapphire substrate manufacturing method uses two-section dip etching procedure to improve the lateral etching rate at each etching position, so as to produce a concave-convex pattern composed of a plurality of triangular pyramid structures protruded from a surface onto an upper surface of a sapphire substrate, such that less planar area of the sapphire substrate surface will remain, and a mixed solution of sulfuric acid and phosphoric acid is used in a first dip etching step, and pure phosphoric acid or a mixed solution of sulfuric acid and phosphoric acid is used in a second dip etching step for etching the sapphire substrate to control the inclination of each triangular pyramid structure precisely, and providing a better light extraction rate for later manufactured light emitting diodes.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 14, 2011
    Inventors: Yew-Chung Sermon Wu, Chi-Hao Cheng, Bo-Wen Lin, Wen-Ching Hsu, Szu-Hua Ho