Patents by Inventor Wen-Chun Liu

Wen-Chun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136463
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 25, 2024
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Patent number: 11921001
    Abstract: A method and system for inspecting deviation in dynamic characteristics of a feeding system are provided, and the method includes: exciting the feeding system and detecting vibrations of a subcomponent of a component to be inspected of the feeding system to generate a monitoring excitation signal in a monitoring mode; calculating, by a modal analysis method, monitoring eigenvalues and monitoring eigenvectors of the monitoring excitation signal; determining, by a modal verification method, similarity between the monitoring eigenvalues and standard eigenvalues of a digital twin model and similarity between the monitoring eigenvectors and standard eigenvectors of the digital twin model; determining that the dynamic characteristics of the subcomponent are deviated, when the monitoring eigenvalues and monitoring eigenvectors are not similar to the standard eigenvalues and standard eigenvectors. Therefore, the subcomponent whose dynamic characteristics are deviated can be sensed remotely and precisely.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 5, 2024
    Assignee: Hiwin Technologies Corp.
    Inventors: Hsien-Yu Chen, Yu-Sheng Chiu, Chih-Chun Cheng, Wen-Nan Cheng, Chi-Ming Liu
  • Publication number: 20240071854
    Abstract: Some implementations described herein a provide a multi-die package and methods of formation. The multi-die package includes a dynamic random access memory integrated circuit die over a system-on-chip integrated circuit die, and a heat transfer component between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, which may correspond to a dome-shaped structure, may be on a surface of the system-on-chip integrated circuit die and enveloped by an underfill material between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, in combination with the underfill material, may be a portion of a thermal circuit having one or more thermal conductivity properties to quickly spread and transfer heat within the multi-die package so that a temperature of the system-on-chip integrated circuit die satisfies a threshold.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Yi LIN, Kuang-Chun LEE, Chien-Chen LI, Chien-Li KUO, Kuo-Chio LIU
  • Publication number: 20240071950
    Abstract: Integrated circuit packages and methods of forming the same are discussed. In an embodiment, a device includes: a package substrate; a semiconductor device attached to the package substrate; an underfill between the semiconductor device and the package substrate; and a package stiffener attached to the package substrate, the package stiffener includes: a main body extending around the semiconductor device and the underfill in a top-down view, the main body having a first coefficient of thermal expansion; and pillars in the main body, each of the pillars extending from a top surface of the main body to a bottom surface of the main body, each of the pillars physically contacting the main body, the pillars having a second coefficient of thermal expansion, the second coefficient of thermal expansion being less than the first coefficient of thermal expansion.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Yi Lin, Kuang-Chun Lee, Chien-Chen Li, Chien-Li Kuo, Kuo-Chio Liu
  • Publication number: 20240068119
    Abstract: A casing structure of electronic device including a metal base plate, a transparent cathodic electrodeposition paints layer, and a transparent paints coating layer is provided. The metal base plate has brushed texture and high gloss surface. The transparent cathodic electrodeposition paints layer is disposed on the base metal base plate. The transparent paints coating layer is disposed on the transparent cathodic electrodeposition paints layer. A manufacturing method of casing structure of electronic device is also provided.
    Type: Application
    Filed: March 2, 2023
    Publication date: February 29, 2024
    Applicant: Acer Incorporated
    Inventors: Tzu-Wei Lin, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
  • Patent number: 10256180
    Abstract: A package structure includes a substrate, an insulator, a plurality of pads and a patterned circuit layer. The substrate includes a plurality of through holes. The insulator covers the substrate and is filled in the through hole. The conductive vias are located in the through holes and penetrate the insulator filled in the through holes. The pads are disposed on an upper surface and a lower surface of the insulator and electrically connected to the conductive vias. A bottom surface of each pad is lower than the top surface of the insulator. The patterned circuit layer is disposed on the top surface of the insulator and connected to the conductive vias and the pads. A bottom surface of the patterned circuit layer is lower than the top surface of the insulator.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: April 9, 2019
    Assignee: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Patent number: 10134668
    Abstract: A package structure includes a lead frame, an insulator, a plurality of conductive vias, a patterned metal layer, and a chip. The lead frame includes a plurality of contacts. The insulator covers the lead frame. The conductive vias are disposed on the insulator and connected to the contacts. The patterned metal layer covers an outer surface of the insulator and includes a groove and a circuit portion. The circuit portion is connected to and covers the conductive vias and contacts. The groove surrounds the circuit portion such that the circuit portion is electrically insulated from the rest of the patterned metal layer. A surface of the insulator exposed by the groove is lower than the outer surface. The chip is disposed on the insulator and electrically connected to the circuit portion.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: November 20, 2018
    Assignee: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Publication number: 20180294218
    Abstract: A package structure includes a lead frame, an insulator, a plurality of conductive vias, a patterned metal layer, and a chip. The lead frame includes a plurality of contacts. The insulator covers the lead frame. The conductive vias are disposed on the insulator and connected to the contacts. The patterned metal layer covers an outer surface of the insulator and includes a groove and a circuit portion. The circuit portion is connected to and covers the conductive vias and contacts. The groove surrounds the circuit portion such that the circuit portion is electrically insulated from the rest of the patterned metal layer. A surface of the insulator exposed by the groove is lower than the outer surface. The chip is disposed on the insulator and electrically connected to the circuit portion.
    Type: Application
    Filed: July 24, 2017
    Publication date: October 11, 2018
    Applicant: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Patent number: 10090256
    Abstract: A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: October 2, 2018
    Assignee: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Patent number: 9859193
    Abstract: A package structure including a substrate, a first lead frame, a first metal layer, at least one chip, a base and a second metal layer is provided. The base includes a plurality of openings. The first lead frame is embedded in the substrate and includes a plurality of first pads, where the openings expose the first pads. The first metal layer covers the exposed first pads. The chip is disposed on the substrate and electrically connected to the first metal layer and the first pads. The base covers the substrate with its bonding surface. The second metal layer covers a base surface of the base.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 2, 2018
    Assignee: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Publication number: 20170342113
    Abstract: A recombinant H7 hemagglutinin derived from Chinese hamster ovary (CHO) cell. The recombinant H7 hemagglutinin includes a H7 hemagglutinin domain, a GCN4-pII trimerization motif, and a His-tag. The recombinant H7 hemagglutinin can be prepared as a protective vaccine composition with a pharmaceutically acceptable adjuvant. H7 hemagglutinin specific antibodies are elicited, and protection against H7N9 influenza virus is provided.
    Type: Application
    Filed: September 2, 2016
    Publication date: November 30, 2017
    Inventors: Suh-Chin WU, Wen-Chun LIU, Ting-Hsuan CHEN
  • Patent number: 9801282
    Abstract: A package structure includes a substrate, a sensor, a base, a lead frame, conductive vias and patterned circuit layer. The substrate includes a component-disposing region and electrode contacts. The sensor is disposed at the component-disposing region and electrically connected to the electrode contacts. The base covers the substrate with its bonding surface and includes a receiving cavity, a slanted surface extended between a bottom surface of the receiving cavity and the bonding surface, and electrodes disposed on the bonding surface and electrically connected to the electrode contacts respectively. The sensor is located in the receiving cavity. The lead frame is disposed at the base. The conductive vias penetrates the base and electrically connected to the lead frame. The patterned circuit layer is disposed on the slanted surface and electrically connected to the conductive vias and the electrodes.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: October 24, 2017
    Assignee: IBIS Innotech Inc.
    Inventor: Wen-Chun Liu
  • Publication number: 20170256479
    Abstract: A package structure including a substrate, a first lead frame, a first metal layer, at least one chip, a base and a second metal layer is provided. The base includes a plurality of openings. The first lead frame is embedded in the substrate and includes a plurality of first pads, where the openings expose the first pads. The first metal layer covers the exposed first pads. The chip is disposed on the substrate and electrically connected to the first metal layer and the first pads. The base covers the substrate with its bonding surface. The second metal layer covers a base surface of the base.
    Type: Application
    Filed: May 22, 2017
    Publication date: September 7, 2017
    Applicant: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Patent number: 9753358
    Abstract: A carrier slide-bar device in arc motion includes: a first, a second, and a third slide bar respectively having a first, a second, and a third guide rail, where the third slide bar is provided with an active seat and a passive seat pivotally connected to the first and the second slide bar respectively, the active seat is provided with a first sliding member assembled with the first guide rail and is connected to a first power source to enable the first sliding member to move along the first guide rail, the passive seat is provided with a second sliding member assembled with the second guide rail, a pivot bar is vertically provided on the passive seat, and the rotary seat is pivotally connected to at least a third sliding member; thereby, the carrier such as a camera can take pictures while moving by various arcs and angles.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: September 5, 2017
    Inventor: Wen Chun Liu
  • Publication number: 20170194241
    Abstract: A package structure includes a substrate, an insulator, a plurality of pads and a patterned circuit layer. The substrate includes a plurality of through holes. The insulator covers the substrate and is filled in the through hole. The conductive vias are located in the through holes and penetrate the insulator filled in the through holes. The pads are disposed on an upper surface and a lower surface of the insulator and electrically connected to the conductive vias. A bottom surface of each pad is lower than the top surface of the insulator. The patterned circuit layer is disposed on the top surface of the insulator and connected to the conductive vias and the pads. A bottom surface of the patterned circuit layer is lower than the top surface of the insulator.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Applicant: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Patent number: 9688965
    Abstract: A recombinant neuraminidase based on amino acid sequence (SEQ ID NO: 1) of wild-type pH1N1-NA (A/Texas/05/2009) influenza virus is provided. The recombinant neuraminidase of the present invention has an ectodomain with an amino acid sequence identical to SEQ ID NO: 1 and replaced at specific positions 149, 344, 365 and 366 residue(s) with corresponding amino acids of other influenza viruses. The recombinant neuraminidase may incur cross-protective immunity and be used as universal influenza vaccine.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: June 27, 2017
    Assignee: National Tsing Hua University
    Inventors: Suh-Chin Wu, Wen-Chun Liu, Chia-Ying Lin
  • Patent number: 9644008
    Abstract: The invention provides a deglycosylated hemagglutinin, wherein the glycosylation site(s) on the stem region is removed. The deglycosylated hemagglutinin may induce neutralizing antibody against influenza virus, and cross-reactive protection against different virus. The invention also provides a method for manufacturing deglycosylated hemagglutinin, comprising aligning two or more hemagglutinin stem sequences of influenza virus, identifying the high conserved N-glycosylation site, and removing the high conserved N-glycosylation site. Thus, the N-glycosylation site cannot be glycosylated.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: May 9, 2017
    Assignee: National Tsing Hua University
    Inventors: Suh-Chin Wu, Wen-Chun Liu, Yun-Ju Huang
  • Publication number: 20170077045
    Abstract: A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.
    Type: Application
    Filed: November 29, 2016
    Publication date: March 16, 2017
    Applicant: IBIS Innotech Inc.
    Inventors: Wen-Chun Liu, Wei-Jen Lai
  • Publication number: 20160353575
    Abstract: A package structure includes a substrate, a sensor, a base, a lead frame, conductive vias and patterned circuit layer. The substrate includes a component-disposing region and electrode contacts. The sensor is disposed at the component-disposing region and electrically connected to the electrode contacts. The base covers the substrate with its bonding surface and includes a receiving cavity, a slanted surface extended between a bottom surface of the receiving cavity and the bonding surface, and electrodes disposed on the bonding surface and electrically connected to the electrode contacts respectively. The sensor is located in the receiving cavity. The lead frame is disposed at the base. The conductive vias penetrates the base and electrically connected to the lead frame. The patterned circuit layer is disposed on the slanted surface and electrically connected to the conductive vias and the electrodes.
    Type: Application
    Filed: August 10, 2016
    Publication date: December 1, 2016
    Applicant: IBIS Innotech Inc.
    Inventor: Wen-Chun Liu