Patents by Inventor Wen-Chun Liu

Wen-Chun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150183833
    Abstract: The invention provides a deglycosylated hemagglutinin, wherein the glycosylation site(s) on the stem region is removed. The deglycosylated hemagglutinin may induce neutralizing antibody against influenza virus, and cross-reactive protection against different virus. The invention also provides a method for manufacturing deglycosylated hemagglutinin, comprising aligning two or more hemagglutinin stem sequences of influenza virus, identifying the high conserved N-glycosylation site, and removing the high conserved N-glycosylation site. Thus, the N-glycosylation site cannot be glycosyalted.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 2, 2015
    Applicant: National Tsing Hua University
    Inventors: Suh-Chin WU, Wen-Chun LIU, Yun-Ju HUANG
  • Publication number: 20140221628
    Abstract: A DNA vaccine comprising hyperglycosylated mutant HA gene, which is derived from avian influenza virus, is provided. A DNA vaccine composition comprising: (a) the DNA vaccine; and (b) a booster is also provided. An influenza virus-like particle comprising adjuvant-fused M2 protein is further provided.
    Type: Application
    Filed: April 8, 2014
    Publication date: August 7, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Suh-Chin Wu, Wen-Chun Liu, Hung-Ju Wei
  • Patent number: 6762118
    Abstract: An integrated circuit package structure having an array of metal pegs connected by printed circuit lines. The package includes a die pad having a die positioned above and an area array distribution of external metal pegs surrounding the die. The package also contains a plurality of internal metal pegs that surround the die. These internal pegs are electrically connected to the bonding pads on the die via conductive medium. The die pad, the die, the conductive medium and the internal pegs are all enclosed by an insulating material. The bottom side of the die pad is exposed while the external metal pegs are electrically connected to various internal metal pegs using printed circuit lines. Furthermore, an electroplate layer is also formed on the end face of each metal peg.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: July 13, 2004
    Assignee: Walsin Advanced Electronics Ltd.
    Inventors: Wen-Chun Liu, Chien-Hung Lai
  • Publication number: 20030224542
    Abstract: A method for making multi-chip packages and single-chip packages simultaneously and structures thereof are provided. The method comprises the steps of chip-attaching, electrically connecting, encapsulating and electrically testing, all the step are executed on a package substrate with channel holes. The package substrate is selectively cut so as to form multi-chip packages and single-chip packages simultaneously. Each semiconductor package has a plurality of coplanar wiring substrates defined by the channel holes and selective cutting lines. A space between two adjacent wiring substrates is formed from corresponding channel hole and is filled with the isolating encapsulant so as to perform cushioning effect for reducing thermal stress and to improve the structure strength of the package assembly.
    Type: Application
    Filed: May 29, 2002
    Publication date: December 4, 2003
    Applicant: Walsin Advanced Electronics LTD
    Inventor: Wen-Chun Liu
  • Patent number: 6486564
    Abstract: An improved heat dissipation module for BGA IC's is a thin metal module used for heat dissipation in an encapsulated IC device. It has an annular base with several supports extending from its inner rim upwards to support a top plate. At least one protruding annular ring is provided on the top surface of the top plate. This design can ensure the top plate and a mold match during the capsulation process, avoid the glue overflow problem, and increase its total dissipation area to facilitate heat dissipation.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: November 26, 2002
    Assignee: Walsin Advanced Electronics Ltd.
    Inventors: Wen-Chun Liu, Yi-Hsiang Pan, Kuo-Yuan Lee
  • Publication number: 20020140113
    Abstract: A semiconductor die package has a lead frame, a die attached to the lead frame and an encapsulant enclosing the lead frame and the die. The distance between the top outside face of the encapsulant and the frame is substantially equal to the distance between the bottom outside face of the encapsulant and the die, and the distance between the top outside face of the encapsulant and the frame is substantially two and half times the distance between the bottom outside face of the encapsulant and the lead frame. Consequently, the different thickness of different encapsulant portions achieves an optimum balance during curing that effectively reduces the deformation of the encapsulant. In addition, the encapsulant can be completely formed by an injection process, and no crack will form in the encapsulant.
    Type: Application
    Filed: March 27, 2001
    Publication date: October 3, 2002
    Applicant: WALSIN ADVANCED ELECTRONICS LTD.
    Inventors: Wen-Chun Liu, Yung-Chao Jen, Ming-Feng Wu
  • Patent number: 6459162
    Abstract: A semiconductor die package has a lead frame, a die attached to the lead frame and an encapsulant enclosing the lead frame and the die. The distance between the top outside face of the encapsulant and the frame is substantially equal to the distance between the bottom outside face of the encapsulant and the die, and the distance between the top outside face of the encapsulant and the frame is substantially two and half times the distance between the bottom outside face of the encapsulant and the lead frame. Consequently, the different thickness of different encapsulant portions achieves an optimum balance during curing that effectively reduces the deformation of the encapsulant. In addition, the encapsulant can be completely formed by an injection process, and no crack will form in the encapsulant.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: October 1, 2002
    Assignee: Walsin Advanced Electronics Ltd.
    Inventors: Wen-Chun Liu, Yung-Chao Jen, Ming-Feng Wu
  • Publication number: 20020127976
    Abstract: An integral micro-speaker having bi-directional dual magnetic field loops is provided. In general, the integral micro-speaker is incorporated into a wireless communication device such as a wireless telephone or a mobile telephone. The integral micro-speaker serves as a receiver and a speaker in a wireless telephone. The integral micro-speaker may further incorporate a vibrator for producing an added vibration function to the wireless telephone. In other words, a receiver, a speaker and a vibrator may be combined together to form an integral component inside the wireless telephone.
    Type: Application
    Filed: March 9, 2001
    Publication date: September 12, 2002
    Inventor: Wen-Chun Liu
  • Publication number: 20020089053
    Abstract: An integrated circuit package structure having an array of metal pegs connected by printed circuit lines. The package includes a die pad having a die positioned above and an area array distribution of external metal pegs surrounding the die. The package also contains a plurality of internal metal pegs that surround the die. These internal pegs are electrically connected to the bonding pads on the die via conductive medium. The die pad, the die, the conductive medium and the internal pegs are all enclosed by an insulating material. The bottom side of the die pad is exposed while the external metal pegs are electrically connected to various internal metal pegs using printed circuit lines. Furthermore, an electroplate layer is also formed on the end face of each metal peg.
    Type: Application
    Filed: February 25, 2002
    Publication date: July 11, 2002
    Inventors: Wen-Chun Liu, Chien-Hung Lai
  • Patent number: 6380062
    Abstract: A method for forming ball grid array package. The ball grid array package has internal trace lines and exposed metal pegs. A metal substrate is provided. Electroplated layers are formed over metal peg regions and a die pad region on the surface of the metal substrate. A layer of substrate material at the top surface of the metal substrate is removed so that thickness of the metal substrate is reduced. Hence, trace lines, die pad and internal metal pegs are formed. A die is attached to the die pad and electrical connections from the die to the internal metal pegs are made. A molding process is carried out to enclose the die, the die pad and the internal metal pegs on one side of the metal substrate with plastic material. The lower surface of the metal substrate is etched to form external metal pegs while exposing the mold material and the bottom surface of the die pad. The internal metal pegs and the external metal pegs are interconnected via the trace lines.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: April 30, 2002
    Assignee: Walsin Advanced Electronics Ltd.
    Inventor: Wen-Chun Liu
  • Publication number: 20020020926
    Abstract: An improved heat dissipation module for BGA IC's is a thin metal module used for heat dissipation in an encapsulated IC device. It has an annular base with several supports extending from its inner rim upwards to support a top plate. At least one protruding annular ring is provided on the top surface of the top plate. This design can ensure the the top plate and a mold match during the capsulation process, avoid the glue overflow problem, and increase its total dissipation area to facilitate heat dissipation.
    Type: Application
    Filed: August 15, 2001
    Publication date: February 21, 2002
    Inventors: Wen-Chun Liu, Yi-Hsiang Pan, Kuo-Yuan Lee
  • Patent number: 6278182
    Abstract: A semiconductor package containing a silicon chip, a lead frame, a plurality of conductive wires, a heat sink and some packaging material. Both the silicon chip and the heat sink are mounted on the lead frame, and the silicon chip is located between the heat sink and the lead frame. The silicon chip is electrically connected to some contact points on the lead frame by a plurality of conductive wires, and the space between the heat sink and the lead frame is filled with packaging material. The heat sink has a narrow pinhole gate and a plurality of conical positioning holes. The pinhole gate is formed in the middle of the heat sink so that packaging material can enter the mold cavity in the middle through the roof of the package. Both the pinhole gate and the positioning holes are filled with packaging material.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: August 21, 2001
    Assignee: Walsin Advanced Electronics Ltd.
    Inventors: Wen-Chun Liu, Chien-Hung Lai
  • Patent number: 6262475
    Abstract: The addition of a heat slug to a lead frame establishes a heat conduction path from a silicon chip on the lead frame to the heat slug. Hence, when a semiconductor package that encloses the lead frame and the silicon chip is formed, heat produced by the silicon chip can still be channeled away through the radiating surface of the heat slug. Furthermore, the heat slug can be bent over to cover burrs outside the package.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: July 17, 2001
    Assignees: Walsin Advanced Electronics Ltd., Sitron Precision Co., Ltd.
    Inventors: Wen-Chun Liu, Chih-Kung Huang
  • Patent number: 6204553
    Abstract: A lead frame for a semiconductor package. The lead frame includes a die pad and a plurality of leads. One surface of the die pad supports a silicon chip while the other surface has a plurality of annular grooves all having the same geometric center. The inner lead portion of the leads surrounds the die pad, but the die pad and the leads are on different planar surfaces.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: March 20, 2001
    Assignee: Walsin Advanced Electronics Ltd.
    Inventors: Wen-Chun Liu, Hui-Ping Liu, Jung-Jie Liou, Yi-Hsiang Pan, Sheng-Tung Tsai
  • Patent number: 6078099
    Abstract: A lead frame structure can prevent the warping of a semiconductor package body. The lead frame has a downset die pad and upset internal leads so that packaging material can be evenly distributed both above and below the lead frame.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: June 20, 2000
    Assignee: Walsin Advanced Electronics LTD
    Inventors: Wen-Chun Liu, Jung-Jie Liou, Chih-Kung Huang