Patents by Inventor Wen Chung

Wen Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387613
    Abstract: The present disclosure, in some embodiments, relates to a capacitor structure. The capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A lower electrode is arranged along sidewalls and an upper surface of the lower dielectric structure, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is arranged along outermost sidewalls of the upper electrode. The spacer includes a first upper surface arranged along a first side of the upper electrode and a second upper surface arranged along an opposing second side of the upper electrode. The first upper surface has a different width than the second upper surface.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
  • Publication number: 20240388982
    Abstract: A user equipment (UE) is configured to implement selective call initiation delay responsive to detection of a contemporaneous handover process. When a user provides input indicating initiation of a packet-switched call, the UE determines whether there is a handover process ongoing. If not, a call initiation message (e.g., a SIP INVITE message) is transmitted without further delay. However, if a handover process is ongoing at the time of the user input, the UE refrains from promptly transmitting the call initiation message and starts a timer of a predetermined duration to provide additional time for the handover process to complete. Responsive to the timer expiring or to the handover process completing before the timer expires, the UE then promptly transmits the call initiation message to initiate establishment of the packet-switched call over whatever network to which the UE is currently attached.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 21, 2024
    Inventors: Han-Jung Chueh, Chi-Wen Chung, Chen-Chung Chang
  • Publication number: 20240387265
    Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.
    Type: Application
    Filed: July 28, 2024
    Publication date: November 21, 2024
    Inventors: Pin-Wen Chen, Chang-Ting Chung, Yi-Hsiang Chao, Yu-Ting Wen, Kai-Chieh Yang, Yu-Chen Ko, Peng-Hao Hsu, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20240387749
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Yu-Chu LIN, Wen-Chih CHIANG, Chi-Chung JEN, Ming-Hong SU, Mei-Chen SU, Chia-Wei LEE, Kuan-Wei SU, Chia-Ming PAN
  • Publication number: 20240387546
    Abstract: A semiconductor structure includes a first transistor and a second transistor. The first transistor includes a first fin structure and a first metal gate over the first fin structure. The first metal gate includes a first work function metal layer and a first gap-filling metal layer. The second transistor includes a second fin structure and a second metal gate over the second fin structure. The second metal gate includes a second work function metal layer and a second gap-filling metal layer. The first metal gate and the second metal gate provide a same work function. A width of the first metal gate is equal to a width of the second metal gate. A width of a top surface of the first gap-filling metal layer is greater than a width of a top surface of the second gap-filling metal layer.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 21, 2024
    Inventors: PO-YING CHANG, WEN-LANG WU, CHANG-TAI LEE, LI-CHUNG KUO, YUN-HAN LIN, CHEN-CHUAN YANG
  • Publication number: 20240384431
    Abstract: A method for colorizing an aluminum-containing object includes the steps of: (a) subjecting the aluminum-containing object to a first pretreatment, so as to remove contaminants from a surface thereof; and (b) subjecting the pretreated aluminum-containing object obtained in step (a) to an anodizing treatment which is accomplished by applying N cycles of periodic current signals, thereby forming an aluminum oxide film with a plurality of nanopores on the surface of the aluminum-containing object. In step (b), each cycle of the periodic current signals includes a first to fourth predetermined time periods. A colorized aluminum-containing object prepared by the aforesaid method is also provided.
    Type: Application
    Filed: May 16, 2024
    Publication date: November 21, 2024
    Applicant: Jabil Circuit (Singapore) Pte. Ltd.
    Inventors: Yi-Chung Su, Pen-Yi Liao, Chih-Hao Chen, Wen-Chia Tsai
  • Patent number: 12144112
    Abstract: A display panel and a manufacturing method thereof are provided. The display panel includes a substrate, an active element, a driving circuit element, a first connection circuit, a second connection circuit and a conductive connector. The substrate has a first surface and a second surface opposite to the first surface. The active element is disposed on the first surface. The driving circuit element is disposed on the second surface and is overlapped with the active element. The first connection circuit is disposed on the first surface and is connected to the active element. The second connection circuit is disposed on the second surface and is connected to the driving circuit element. The conductive connector penetrates through the substrate and two ends of the conductive connector are electrically connected to the first connection circuit and the second connection circuit, respectively.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: November 12, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Yi Jiun Wu, Wen-Chung Tang, Yung-Sheng Chang, Cheng-Hao Lee, Yu-Lin Hsu, Kuo-Hsing Cheng
  • Publication number: 20240371931
    Abstract: A semiconductor device includes a first semiconductor well. The semiconductor device includes a channel structure disposed above the first semiconductor well and extending along a first lateral direction. The semiconductor device includes a gate structure extending along a second lateral direction and straddling the channel structure. The semiconductor device includes a first epitaxial structure disposed on a first side of the channel structure. The semiconductor device includes a second epitaxial structure disposed on a second side of the channel structure, the first side and second side opposite to each other in the first lateral direction. The first epitaxial structure is electrically coupled to the first semiconductor well with a second semiconductor well in the first semiconductor well, and the second epitaxial structure is electrically isolated from the first semiconductor well with a dielectric layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Wen-Shen Chou, Yung-Chow Peng, Ya Yun Liu
  • Publication number: 20240360720
    Abstract: A cord divider is positioned on both sides of the cord winder of the control box of a cordless window curtain. Each cord divider is equipped with protrusions and crosspieces. When the cords are pulled out from the cord divider, the cords do not tangle or knot. The cords are wound up on the driving gear set, and the driving cord device prevents the cords from overlapping and causing uneven heights on both sides of the curtain. The use of cylinders in the cord dividers prevents excessive friction of the cords during use. There is no need to change the current cooperation way between the cords and the cord winder.
    Type: Application
    Filed: July 12, 2023
    Publication date: October 31, 2024
    Inventors: WEN YING LIANG, Sheng Ying HSU, Chien Chih HUANG, Wu Chung NIEN, Ming Chu CHIANG, Wei Ming SHIH
  • Publication number: 20240361355
    Abstract: A membrane probe card includes probes each having a base electrically connected with a trace of a membrane wiring structure, and a probe tip protruding from the base. The base has a tip placement section and an extension section, which extend from a first side edge to a second side edge of the base in order. The probe tip is made by laser processing and electroplating, located at the tip placement section, and provided with a fixed end portion connected with the base in a way that the width of the tip placement section is greater than the width of the fixed end portion. A distance from a center of the probe tip to the first side edge is less than a distance from the center of the probe tip to the second side edge. As such, requirements of fine pitch and probe height may be achieved.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 31, 2024
    Applicant: MPI CORPORATION
    Inventors: YU-SHAN HU, SHAO-LUN WEI, YU-WEN WANG, HAO-YU CHUNG
  • Patent number: 12129511
    Abstract: The present disclosure relates to methods, compositions, and kits for concentrating and purifying at least one target analyte from a clinical biological sample. In some embodiments, the methods involve one or more aqueous two-phase system (ATPS) compositions and at least one solid phase medium. Some embodiments provide a kit comprising one or more ATPS compositions, a binding buffer; and a solid phase medium. Other embodiments provide methods of treating cancers or infectious diseases in a patient in need thereof.
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: October 29, 2024
    Assignee: PHASE SCIENTIFIC INTERNATIONAL, LTD.
    Inventors: Cheuk Yiu Tenny Chung, Vasu Saini, Daniel William Bradbury, Harsha Madan Kittur, Masae Kobayashi Wen, Cheuk Yin Lam, Kar Kee Tse, Kit Cheung, Wing Yee Ng, Yin To Chiu, Garrett Lee Mosley
  • Patent number: 12132404
    Abstract: An isolated power supplies converts an input power source in a primary side into an output power source in a secondary side, capable of transmitting a signal from the secondary side to the primary side via a transformer. The transformer has a primary winding connected with a main switch, and a secondary winding connected with a secondary-side switch. A primary-side controller controls the main switch. A secondary-side controller controls the secondary-side switch and detects a demagnetization time of the transformer. Before the end of the demagnetization time, the secondary-side controller turns OFF the secondary-side switch to signal, via the transformer, the primary-side controller, which in response turns ON the main switch to operate the isolated power supply in a continuous-conduction mode or in a boundary mode.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: October 29, 2024
    Inventor: Wen-Chung Yeh
  • Publication number: 20240355630
    Abstract: A semiconductor structure including a pillar structure and a spacer structure is provided. The pillar structure is disposed over a substrate, and comprises: a lower layer, disposed on the substrate; an upper layer, disposed over the lower layer; and a dielectric layer, disposed between the lower layer and the upper layer, wherein the upper layer includes a first portion and a second portion disposed below and connecting the first portion. The spacer structure laterally surrounds the pillar structure, and comprises: an upper portion, surrounding the first portion of the upper layer; and a lower portion, disposed below and connecting the upper portion, wherein a first thickness of the upper portion is substantially greater than a second thickness of the lower portion. A method for manufacturing a semiconductor structure is also provided.
    Type: Application
    Filed: April 20, 2023
    Publication date: October 24, 2024
    Inventors: YU-CHUN SHEN, CHI-CHUNG JEN, KAI-HUNG HSIAO, SZU-HSIEN LEE, WEN-CHIH CHIANG
  • Patent number: 12125848
    Abstract: A semiconductor device structure includes a dielectric layer, a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall. The structure also includes a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall. The structure also includes an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The structure further includes a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: October 22, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Ching Wang, Chun-Chung Su, Chung-Wei Wu, Jon-Hsu Ho, Kuan-Lun Cheng, Wen-Hsing Hsieh, Wen-Yuan Chen, Zhi-Qiang Wu
  • Publication number: 20240347645
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.
    Type: Application
    Filed: June 24, 2024
    Publication date: October 17, 2024
    Inventors: Yu-Chu LIN, Wen-Chih CHIANG, Chi-Chung JEN, Ming-Hong SU, Mei-Chen SU, Chia-Wei LEE, Kuan-Wei SU, Chia-Ming PAN
  • Publication number: 20240343054
    Abstract: A digital inkjet transfer printing apparatus used for performing transfer printing on fabrics by virtue of digital inkjet printing is provided. The digital inkjet transfer printing apparatus includes: a blanket inkjet printing assembly, where the blanket inkjet printing assembly includes a digital inkjet machine for ejecting ink to a surface of a blanket to form an ink pattern; and a counterpressure transfer printing assembly, where the counterpressure transfer printing assembly includes a press roller and a back-up roller, the press roller generates a pressure towards the back-up roller when a fabric enters a transfer printing area between the press roller and the back-up roller to press a surface to be printed of the fabric against a surface of the blanket with the ink pattern, so as to transfer the ink pattern on the blanket to the surface to be printed of the fabric.
    Type: Application
    Filed: June 21, 2024
    Publication date: October 17, 2024
    Inventor: Po-Wen CHUNG
  • Publication number: 20240347359
    Abstract: A method includes: receiving at least one semiconductor wafer to a wafer carrier, wherein the wafer carrier has an inspection window arranged on a side of the wafer carrier; transporting the wafer carrier between a plurality of semiconductor tools; and in response to an emergent event, switching the inspection window to a transparent mode for a predetermined period.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 17, 2024
    Inventors: CHI JIA WANG, CHI-CHUNG JEN, KAI-HUNG HSIAO, HUI AN LI, WEN-CHIH CHIANG
  • Patent number: 12117043
    Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: October 15, 2024
    Assignee: Toyo Nano System Corporation
    Inventors: Kun-Cheng Tseng, Kuei-Tun Teng, Wei-Chih Chen, Wen-Chung Lin
  • Publication number: 20240337150
    Abstract: A method for forming a honeycomb curtain and includes a weaving process, a fixing process, a gluing process, a stacking process and a cutting process. The honeycomb curtain includes multiple netted tubes, and each netted tube includes an upper portion and a lower portion. The central portion of each of the upper and lower portions is woven to form a tight-woven structure. Two sides of each of the central portions are woven to form a sparse-woven structure to form the upper portion to be a breathable first semi-transparent strip and to form the lower portion to be a second semi-transparent strip. The outer corner of each of the upper and lower portions are woven to form another tight-woven structure. The central portions of each of the netted tubes are applied with glue on respective outer face thereof. The netted tubes are stacked and pressed to form a layered structure.
    Type: Application
    Filed: November 28, 2023
    Publication date: October 10, 2024
    Inventors: WEN YING LIANG, Sheng Ying HSU, Chien Chih HUANG, Wu Chung NIEN, Ming Chu CHIANG, Wei Ming SHIH
  • Patent number: 12113135
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: October 8, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chu Lin, Wen-Chih Chiang, Chi-Chung Jen, Ming-Hong Su, Mei-Chen Su, Chia-Wei Lee, Kuan-Wei Su, Chia-Ming Pan