Abstract: A liquid crystal display (LCD) panel divided into a first area and a second area is provided. The first and second areas both include first sub-pixels and second sub-pixels. Each first sub-pixel provides a first main alignment vector; each second sub-pixel provides a second main alignment vector having a direction opposite to that of the first main alignment vector. The LCD panel has first sub-pixel units and second sub-pixel units arranged in arrays. Each first sub-pixel unit includes one first sub-pixel and one second sub-pixel sequentially arranged from top to bottom in a column direction. Each second sub-pixel unit includes one first sub-pixel and one second sub-pixel sequentially arranged from bottom to top in the column direction. In any one of the first area and the second area, multiple first sub-pixel units and multiple second sub-pixel units are arranged together in a same row.

Abstract: A pixel structure includes a scan line, a data line, a driving device, a first pixel electrode, an insulating layer and a second pixel electrode. The driving device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the driving device. The insulating layer covers the first pixel electrode. The second pixel electrode is disposed on the insulating layer. The second pixel electrode is electrically connected to the driving device and is not directly connected to or not contacted with the first pixel electrode.

Abstract: An exemplary pixel circuit and a flat display panel using the same are provided. The pixel circuit includes three sub-electrode control circuits. The sub-electrode control circuits are controlled by two scan lines to receive data transmitted from two data lines. One of the three sub-electrode control circuits adjusts stored data by charge sharing. Accordingly, a display control of the pixel circuit is achieved by the three sub-electrode control circuits.

Abstract: A method for driving a pixel is provided. The method includes determining a first predetermined gray-level and a second predetermined gray-level which are corresponding to a target gray-level according to the target gray-level of the pixel, wherein an equivalent gray-level corresponding to the first predetermined gray-level and the second predetermined gray-level is equal to the target gray-level, thereafter, generating a first driving voltage and a second driving voltage according to the first predetermined gray-level and the second predetermined gray-level for respectively driving a first sub-pixel and a second sub-pixel within the pixel during a frame period. The first driving voltage is greater than the second driving voltage when the equivalent gray-level is small than a first setting gray-level; the first driving voltage is small than the second driving voltage when the equivalent gray-level is greater than the first setting gray-level.

Abstract: A display apparatus includes a display panel disposed between a first polarizer and a second polarizer and having at least one first area and at least one second area. A first light-transmission axis direction of the first polarizer is substantially perpendicular to a second light-transmission axis direction of the second polarizer. The first light-transmission axis direction intersects a horizontal axis direction by about 45 degrees. When the display panel is in a narrow viewing angle display mode, the first and second areas have different brightness in a side viewing angle direction but have the same brightness in and around a normal viewing angle direction. When the display panel is in a wide viewing angle display mode, the first and second areas have substantially the same brightness in various viewing angle directions.

Abstract: A liquid crystal display panel divided into a first and a second regions respectively having a plurality of sub-pixels arranged in array is provided. Each sub-pixel has a first display area providing a first main alignment vector, a second display area providing a second main alignment vector, and a compensation display area. A direction of the first main alignment vector is opposite to that of the second main alignment vector. When the liquid crystal display panel states in the narrow viewing angle display mode, driving voltages of the first display areas in the first region are substantially greater than driving voltages of the second display areas in the first region, driving voltages of the first display areas in the second region are smaller than driving voltages of the second display areas in the second region, and all the compensation display areas in the first and the second regions are enabled.

Abstract: A liquid crystal display (LCD) panel is provided. A pixel structure of the LCD panel has an asymmetrical liquid crystal alignment. The LCD panel is divided into an array of display blocks. When the LCD panel is in a narrow viewing angle display mode, some of the display blocks are disabled or darkened so that a displayed image is interfered by the disabled or darkened display blocks when it is viewed from the side. Thereby, an anti-peep effect is achieved.

Abstract: A pixel array, a pixel structure, and a driving method of a pixel structure are provided. The pixel structure includes a first scan line, a second scan line, a first common electrode line, a data line, a first active device, a second device, a first pixel electrode, and a second pixel electrode. The data line is intersected with the first scan line and the second scan line. The first active device is driven by the first scan line and connected to the data line. The second active device is driven by the second scan line and connected to the first common electrode line. The first pixel electrode is electrically connected to the data line through the first active device. The second pixel electrode is electrically connected to the data line through the first active device and electrically connected to the first common electrode line through the second active device.

Abstract: A pixel structure electrically connected to a data line and a scan line, and including a first and a second active device, a first and a second pixel electrode, and a first and a second capacitance electrode is provided. The first pixel electrode electrically connected to the first active device includes a first and a second electrode block electrically connected to each other. The second pixel electrode electrically connected to the second active device is electrically insulated from the first pixel electrode and separates the first and the second electrode block. The first pixel electrode respectively forms a first and a second capacitor with the first and the second capacitance electrode. The second pixel electrode respectively forms a third and a fourth capacitor with the first and the second capacitance electrode. The first and the second capacitor have different capacitances. The third and the fourth capacitor have different capacitances.

Abstract: A pixel array including first scan lines, second scan lines, data lines, sub-pixels, and common lines is provided. Each of the sub-pixels includes a first switch, a second switch, a first pixel electrode, a second pixel electrode, and a third switch. The first switch and the second switch are electrically connected to the same scan line and same data line, the first pixel electrode is electrically connected to the first switch, the second pixel electrode is electrically connected to the second switch, and the first pixel electrode and the second pixel electrode are disposed at opposite sides of the first scan line. Furthermore, the third switch has a capacitance coupling portion extending under the first pixel electrode in the neighboring sub-pixel such that a voltage adjusting capacitor is formed by the capacitance coupling portion and one of the common lines in the neighboring sub-pixel.

Abstract: A driving method for a liquid crystal display includes providing a first gate pulse to a first gate line for driving adjacent first and second subpixels to perform charging operations, providing a second gate pulse to a second gate line for driving adjacent third and fourth subpixels to perform charging operations, providing a third gate pulse to a third gate line for driving the second subpixel to perform a charge-sharing operation, and providing a fourth gate pulse to a fourth gate line for driving the fourth subpixel to perform a charge-sharing operation. The first and second gate lines are spaced out at least one gate line. The third gate line is adjacent to the first gate line. The fourth gate line is adjacent to the second gate line. The first gate pulse, the second gate pulse, the third gate pulse and the fourth gate pulse are sequentially triggered.

Abstract: A pixel structure electrically connected to a data line and a scan line, and including a first and a second active device, a first and a second pixel electrode, and a first and a second capacitance electrode is provided. The first pixel electrode electrically connected to the first active device includes a first and a second electrode block electrically connected to each other. The second pixel electrode electrically connected to the second active device is electrically insulated from the first pixel electrode and separates the first and the second electrode block. The first pixel electrode respectively forms a first and a second capacitor with the first and the second capacitance electrode. The second pixel electrode respectively forms a third and a fourth capacitor with the first and the second capacitance electrode. The first and the second capacitor have different capacitances. The third and the fourth capacitor have different capacitances.

Abstract: A pixel structure including a substrate, a scan line, a data line, an active device, a capacitor electrode and a pixel electrode is described. The substrate has a pixel region. The active device is electrically connected to the scan line and the data line. The capacitor electrode is disposed on the substrate. The pixel electrode is disposed in the pixel region and electrically connected to the active device, wherein the pixel electrode includes a first extending part, a second extending part and branches. The first extending part is disposed above the capacitor electrode and electrically coupling with the capacitor electrode, wherein the capacitor electrode is not completely covered by the first extending part. The second extending part has an extending direction different from that of the first extending part. The branches extend from the first extending part and the second extending part to an edge of the pixel region.

Abstract: A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a plurality of first regions and a plurality of second regions. The first regions and the second regions are formed on the first substrate and the second substrate. In a narrow viewing mode, the luminous flux of the first regions along a first viewing direction is different from that of the first regions along a second viewing direction opposite to the first viewing direction, and the luminous flux of the second regions along the first viewing direction is substantially different from that of the first regions along the first viewing direction.

Abstract: A pixel array including a plurality of scan lines, data lines, and sub-pixels is provided. Each of the sub-pixels arranged in the nth row includes a first switch, a first pixel electrode, a second switch, a third switch, and a second pixel electrode. The first switch and the second switch are electrically connected to the nth scan line and the mth data line. The first switch and the first pixel electrode are electrically connected. The second switch has a first signal output terminal. The third switch is electrically connected to the (n+i)th scan line. The third switch has a signal input terminal electrically connected to the first signal output terminal and a second signal output terminal. The first signal output terminal is electrically insulated from the first pixel electrode and the second pixel electrode. The first signal output terminal extends to the underneath of the second pixel electrode.

Abstract: A viewing angle switchable liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a plurality of color sub-pixels and a plurality of viewing angle control (VAC) pixels. The liquid crystal layer includes liquid crystal molecules sandwiched between the first substrate and the second substrate. The liquid crystal molecules of each color sub-pixel include twisted nematic liquid crystal molecules. Each of the color sub-pixels includes a first pixel electrode disposed on an inner surface of the first substrate, and a second pixel electrode disposed on an inner surface of the second substrate. Each of the viewing angle control pixels includes a first electrode and a second electrode disposed on the inner surface of the first substrate, and a third electrode disposed on the inner surface of the second substrate.

Abstract: A liquid crystal display panel including an active device array substrate, an opposite substrate, and a liquid crystal layer is provided. The active device array substrate includes a plurality of pixel electrodes and each of the pixel electrodes includes a plurality of sets of stripe patterns extending along different directions. Each of the stripe patterns has a width of L and a space between two neighboring stripe patterns is S. The opposite substrate is disposed over the active device array substrate. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate. A cell gap between the active device array substrate and the opposite substrate is d, birefringence of the liquid crystal layer is ?n, and dielectric anisotropy of the liquid crystal layer is ??, wherein S, d, ?n, and ?? comply with the inequality: S/|??|?2.8×?n×d.

Abstract: A pixel array including first scan lines, second scan lines, data lines, and sub-pixels is provided. Each sub-pixel includes a first switch, a second switch, a first pixel electrode electrically connected to the first switch, a second pixel electrode electrically connected to the second switch, a third switch, and common lines connected with each other and disposed under the first and the second pixel electrode. The first and the second switch are electrically connected to the same first scan line and data line. The first scan line is located between the first and second pixel electrode. The third switch is electrically connected to the second scan line and the first pixel electrode and has a floating terminal. The floating terminal is capacitively coupled to the common line under the second pixel electrode to form a capacitor.

Abstract: A three-dimensional (3D) display including a display panel and a phase retardation film is provided. The display panel has a plurality of first pixel regions and a plurality of second pixel regions that are arranged as an array. The phase retardation film is disposed on the surface of the display panel. The phase retardation film has a plurality of first retardation regions and a plurality of second retardation regions that are alternately arranged. The first retardation regions have the same phase retardation, the second retardation regions have the same phase retardation, and the phase retardation of the first retardation regions is different from that of the second retardation regions. All the regions of the phase retardation film have the same transmittance. A display method adaptable to the 3D display is also provided.