Abstract: Provided are integrated circuit packages and methods of forming the same. An integrated circuit package includes at least one first die, a plurality of bumps, a second die and a dielectric layer. The bumps are electrically connected to the at least one first die at a first side of the at least one first die. The second die is electrically connected to the at least one first die at a second side of the at least one first die. The second side is opposite to the first side of the at least one first die. The dielectric layer is disposed between the at least one first die and the second die and covers a sidewall of the at least one first die.

Abstract: Semiconductor devices and methods of manufacture are presented in which spacers are manufactured on sidewalls of gates for semiconductor devices. In embodiments the spacers comprise a first seal, a second seal, and a contact etch stop layer, in which the first seal comprises a first shell along with a first bulk material, the second seal comprises a second shell along with a second bulk material, and the contact etch stop layer comprises a third bulk material and a second dielectric material.

Abstract: An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.

Abstract: A method includes forming a seed layer over a first conductive feature of a wafer, forming a patterned plating mask on the seed layer, and plating a second conductive feature in an opening in the patterned plating mask. The plating includes performing a plurality of plating cycles, with each of the plurality of plating cycles including a first plating process performed using a first plating current density, and a second plating process performed using a second plating current density lower than the first plating current density. The patterned plating mask is then removed, and the seed layer is etched.

Abstract: In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.

Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.

Abstract: This disclosure relates to a thin pump including a case, a rotor, and a stator. The case has a bottom surface, a lower chamber, an upper chamber, and an accommodation space. The upper chamber is located further away from the bottom surface than the lower chamber. The upper chamber has two opposite ends respectively in fluid communication with the lower chamber and the accommodation space. The rotor includes an impeller and a magnet. The impeller is rotatably disposed in the lower chamber of the case. The magnet is disposed on the impeller. The stator is disposed in the case. The stator corresponds to the magnet of the rotor so as to drive the rotor to rotate with respect to the case.

Abstract: The present disclosure generally provides an apparatus and method for gas diffuser support structure for a vacuum chamber. The gas diffuser support structure comprises a backing plate having a central bore, and a gas deflector having a length and a width unequal to the length coupled to the backing plate by a plurality of outward fasteners coupled to a plurality of outward threaded holes formed in the backing plate, in which a spacer is disposed between the backing plate and the gas deflector, and in which a length to width ratio of the gas deflector is about 0.1:1 to about 10:1.

Abstract: Embodiments described herein relate to a device including a substrate, a plurality of adjacent pixel-defining layer (PDL) structures disposed over the substrate, and a plurality of sub-pixels. Each sub-pixel includes adjacent first overhangs, adjacent second overhangs, an anode, a hole injection layer (HIL) material, an additional organic light emitting diode (OLED) material, and a cathode. Each first overhang is defined by a body structure disposed on and extending laterally past a base structure disposed on the PDL structure. Each second overhang is defined by a top structure disposed on and extending laterally past the body structure. The HIL material is disposed over and in contact with the anode and disposed under the adjacent first overhangs. The additional OLED material is disposed on the HIL material and extends under the first overhang.

Abstract: Embodiments described herein relate to a device comprising a substrate, a pixel-defining layer (PDL) structures disposed over the substrate and defining sub-pixels of the device, and a plurality overhang structures. Each overhang structure is defined by a top structure extending laterally past a body structure. Each body structure is disposed over an upper surface of each PDL structure. Overhang structures define a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The OLED materials are disposed over the first anode and extends under the overhang structures. The cathodes are disposed over the OLED materials and under the overhang structures. The encapsulation layers are disposed over the first cathode. The first encapsulation layer has a first thickness and the second encapsulation layer has a second thickness different from the first thickness.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate. The backplate comprises a backplate conductive layer and a backplate insulating layer stacked with each other. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate and extending across the opening portion of the substrate. The MEMS structure further includes a pillar structure connected with the backplate. The pillar structure comprises a pillar conductive layer and a pillar insulating layer stacked with each other.

Abstract: An electronic device includes a circuit structure including: a first insulation layer including a first opening; a second insulation layer disposed in the first opening and including a second opening; a conductive connection layer disposed in the second opening; and a first conductive layer and a second conductive layer respectively disposed on a surface and another surface of the first insulation layer. The first and the second conductive layer are electrically connected through the conductive connection layer, and the Young's modulus of the second insulation layer is less than the Young's modulus of the first insulation layer. In a cross-section of the electronic device, a center of the second opening and an outer surface of the second insulation layer are separated by a first distance X1, and a maximum width W of the second opening and the first distance X1 conform to the following formula: 1 . 5 ? W ? X 1 < 3 ? W .

Abstract: Managing a battery including measuring, in response to a first charging current and over a first time period, a first amperage and a first voltage of the cell at predetermined intervals; measuring, in response to a second charging current and over a second time period, a second amperage and a second voltage of the cell at the predetermined intervals; determining that the first amperage of the cell was maintained greater than a first threshold amount of time within the first time period, and in response, qualifying the first amperage and the first voltage as stable; determining that the second amperage of the cell was maintained greater than a second threshold amount of time within the second time period, and in response, qualifying the second amperage and the second voltage as stable; and in response to the qualifying, calculating a DCIR of the cell based on the voltages and the amperage.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate and having acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate and extending across the opening portion of the substrate. The diaphragm includes a ventilation hole, and an air gap is formed between the diaphragm and the backplate. The MEMS structure further includes a filler structure disposed on the diaphragm, and a portion of the filler structure is disposed in the ventilation hole.

Abstract: An electronic device, including a sensing substrate, a scintillator layer, and an adjustable reflective layer, is provided. The scintillator layer is disposed on the sensing substrate. The adjustable reflective layer is disposed on the sensing substrate and includes a first electrode, a second electrode, and an electrophoretic layer. The first electrode is disposed on the scintillator layer. The second electrode is disposed on the first electrode. The electrophoretic layer is disposed between the first electrode and the second electrode. The second electrode surrounds the scintillator layer.

Abstract: A backlight module includes a light guide plate, a light source, a first prism sheet, and a second prism sheet. The light source is disposed on a light incident surface of the light guide plate. The first prism sheet is disposed on a side of a light exiting surface of the light guide plate and has multiple first prism structures facing the light guide plate. The second prism sheet has multiple second prism structures facing the light guide plate. An included angle between an extending direction of the first prism structures and an extending direction of the second prism structures is greater than or equal to 85 degrees and less than or equal to 95 degrees. An included angle between the extending direction of the second prism structures and the light incident surface is greater than or equal to 85 degrees and less than or equal to 95 degrees.

Abstract: A method of forming a semiconductor device includes: forming a dummy gate structure over a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate, where the nanostructure comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the nanostructure on opposing sides of the dummy gate structure, the openings exposing end portions of the first semiconductor material and end portions of the second semiconductor material; recessing the exposed end portions of the first semiconductor material to form first sidewall recesses; filling the first sidewall recesses with a multi-layer spacer film; removing at least one sublayer of the multi-layer spacer film to form second sidewall recesses; and forming source/drain regions in the openings after removing at least one sublayer, where the source/drain regions seal the second sidewall recesses to form sealed air gaps.

Abstract: A stereo image generation method and an electronic apparatus using the same are provided. The stereo image generation method includes the following steps. A two-dimensional (2D) original image corresponding to a first viewing angle is obtained, and a depth map of the 2D original image is estimated. Interpupillary distance information of a user is detected. A pixel shift processing is performed on the 2D original image according to the interpupillary distance information and the depth map to generate a reference image corresponding to a second viewing angle. An image inpainting processing is performed on the reference image to obtain a restored image. The restored image and the 2D original image are merged to generate a stereo image conforming to a stereo image format.

Abstract: The present disclosure is directed to a fluid head that is configured to eject a first fluid (e.g., a liquid state fluid) and a second fluid (e.g., a gaseous state fluid). The fluid head is movable in a rotatable-fashion and a translatable-fashion such that the fluid head may be utilized to increase a speed and decrease a period of time for cleaning and drying a workpiece after an electro-chemical polishing (ECP) process or step. The fluid head may also be utilized to increase a speed and decrease a period of time for beveling an edge of a conductive layer on the workpiece. The present disclosure is also directed to methods for cleaning and drying the workpiece as well as beveling the conductive layer of the workpiece utilizing the fluid head.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.