Patents by Inventor Wen-Hsien Tseng

Wen-Hsien Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12154924
    Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20240379670
    Abstract: A semiconductor device includes a substrate with a high voltage region and a low voltage region. A first deep trench isolation is disposed within the high voltage region. The first deep trench isolation includes a first deep trench and a first insulating layer filling the first deep trench. The first deep trench includes a first sidewall and a second sidewall facing the first sidewall. The first sidewall is formed by a first plane and a second plane. The edge of the first plane connects to the edge of the second plane. The slope of the first plane is different from the slope of the second plane.
    Type: Application
    Filed: June 6, 2023
    Publication date: November 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Ting Hu, Chih-Yi Wang, Yao-Jhan Wang, Wei-Che Chen, Kun-Szu Tseng, Yun-Yang He, Wen-Liang Huang, Lung-En Kuo, Po-Tsang Chen, Po-Chang Lin, Ying-Hsien Chen
  • Publication number: 20240363668
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes at least one device on a front side of a semiconductor substrate. A plurality of grating layers are under the at least one device. The plurality of grating layers include at least a first material having a first refractive index alternating with a second material having a second refractive index. Contacts extend through an interlevel dielectric material, and further extend through the semiconductor substrate, to directly contact at least one of the first material and the second material below the at least one device and below the semiconductor substrate underlying the interlevel dielectric material.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20240355960
    Abstract: A light emitting element substrate includes a substrate and a light emitting element disposed on the substrate and including first and second semiconductor layers, an active layer, first and second electrodes, and first and second solders. The second semiconductor layer is disposed opposite to the first semiconductor layer. The active layer is disposed between the first and second semiconductor layers. The first and second electrodes are electrically connected to the first and second semiconductor layers respectively. The first and second solders are respectively disposed on and electrically connected to the first and second electrodes respectively. The first electrode includes a first under barrier pattern. The first solder covers the first under barrier pattern. A projection area of the first solder on the substrate is greater than a projection area of the first under barrier pattern on the substrate. A display apparatus is provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: October 24, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20240355983
    Abstract: A display apparatus includes a driving backplane and a light emitting component. The driving backplane has a first pad and a second pad. The light emitting component is disposed on the driving backplane. The light emitting component includes a first semiconductor layer, a second semiconductor layer, an active layer, a first electrode, a second electrode, a first solder and a second solder. The first solder and the second solder of the light-emitting component are respectively disposed on the first pad and the second pad of the driving backplane and electrically connected to the first pad and the second pad respectively. A volume of the first solder is larger than a volume of the second solder, and an area of the first pad is smaller than an area of the second pad.
    Type: Application
    Filed: December 13, 2023
    Publication date: October 24, 2024
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20240332049
    Abstract: A device of mass transferring chips includes a first substrate, which includes a chip-connecting area configured to connect a chip. The device further includes a second substrate, which includes a support layer and a first adhesive layer. The chip is between the first substrate and the second substrate. The first adhesive layer includes a first surface, a second surface, and a patterned recess. The first surface has a chip-receiving area configured to attach the chip from the first substrate. The second surface is opposite to the first surface and is in contact with a first side of the support layer. The patterned recess is disposed on the first surface and spaced apart from the chip-receiving area.
    Type: Application
    Filed: June 14, 2024
    Publication date: October 3, 2024
    Inventors: Wei-Chieh CHEN, Kuan-Yi LEE, Wen-Hsien TSENG
  • Patent number: 12095019
    Abstract: A display device includes a light emitting element, an adhesive barrier wall and an array substrate. The light emitting element includes a first contact and a second contact disposed on a first surface of the light emitting element. The adhesive barrier wall is disposed on the first surface of the light emitting element and includes a first portion between the first contact and the second contact. The array substrate includes a first pad and a second pad disposed on a second surface of the array substrate. The first contact and the second contact of the light emitting element are respectively connected to the first pad and the second pad.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: September 17, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng
  • Publication number: 20240285135
    Abstract: A dust suction device includes a dust collection barrel, a supporting ring and a dust suction assembly, the barrel includes an inner space, an assembling opening communicating with the space, and at least two connectors disposed on the barrel, the opening has an opening diameter. The ring is placed at the opening, and has a ring outer diameter larger than the opening diameter, and a ring inner diameter. The assembly includes a shell and at least two connecting structures formed on an outer surface of the shell and used to restrict the assembly from separating from the barrel, the shell has at least one shell outer diameter smaller than the opening diameter, but larger than the ring inner diameter, the assembly has a use state by using the ring as a base and stacked above the barrel, and a storage state of being placed in the space.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 29, 2024
    Inventors: Ding-Yao CHENG, Huan-Chun TSENG, Wen-Hsien SU
  • Patent number: 12057527
    Abstract: A light emitting diode includes a first semiconductor layer, a second semiconductor layer, a first pad, a second pad, and a protection bump. The first semiconductor layer and the second semiconductor layer are overlapping with each other. An area of a first surface of the first semiconductor layer is larger than an area of a second surface of the second semiconductor layer. The first surface faces the second surface. The first pad is electrically connected to the first semiconductor layer. The second pad is electrically connected to the second semiconductor layer. The protection bump is located between the first pad and the second pad.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: August 6, 2024
    Assignee: Au Optronics Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng
  • Patent number: 12046496
    Abstract: A device of mass transferring chips includes a first substrate, which includes a first surface with a chip-connecting area configured to attach a chip, a second surface opposite to the first surface, and a patterned recess. The patterned recess is disposed on the first surface or the second surface. A projection of at least a portion of the patterned recess on the first surface is spaced apart from the chip-connecting area. The device further includes a second substrate with a third surface. The third surface has a chip-receiving area configured to attach the chip from the first substrate.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: July 23, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Wei-Chieh Chen, Kuan-Yi Lee, Wen-Hsien Tseng
  • Publication number: 20240204037
    Abstract: A display device includes a circuit substrate, a plurality of first pads, a plurality of light-emitting elements, an encapsulation layer and a conductive layer. The plurality of first pads is disposed on the circuit substrate. The plurality of light-emitting elements is disposed above the circuit substrate, and each light-emitting element includes a first electrode, a second electrode, and a light-emitting stack located between the first electrode and the second electrode, wherein the first electrodes of the plurality of light-emitting elements are disposed respectively between the light-emitting stacks of the plurality of light-emitting elements and the circuit substrate and electrically connected to the plurality of first pads respectively. The encapsulation layer is disposed on the circuit substrate and between the light-emitting elements. The conductive layer is disposed at an upper surface of the encapsulation layer and electrically connected to the second electrode.
    Type: Application
    Filed: December 29, 2022
    Publication date: June 20, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo
  • Publication number: 20240162402
    Abstract: A display device includes a circuit substrate, a plurality of pad sets and a plurality of light-emitting elements. The plurality of pad sets is disposed on the circuit substrate, and each pad set includes a first pad and a second pad surrounding the first pad. The plurality of light-emitting elements is disposed above the circuit substrate, and each light-emitting element includes a first electrode, a second electrode and a light-emitting stack between the first electrode and the second electrode, wherein the first electrode is electrically connected to the first pad, the second electrode is electrically connected to the second pad, and an orthographic projection of the second electrode on the circuit substrate is overlapped with an orthographic projection of the first pad on the circuit substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo
  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Patent number: 11703732
    Abstract: A pixel array substrate including a substrate, multiple insulation patterns, multiple signal lines, and multiple pixel structures is provided. The insulation patterns are disposed on the substrate, and each has at least one recess structure. The signal lines are respectively disposed on the insulation patterns and are respectively filled in the at least one recess structure of one of the insulation patterns. The pixel structures are disposed on the substrate and are electrically connected to the signal lines. A pixel array substrate further including multiple conductive patterns is also disposed.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: July 18, 2023
    Assignee: Au Optronics Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng
  • Publication number: 20230123551
    Abstract: A sterilization method for a vehicle sterilization system, comprising: receiving a detection signal, and determining whether a seat cushion of a vehicle covers a space of a compartment according to a voltage level of the detection signal; when the seat cushion does not completely cover the space of the compartment, controlling a power supply unit to stop supplying power; when the seat cushion covers the space of the compartment, controlling the power supply unit to supply power to a sterilization device.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 20, 2023
    Inventors: Hok-Sum Horace Luke, Chun-Jen Tsai, Chih-Yuan Chen, Ching-Chang Ni, Wen-Hsien Tseng
  • Publication number: 20220376151
    Abstract: A display device includes a light emitting element, an adhesive barrier wall and an array substrate. The light emitting element includes a first contact and a second contact disposed on a first surface of the light emitting element. The adhesive barrier wall is disposed on the first surface of the light emitting element and includes a first portion between the first contact and the second contact. The array substrate includes a first pad and a second pad disposed on a second surface of the array substrate. The first contact and the second contact of the light emitting element are respectively connected to the first pad and the second pad.
    Type: Application
    Filed: October 25, 2021
    Publication date: November 24, 2022
    Inventors: Chia-Hui PAI, Wen-Hsien TSENG
  • Publication number: 20220367758
    Abstract: A light emitting diode includes a first semiconductor layer, a second semiconductor layer, a first pad, a second pad, and a protection bump. The first semiconductor layer and the second semiconductor layer are overlapping with each other. An area of a first surface of the first semiconductor layer is larger than an area of a second surface of the second semiconductor layer. The first surface faces the second surface. The first pad is electrically connected to the first semiconductor layer. The second pad is electrically connected to the second semiconductor layer. The protection bump is located between the first pad and the second pad.
    Type: Application
    Filed: October 19, 2021
    Publication date: November 17, 2022
    Applicant: Au Optronics Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng
  • Publication number: 20220359249
    Abstract: A device of mass transferring chips includes a first substrate, which includes a first surface with a chip-connecting area configured to attach a chip, a second surface opposite to the first surface, and a patterned recess. The patterned recess is disposed on the first surface or the second surface. A projection of at least a portion of the patterned recess on the first surface is spaced apart from the chip-connecting area. The device further includes a second substrate with a third surface. The third surface has a chip-receiving area configured to attach the chip from the first substrate.
    Type: Application
    Filed: September 22, 2021
    Publication date: November 10, 2022
    Inventors: Wei-Chieh CHEN, Kuan-Yi LEE, Wen-Hsien TSENG
  • Publication number: 20220206350
    Abstract: A pixel array substrate including a substrate, multiple insulation patterns, multiple signal lines, and multiple pixel structures is provided. The insulation patterns are disposed on the substrate, and each has at least one recess structure. The signal lines are respectively disposed on the insulation patterns and are respectively filled in the at least one recess structure of one of the insulation patterns. The pixel structures are disposed on the substrate and are electrically connected to the signal lines. A pixel array substrate further including multiple conductive patterns is also disposed.
    Type: Application
    Filed: November 4, 2021
    Publication date: June 30, 2022
    Applicant: Au Optronics Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng
  • Patent number: D1030614
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: June 11, 2024
    Assignee: Gogoro Inc.
    Inventors: Ching-Chang Ni, Wen-Hsien Tseng