Abstract: An optical module includes a base, a holding component, an optical element, and at least one detachable structure. The holding component is disposed on the base, in which a position of the holding component relative to the base along a first axial direction is adjustable. The optical element is disposed on the holding component. The detachable structure is extended from one of the base and the holding component to face another one of the base and the holding component, so as to limit a position of the holding component relative to the base along a second axial direction.

Abstract: The invention provides a chassis structure, a server, and a method of dissipating heat from server. The chassis structure comprises chassis body, two fan components, two tray components, and a power supply. The chassis body defines a receiving space bounded by two spaced partitions, the two partitions divide the receiving space into a middle cavity and two side cavities. The fan components are at one end of each side cavity and are connected to the chassis body. The two tray components carry slots for inserting hard disks. The power supply is arranged in the middle cavity and supplies power to the hard disks inserted in the slots, the power supply also has a fan, the power supply positioned at one end of the middle cavity.

Abstract: A security context update method and a communication apparatus are provided. The method is performed by a terminal, and includes: storing a security context of first access and a security context of second access when the first access of the terminal and the second access of the terminal enter a deregistered state. The first access is one of 3GPP access and non-3GPP access, the second access is the other of the 3GPP access and the non-3GPP access, and the first access and the second access are different. According to the method, when the terminal supports multiple records for multiple registration, storage occasions of NAS security contexts corresponding to the 3GPP access and the non-3GPP access are provided.

Abstract: The present invention discloses a regulator. The regulator includes a bias voltage generating circuit and a flipped voltage follower (FVF), wherein the bias voltage generating circuit is configured to generate a bias voltage, and the FVF is configured to generate an output voltage according to the bias voltage and a supply voltage. The FVF includes a first P-type transistor and a first N-type transistor. The P-type transistor is configured to receive the bias voltage via a gate electrode of the P-type transistor, to generate the output voltage on a source electrode of the P-type transistor. A drain electrode of the first N-type transistor is connected to the supply voltage, a source electrode of the first N-type transistor is connected to the source electrode of the first P-type transistor, and a gate electrode of the first N-type transistor receives a driving signal for compensating the output voltage.

Abstract: An optical module includes a base, a holding component, an optical element, and at least one detachable structure. The holding component is disposed on the base, in which a position of the holding component relative to the base along a first axial direction is adjustable. The optical element is disposed on the holding component. The detachable structure is extended from one of the base and the holding component to face another one of the base and the holding component, so as to limit a position of the holding component relative to the base along a second axial direction.

Abstract: A chassis with built-in handles which do not add to dimensional clearance required for the chassis to be placed in a cavity includes a side plate, a mounting unit, and a handle. A mounting groove is defined on the side plate. The mounting unit is coupled to the side plate. The handle is partially clamped by the side plate and the mounting unit, and rotatably coupled with the side plate. By rotating the handle, the handle can be stored at least flush in the mounting groove.

Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

Abstract: A locking assembly can lock a workpiece. The workpiece includes a locking hole. The locking assembly includes a housing, a movable component, and an unlocking handle. The movable component includes a sleeve, a pin, and an unlocking cover. The sleeve is mounted on the housing. The pin is accommodated in the sleeve, and a portion of the pin protrudes from the housing and accommodated in the locking hole. The unlocking cover is fixed to the pin. The unlocking handle is disposed between the unlocking cover and the sleeve. The unlocking cover can be pulled from a first direction to move the pin out of the locking hole; or the unlocking handle can be pulled from a second direction intersecting with the first direction, and the unlocking handle can abut against the unlocking cover to drive the pin to move out of the locking hole.

Abstract: A graphics processing unit (GPU) tray includes a base, a first riser, and a second riser. The base is provided with a first bracket and a second bracket spaced from each other, the first riser is connected to one side of the first bracket and the second bracket, and the second riser is connected to the other side of the first bracket and a second bracket. The first riser is provided with a first connector socket facing the second riser, and the second riser is provided with a second connector socket facing the first riser. A first GPU is plugged to the first connector socket and a second GPU is plugged to the second connector socket. The GPU tray compress the installation space of the GPUs and allows four GPUs can be installed in the chassis. A chassis accommodating the GPU tray is also disclosed.

Abstract: In a communication method, a session management function network element initiates a procedure of a first operation for a first session; the session management function network element receives a request to establish user-plane resources for the first session from an access and mobility management function network element in a process of performing the first operation; and the session management function network element determines a subsequent procedure based on the first operation.

Abstract: A storage device and a data accessing method are disclosed, wherein the storage device includes a memory circuit and a control circuit. The memory circuit includes a plurality of multi-level cells, and each of the multi-level cells is configured to store at least a first bit, a second bit and a third bit in at least a first page, a second page and a third page. The control circuit is configured to read the first bits according to a one-time reading operation related to the first bits, read the second bits according to M-times reading operations related to the second bits, and read the third bits according to N-times reading operations related to the third bits, wherein the difference between M and N is less than or equal to one.

Abstract: A dynamic adjustment method for RS reception is provided. The dynamic adjustment method for RS reception includes the following steps. A processor of an apparatus may detect at least one channel condition to generate a detection result. Then, the processor may determine an RS reception scheduling based on the detection result. Then, the processor may perform an RS reception based on the RS reception scheduling to receive RSs from a network node.

Abstract: A communication method and apparatus, a storage medium, and a chip system are disclosed. In one example, a wireless communication apparatus includes a communication processor and an application processor, and the communication processor is coupled to the application processor. The communication processor is configured to receive a first request sent by the application processor, where the first request is used to query a route selection descriptor. The communication processor is configured to send a second request to a network device. The second request includes at least one parameter in the route selection descriptor.

Abstract: An embodiment of the present application provides a semiconductor device, including a substrate, a chip, a latch-up protection circuit, and a redistribution layer. The chip is on the substrate. The latch-up protection circuit is separated from the chip in a direction. The redistribution layer transmits a signal between the latch-up protection circuit and the chip.

Abstract: Apparatus and methods are provided for determining UE appropriate states by traffic type detection. In one novel aspect, a UE traffic type is determined based on a plurality of UE metrics. One or more UE settings for transmission and/or reception are adjusted based on the determined UE traffic type. The UE traffic type determination procedure and UE configuration adjustment procedure are iterated to balance performance and power saving. In one embodiment, the UE collects a plurality of UE metrics for a UE traffic profile matrix, wherein the UE traffic profile matrix is used to determine a plurality of UE traffic types based on the plurality of UE metrics. The UE determines a real-time UE traffic type based on the collected UE metrics using the UE traffic profile matrix and adjusts a set of UE configurations based on the UE traffic type when one or more predefined conditions are met.

Abstract: The application provides a sense amplifier and an operation method thereof. The operation method for the sense amplifier includes: during a first phase, initializing a first sensing input voltage and a second input sensing voltage; and recording a first sensing output voltage and a second sensing output voltage of a previous round by charges stored in a plurality of transistors of the sense amplifier; during a second phase, sampling the first sensing output voltage and the second sensing output voltage of a current round as a plurality of transit points; during a first sub-phase of a third phase, amplifying a voltage difference between an input signal and a first reference voltage; and during a second sub-phase of the third phase, pulling the first sensing output voltage and the second sensing output voltage into a full-swing voltage range, and recording charges to the transistors of the sense amplifier.

Abstract: An antenna package structure is provided. The antenna package structure includes a glass substrate, an interconnect structure, a plurality of semiconductor chips, and an antenna array structure. The glass substrate has a first surface and a second surface opposite to the first surface. The interconnect structure is disposed over the first surface of the glass substrate. The plurality of semiconductor chips are mounted over the interconnect structure. The antenna array structure is formed on the second surface of the glass substrate. Furthermore, the plurality of semiconductor chips are coupled to the antenna array structure through the interconnect structure and the glass substrate.

Abstract: This application discloses a method for configuring an EPS NAS security algorithm, and a related apparatus in the field of communication technologies. In the technical solution provided in this application, an access and mobility management function entity needs to determine whether a selected EPS NAS security algorithm has been successfully provided to a terminal device, and after determining that the selected EPS NAS security algorithm has not been successfully provided to the terminal device, the access and mobility management function entity provides the selected EPS NAS security algorithm to the terminal device again. According to the technical solution provided in this application, it is ensured that the access and mobility management function entity can successfully configure the EPS NAS security algorithm for the terminal device.

Abstract: A bracket assembly for a server to prevent tilting during transportation includes at least two cabinet columns and two brackets. The two brackets are spaced apart from each other. The at least two cabinet columns fixed on the two brackets. Each bracket includes a fixing portion, a supporting portion, and at least one protrusion. The supporting portion extends from an edge of the fixing portion toward the other bracket, the protrusion from the fixing portion is spaced apart from the supporting portion. The supporting portion and protrusion are disposed on a same side of the fixing portion. A bracket structure and server assembly includes the bracket assembly and a housing, each of two parallel sidewalls of the housing has a sliding groove to clamp the protrusions.

Abstract: A bracket assembly for a server to prevent tilting during transportation includes at least two cabinet columns and two brackets. The two brackets are spaced apart from each other. The at least two cabinet columns fixed on the two brackets. Each bracket includes a fixing portion, a supporting portion, and at least one protrusion. The supporting portion extends from an edge of the fixing portion toward the other bracket, the protrusion from the fixing portion is spaced apart from the supporting portion. The supporting portion and protrusion are disposed on a same side of the fixing portion. A bracket structure and server assembly includes the bracket assembly and a housing, each of two parallel sidewalls of the housing has a sliding groove to clamp the protrusions.