Patents by Inventor Wen-Huai Yu

Wen-Huai Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230282472
    Abstract: A wafer and a wafer processing method are included. The wafer processing method includes the following steps. A wafer is provided having a first surface and a second surface opposite to the first surface. A fixture pattern is pasted on the first surface to cover a first portion of the first surface of the wafer, and a second portion of the first surface is exposed by the fixture pattern. A first etching step is performed on the second portion of the first surface to form a first etching pattern on the first surface of the wafer. The fixture pattern is removed from the first surface, and the second surface of the wafer is ground.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 7, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Wen-Huai Yu, Shih-Che Hung, Hung-Chang Lo, Chun-I Fan, Chia-Chi Tsai, Wen-Ching Hsu
  • Publication number: 20230052218
    Abstract: Provided is a method of SiC wafer processing, and the method includes the following steps. A SiC wafer is provided, and the SiC wafer has a first surface and an opposing second surface. A fine grinding process is performed on the first surface and the second surface of the SiC wafer. A dry etching process is performed on the first surface and the second surface of the SiC wafer to make the roughness of the first surface and the second surface 2.5 nm or less. After the dry etching process, a polishing process is performed on the first surface and the second surface of the SiC wafer.
    Type: Application
    Filed: July 11, 2022
    Publication date: February 16, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Shih-Che Hung, Wen-Huai Yu, Wen-Ching Hsu
  • Patent number: 10825940
    Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 3, 2020
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Patent number: 10510830
    Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
    Type: Grant
    Filed: September 2, 2018
    Date of Patent: December 17, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
  • Patent number: 10297702
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: May 21, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20190096987
    Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
    Type: Application
    Filed: September 2, 2018
    Publication date: March 28, 2019
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
  • Publication number: 20190035946
    Abstract: A solar cell wafer is provided. It is a silicon wafer, and a surface of the silicon wafer has a plurality of pores, wherein based on a total amount of 100% of the plurality of pores, 60% or more of the pores has a circularity greater than 0.5. Therefore, the reflectance of the solar cell wafer can be efficiently reduced.
    Type: Application
    Filed: April 27, 2018
    Publication date: January 31, 2019
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Jian-Jia Huang, Ming-Kung Hsiao, Cheng-Wei Gu, Bo-Kai Wang, Wen-Huai Yu, I-Ching Li, Sung-Lin Hsu, Wen-Ching Hsu
  • Patent number: 10138572
    Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: November 27, 2018
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Sung-Lin Hsu, Cheng-Jui Yang, Pei-Kai Huang, Sheng-Hua Ni, Yu-Min Yang, Ming-Kung Hsiao, Wen-Huai Yu, Ching-Shan Lin, Wen-Ching Hsu, Chung-Wen Lan
  • Publication number: 20180312995
    Abstract: The present disclosure provides a polycrystalline silicon ingot. The polycrystalline silicon ingot has a vertical direction and includes a nucleation promotion layer located at a bottom of the polycrystalline silicon ingot, and silicon grains grown along the vertical direction, wherein the silicon grains include at least three crystal directions. The coefficient of variation of grain area in a section above the nucleation promotion layer of the polycrystalline silicon ingot increases along the vertical direction.
    Type: Application
    Filed: July 2, 2018
    Publication date: November 1, 2018
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Yu-Min Yang, Cheng-Jui Yang, Hung-Sheng Chou, Wen-Huai Yu, Sung-Lin Hsu, Wen-Ching Hsu
  • Publication number: 20180297851
    Abstract: Present disclosure provides a multicrystalline silicon (mc-Si) brick, including a bottom portion starting from a bottom to a height of 100 mm, a middle portion starting from the height of 100 mm to a height of 200 mm; and a top portion starting from the height of 200 mm to a top. A percentage of incoherent grain boundary in the bottom portion is greater than a percentage of incoherent grain boundary in the top portion. Present disclosure also provides a multicrystalline silicon (mc-Si) wafer. The mc-Si wafer includes a percentage of non-? grain boundary from about 60 to about 75 and a percentage of ?3 grain boundary from about 12 to about 25.
    Type: Application
    Filed: June 22, 2018
    Publication date: October 18, 2018
    Inventors: Hung-Sheng CHOU, Yu-Min YANG, Wen-Huai YU, Sung Lin HSU, Wen-Ching HSU, Chung-Wen LAN, Yu-Ting WONG
  • Patent number: 10087080
    Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: October 2, 2018
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 10065863
    Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: September 4, 2018
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 10029919
    Abstract: Present disclosure provides a multicrystalline silicon (mc-Si) brick, including a bottom portion starting from a bottom to a height of 100 mm, a middle portion starting from the height of 100 mm to a height of 200 mm; and a top portion starting from the height of 200 mm to a top. A percentage of incoherent grain boundary in the bottom portion is greater than a percentage of incoherent grain boundary in the top portion. Present disclosure also provides a multicrystalline silicon (mc-Si) wafer. The mc-Si wafer includes a percentage of non-? grain boundary from about 60 to about 75 and a percentage of ?3 grain boundary from about 12 to about 25.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: July 24, 2018
    Assignee: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Hung-Sheng Chou, Yu-Min Yang, Wen-Huai Yu, Sung Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan, Yu-Ting Wong
  • Patent number: 9903043
    Abstract: The invention provides a crucible assembly and method of manufacturing a crystalline silicon ingot by use of such crucible assembly. The crucible assembly of the invention includes a crucible body and a fiber textile article. The fiber textile article is made of a plurality of carbon fibers, and is loaded on a bottom of the crucible body. The fiber textile article has a plurality of intrinsic pores randomly arranged.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: February 27, 2018
    Assignee: SINO-AMERICAN SULICON PRODUCTS INC.
    Inventors: Wen-Huai Yu, Hung-Sheng Chou, Yu-Min Yang, Kuo-Wei Chuang, Sung-Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Patent number: 9885125
    Abstract: A method for manufacturing an isolating layer onto a crucible includes the steps as follows: providing a spraying device for the following spraying steps; heating the crucible and measuring the heated crucible to get a first temperature; spraying a slurry on the inner wall of the crucible to form an isolating layer by a spraying unit with a predetermined spraying manner; measuring the isolating layer to get a second temperature; obtaining a value for the difference between the first and second temperatures and judging whether the difference value in a within predetermined difference scope or not, in which the predetermined difference scope is about 6° C.˜12° C.; when the difference value is not in the predetermined difference scope, adjusting the predetermined spraying manner; when the difference value is in the predetermined difference scope, implementing the above spraying steps to the crucible.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: February 6, 2018
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Hung-Sheng Chou, Li Wei Li, Wen-Huai Yu, Bruce Hsu, Chun-I Fan, Wen Ching Hsu
  • Publication number: 20170233257
    Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 9637391
    Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: May 2, 2017
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Publication number: 20170058428
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20170062635
    Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20170057829
    Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan