Patents by Inventor Wen Huang

Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11785204
    Abstract: Various schemes for realizing JCCR mode decision in frequency domain are described. An apparatus receives first and second pixel data of a current block of a picture and transform the pixel data into first and second transformed data in frequency domain. The apparatus generates joint pixel data comprising a pixelwise linear combination of the first and second transformed data. The apparatus generates reconstructed joint pixel data based on the joint pixel data by quantization and inverse quantization operations. The apparatus derives first and second reconstructed pixel data based on the reconstructed joint pixel data. The apparatus accordingly calculates first and second distortion values in frequency domain, based on which a preferred mode may be determined to code the current block.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: October 10, 2023
    Inventors: Chen-Yen Lai, Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Chun-Chia Chen, Yu-Wen Huang
  • Patent number: 11778235
    Abstract: A method for performing transform skip mode (TSM) in a video decoder is provided. A video decoder receives data from a bitstream to be decoded as a plurality of video pictures. The video decoder parses the bitstream for a first syntax element in a sequence parameter set (SPS) of a current sequence of video pictures. When the first syntax element indicates that transform skip mode is allowed for the current sequence of video pictures and when transform skip mode is used for a current block in a current picture of the current sequence, the video decoder reconstructs the current block by using quantized residual signals that are not transformed.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: October 3, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Shih-Ta Hsiang, Lulin Chen, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Olena Chubach, Yu-Wen Huang
  • Patent number: 11768151
    Abstract: A fugitive gas detection system includes an inertial measurement assembly that measures a change in position of the inlet of a gas analyzer and applies a time slip to concentration data detected by an analyzer to generate a time series of the concentration of the gas in three-dimensional space. Applying statistical methods, the relative location of the source of the fugitive gas can be established from the time series. Additionally, in some embodiments, the data may be interpolated to establish a map of a plume of the fugitive gas.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: September 26, 2023
    Assignee: ABB Schweiz AG
    Inventors: J. Brian Leen, Yi-wen Huang
  • Publication number: 20230300370
    Abstract: Method and apparatus of Inter prediction for video coding are disclosed. When a sub-block motion compensation coding tool is selected for the current block, the method generates sub-block MVs (motion vectors) associated with multiple sub-blocks, which are included or contained in the current block, according to the sub-block motion compensation coding tool, constrains the sub-block MVs within a range to form constrained sub-block MVs, and applies motion compensation to the current block using the constrained sub-block MVs or applies motion compensation to the current block using one sub-block MV within the range around the primary MV in a second list if a corresponding sub-block MV in a first list is outside the range. In another method, motion compensation is applied to the current block only using reference pixels of reference sub-blocks within a primary reference block.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Applicant: HFI INNOVATION INC.
    Inventors: Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG, Chih-Wei HSU
  • Patent number: 11765365
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream determines a block boundary of the current block and sub-block boundaries inside the current block, wherein the current block is partitioned into a plurality of sub-blocks using sub-block mode prediction. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a current filtered-reconstructed block, wherein said applying the de-blocking process to the current block comprises applying the de-blocking process to the sub-block boundaries inside the current filtered-reconstructed block, and generates a filtered decoded picture including the current filtered-reconstructed block.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: September 19, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11765384
    Abstract: Methods and apparatus of motion compensation using the bi-directional optical flow (BIO) techniques are disclosed. According to one method of the present invention, the BIO process is applied to encode or decode bi-directional current block in Merge mode only or in AMVP (advanced motion vector prediction) mode only. According to another method, the BIO process conditionally to encode or decode the current block depending on a jointly-coded flag if the current block is coded using a bi-prediction mode. According to yet another method, x-offset value vx and y-offset value vy for the current block are added to the current motion vector to form a final motion vector. The final motion vector is then used as a reference motion vector for following blocks. In still yet another method, the BIO process is applied to the chroma component.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: September 19, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11764094
    Abstract: Some implementations described herein provide techniques and apparatuses for a semiconductor processing tool including an electrostatic chuck having a voltage-regulation system to regulate an electrical potential throughout regions of a semiconductor substrate positioned above the electrostatic chuck. The voltage-regulation system may determine that an electrical potential within a region of the semiconductor substrate does not satisfy a threshold. The voltage-regulation system may, based on determining that the electrical potential throughout the region does not satisfy the threshold, position one or more electrically-conductive pins within the region. While positioned within the region, the one or more electrically-conductive pins may change the electrical potential of the region.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Pin Chou, Kai-Lin Chuang, Sheng-Wen Huang, Yan-Cheng Chen, Jun Xiu Liu
  • Publication number: 20230290722
    Abstract: An integrated circuit (IC) includes a first memory cell and a second memory cell. The first memory cell includes (i) a first transistor and (ii) a first capacitor coupled to the first transistor, where an upper electrode of the first capacitor is coupled to a first conductive structure. The second memory cell is above the first memory cell. The second memory cell includes (i) a second transistor and (ii) a second capacitor coupled to the second transistor. An upper electrode of the second capacitor is coupled to a second conductive structure. In an example, an interconnect feature includes a continuous and monolithic body of conductive material. In an example, the continuous and monolithic body extends through the second conductive structure, and further extends through the first conductive structure. In an example, the first and second memory cells are dynamic random access memory (DRAM) memory cells.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Applicant: Intel Corporation
    Inventors: Travis W. Lajoie, Juan Alzate Vinasco, Abhishek Anil Sharma, Van H. Le, Moshe Dolejsi, Yu-Wen Huang, Kimberly Pierce, Jared Stoeger, Shem Ogadhoh
  • Patent number: 11754485
    Abstract: A validation test piece is for validating a bio-sample detection device, which includes an insert port for insertion of the validation test piece and a detection module. The validation test piece includes a base seat, a test element, a standardized data and a top cover. The base seat includes a seat body and a receiving member disposed on the seat body. The test element is connected to the receiving member, and includes a test region to be detected by the detection module. The standardized data corresponds to a sample number of the test region. The top cover is connected to the base seat for covering the test element.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: September 12, 2023
    Assignee: Bonraybio Co., Ltd.
    Inventors: Chih-Pin Chang, Hsi-Wen Huang
  • Publication number: 20230278180
    Abstract: A fastener driving tool includes a magazine unit, a handle, a striking plate, an energy restoring member and a wire bending spring disposed to a housing unit. The housing unit includes an inner housing assembly made from a plastic material, and an outer housing assembly made from a metal material and covering the inner housing assembly. The wire bending spring is biased for storing a striking energy for the striking plate, and includes an extending section and a backwinding section. The extending section has first and second ends. The backwinding section is connected with the second end, and extends and bends toward the first end to terminate at a terminal end portion. The ratio of a height to a width ranges from 1:1 to 1:1.6.
    Type: Application
    Filed: June 22, 2022
    Publication date: September 7, 2023
    Applicant: PAO SHEN ENTERPRISES CO., LTD.
    Inventor: Tsung-Wen HUANG
  • Patent number: 11747456
    Abstract: A location device is provided for determining the location of an acoustic sensor. A location process makes use of a plurality of transmit beams (wherein a beam is defined as a transmission from all transducers of an ultrasound array), with a frequency analysis to identify if there is a signal reflected from the acoustic sensor. A location is obtained from the plurality of frequency analyses.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: September 5, 2023
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Man Nguyen, Hua Xie, Sheng-Wen Huang, Carolina Amador Carrascal, Vijay Thakur Shamdasani
  • Patent number: 11743458
    Abstract: Methods and apparatus for in-loop processing of reconstructed video are disclosed. According to one method, a virtual boundary is determined for to-be-processed pixels in the current picture, where the virtual boundary is aligned with block boundaries and at least one to-be-processed pixel on a first side of the virtual boundary requires one or more second pixels on a second side of the virtual boundary. According to the method, the in-loop processing is modified if a target to-be-processed pixel requires at least one second pixel from the second side of the virtual boundary and the modified in-loop processing eliminates the need for any second pixel on the second side of the virtual boundary. According to another method, the operations of block classification are changed when part of the required pixels in one 10×10 window used in classification are at the other side of virtual boundaries.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: August 29, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Ching-Yeh Chen, Tzu-Der Chuang, Yu-Chi Su, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20230268215
    Abstract: Some implementations described herein provide techniques and apparatuses for a semiconductor processing tool including an electrostatic chuck having a voltage-regulation system to regulate an electrical potential throughout regions of a semiconductor substrate positioned above the electrostatic chuck. The voltage-regulation system may determine that an electrical potential within a region of the semiconductor substrate does not satisfy a threshold. The voltage-regulation system may, based on determining that the electrical potential throughout the region does not satisfy the threshold, position one or more electrically-conductive pins within the region. While positioned within the region, the one or more electrically-conductive pins may change the electrical potential of the region.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Inventors: Chung-Pin CHOU, Kai-Lin CHUANG, Sheng-Wen HUANG, Yan-Cheng CHEN, Jun Xiu LIU
  • Publication number: 20230268569
    Abstract: A charging and discharging assembly, a battery core and a battery module are provided in the disclosure, which are applied in a lithium ion battery. The charging and discharging unit includes a positive electrode plate including positive tabs, a negative electrode plate including negative tabs, and a separator for separating the positive electrode plate and the negative electrode plate. The positive tab at least includes a first positive tab and a second positive tab, and the negative tab at least includes a first negative tab and a second negative tab. The positive electrode plate, the separator and the negative electrode plate are stacked with each other. The positive tabs and the negative tabs are respectively shifted to same sides of the positive electrode plate and the negative electrode plate.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Applicants: ZHEJIANG NARADA POWER SOURCE CO., LTD., HANGZHOU NARADA POWER TECHNOLOGY CO., LTD.
    Inventors: Yinglai WANG, Feng GUO, Yanhong LI, Qinxu JIANG, Jing MA, Liukou XU, Wen HUANG, Ling FANG
  • Patent number: 11736704
    Abstract: Video encoding methods and apparatuses for Sum of Absolute Transformed Difference (SATD) computation by folded Hadamard transform circuits include splitting a current block into SATD blocks, receiving input data associated with a first block of a first SATD block in a first cycle and receiving input data associated with a second block of the first SATD block in a second cycle, and performing calculations for the first block by shared Hadamard transform circuits in the first cycle and performing calculations for the second block by the shared Hadamard transform circuits in the second cycle. Each shared Hadamard transform circuit is a first part of each folded Hadamard transform circuit. The video encoding methods and apparatuses further perform calculations for the entire SATD block by a final part of each folded Hadamard transform circuit to generate a final SATD result of the first SATD block for encoding.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: August 22, 2023
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 11734320
    Abstract: A log processing device and a log processing method thereof are provided. The log processing device divides the original log data into a plurality of block data, transforms a numeric variable of each of the block data into a representative code, and determines whether to perform a combination process for continuous block data to generate a plurality of combinational block data according to a data integrity of each of the block data. The log processing data takes the combinational block data as a log template, and each of the combinational block data corresponds to an event.
    Type: Grant
    Filed: November 22, 2020
    Date of Patent: August 22, 2023
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Yen-Wen Huang, Wei-Chao Hsu
  • Publication number: 20230260896
    Abstract: A device package including an interposer. The interposer comprising: a semiconductor substrate; first through vias extending through the semiconductor substrate; an interconnect structure comprising: a first metallization pattern in an inorganic insulating material; and a passivation film over the first metallization pattern; and a first redistribution structure over the passivation film. The first redistribution structure comprising a second metallization pattern in an organic insulating material. The device package further including an integrated circuit die over and attached to the interposer; and a first encapsulant around the integrated circuit die.
    Type: Application
    Filed: June 10, 2022
    Publication date: August 17, 2023
    Inventors: Hsien-Pin Hu, Shang-Yun Hou, Shih-Wen Huang
  • Patent number: 11726195
    Abstract: Systems and methods for improving spectral-shift methods for calculating acoustic attenuation coefficients are disclosed. Systems, methods, and apparatuses for transmitting ultrasound pulse sequences for improved signal-to-noise outside the main passband of ultrasound transducers are disclosed. Systems, methods, and apparatuses for using the echoes from the transmitted pulse sequences to calculate the attenuation coefficient are disclosed.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: August 15, 2023
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Sheng-Wen Huang, Hua Xie, Jean-Luc Francois-Marie Robert, Man Nguyen, Vijay Thakur Shamdasani
  • Patent number: 11726402
    Abstract: A method includes providing a first design layout including cells; updating a first cell in the plurality of cells using optical proximity correction to provide a first updated cell and a data set; training a model based on a layout-dependent parameter of a second design layout; and updating a second cell based on the data set and the model to provide a second updated cell. The model includes an input layer, a hidden layer and an output layer. Training the model includes obtaining converged values of nodes of the hidden layer. Obtaining converged values of nodes of the hidden layer includes providing information on edge segments before and after lithography enhancement to the input layer and the output layer, respectively, until values of nodes of the hidden layer attains convergence in terms of a cost function.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Lin Chu, Hsin-Lun Tseng, Sheng-Wen Huang, Chih-Chung Huang, Chi-Ming Tsai
  • Patent number: 11719797
    Abstract: The invention provides a method for controlling the generation of a compound ultrasonic image. The method includes obtaining a first ultrasound image and applying adaptive beamforming to the first ultrasound image, thereby generating a second ultrasound image. A weighting is determined based on the first and second ultrasound images, wherein the weighting comprises at least one weighting component. The compound ultrasound image is then generated based on the first and second ultrasound images and the weighting component.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: August 8, 2023
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Francois Guy Gerard Marie Vignon, Sheng-Wen Huang, Jun Seob Shin, Darwin Philip Adams, Scott William Dianis