Patents by Inventor Wen-Huei Guo

Wen-Huei Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11502077
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Patent number: 11469227
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: October 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Chang, Wen-Huei Guo, Yi-Shien Mor
  • Patent number: 11245034
    Abstract: A semiconductor device includes a substrate, first and second source/drain features, and a dielectric plug. The substrate has a semiconductor fin. The first and second source/drain features are over first and second portions of the semiconductor fin, respectively. The dielectric plug is at least partially embedded in a third portion of the semiconductor fin. The third portion is in between the first and second portions of the semiconductor fin. The dielectric plug includes a first dielectric material and a second dielectric material different from the first dielectric material.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: February 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuei-Ming Chang, Ta-Chun Lin, Rei-Jay Hsieh, Yung-Chih Wang, Wen-Huei Guo, Kuo-Hua Pan, Buo-Chin Hsu
  • Publication number: 20210098452
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Patent number: 10868004
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Publication number: 20200381428
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Application
    Filed: August 17, 2020
    Publication date: December 3, 2020
    Inventors: Chih-Hao CHANG, Wen-Huei GUO, Yi-Shien MOR
  • Patent number: 10748896
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Chang, Yi-Shien Mor, Wen-Huei Guo
  • Publication number: 20200111782
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Patent number: 10515956
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Publication number: 20190334035
    Abstract: A semiconductor device includes a substrate, first and second source/drain features, and a dielectric plug. The substrate has a semiconductor fin. The first and second source/drain features are over first and second portions of the semiconductor fin, respectively. The dielectric plug is at least partially embedded in a third portion of the semiconductor fin. The third portion is in between the first and second portions of the semiconductor fin. The dielectric plug includes a first dielectric material and a second dielectric material different from the first dielectric material.
    Type: Application
    Filed: April 25, 2018
    Publication date: October 31, 2019
    Inventors: Kuei-Ming CHANG, Ta-Chun LIN, Rei-Jay HSIEH, Yung-Chih WANG, Wen-Huei GUO, Kuo-Hua PAN, Buo-Chin HSU
  • Patent number: 10366989
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: July 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Chang, Wen-Huei Guo, Yi-Shien Mor
  • Publication number: 20180350802
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Application
    Filed: July 23, 2018
    Publication date: December 6, 2018
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Publication number: 20180337177
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Inventors: Chih-Hao CHANG, Yi-Shien MOR, Wen-Huei GUO
  • Patent number: 10037994
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: July 31, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Patent number: 9978630
    Abstract: An apparatus for and a method of forming a semiconductor structure is provided. The apparatus includes a substrate holder that maintains a substrate such that the processing surface is curved, such as a convex or a concave shape. The substrate is held in place using point contacts, a plurality of continuous contacts extending partially around the substrate, and/or a continuous ring extending completely around the substrate. The processing may include, for example, forming source/drain regions, channel regions, silicides, stress memorization layers, or the like.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Ming Chang, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang, Clement Hsingjen Wann, Tung Ying Lee, Cheng-Long Chen, Jui-Chien Huang
  • Publication number: 20180040618
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 8, 2018
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Patent number: 9818745
    Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: November 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung Ying Lee, Wen-Huei Guo, Chih-Hao Chang, Shou-Zen Chang
  • Publication number: 20170229454
    Abstract: A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.
    Type: Application
    Filed: October 21, 2016
    Publication date: August 10, 2017
    Inventors: Chih-Hao CHANG, Wen-Huei GUO, Yi-Shien MOR
  • Patent number: 9455325
    Abstract: An apparatus includes a semiconductor substrate having a plurality of fins, wherein the plurality of fins includes a first group of fins and a second group of fins. The apparatus further includes a high fin density area on the semiconductor substrate including a first dielectric between the first group of fins in the high fin density area, said first dielectric having a first dopant concentration. The apparatus further includes a low fin density area on the semiconductor substrate including a second dielectric between the second group of fins in the low fin density area, said second dielectric having a second dopant concentration. The first dielectric and the second dielectric are a same material as deposited and the first dopant concentration and the second dopant concentration are different.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: September 27, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Clement Hsingjen Wann, Ling-Yen Yeh, Chi-Yuan Shih, Yuan-Fu Shao, Wen-Huei Guo, Tung Ying Lee
  • Patent number: 9449971
    Abstract: An embodiment is a method including forming a first fin on a substrate, the first fin having a first longitudinal axis, forming a first trench having a first width in the first fin, the first trench dividing the first fin into at least two fin portions, forming a first gate structure and first source/drain regions over one of the at least two fin portions of the first fin, and forming a second gate structure and second source/drain regions over another of the at least two fin portions of the first fin.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chiang TIng, Jyh-Huei Chen, Wen-Huei Guo, Cheng-Han Wu, Yu-Wei Lee