Patents by Inventor Wen-Hung Hu
Wen-Hung Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8058564Abstract: A circuit board surface structure includes a circuit board having at least one surface provided with a plurality of electrically connecting pads, an insulating protective layer characterized by photosensitivity and solder resisting and formed on the circuit board, and a plurality of openings formed in the insulating protective layer to expose the electrical connecting pads on the circuit board and tapered upward; and a conductive element formed in the opening, so as to increase the contact area and reinforce bonding between the electrically connecting pads and the conductive element.Type: GrantFiled: March 6, 2008Date of Patent: November 15, 2011Assignee: Unimicron Technology Corp.Inventor: Wen-Hung Hu
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Publication number: 20110056738Abstract: A package substrate and a manufacturing method thereof are provided, including: forming a solder mask on a package substrate body having a plurality of conductive pads; forming a plurality of first-step openings in the solder mask by exposure and development; forming a plurality of second-step openings in the solder mask by a laser-based or plasma-based drilling process; and removing a solder mask foot from the bottom of each of the first-step openings so as to expose large surface areas of the conductive pads. Hence, the contact area between a conductive element and a corresponding one of the conductive pads is large enough to enhance bonding and electrical connection therebetween.Type: ApplicationFiled: September 4, 2009Publication date: March 10, 2011Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: Wen Hung Hu
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Publication number: 20110031617Abstract: A semiconductor package substrate structure and a manufacturing method thereof are disclosed. The structure includes a substrate having a plurality of electrical connecting pads formed on at least one surface thereof; a plurality of electroplated conductive posts each covering a corresponding one of the electrical connecting pads and an insulating protective layer formed on the surface of the substrate and having a revealing portion for exposing the electroplated conductive posts therefrom. The invention allows the interval between the electroplated conductive posts to be minimized, the generation of concentrated stresses and the overflow of underfill to be avoided, as well as the reduction of the overall height of the fabricated package.Type: ApplicationFiled: October 20, 2010Publication date: February 10, 2011Applicant: UNIMICRON TECHONOLOGY COPR.Inventor: Wen-Hung Hu
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Patent number: 7847400Abstract: A semiconductor package substrate structure and a manufacturing method thereof are disclosed. The structure includes a substrate having a plurality of electrical connecting pads formed on at least one surface thereof; a plurality of electroplated conductive posts each covering a corresponding one of the electrical connecting pads and an insulating protective layer formed on the surface of the substrate and having a revealing portion for exposing the electroplated conductive posts therefrom. The invention allows the interval between the electroplated conductive posts to be minimized, the generation of concentrated stresses and the overflow of underfill to be avoided, as well as the reduction of the overall height of the fabricated package.Type: GrantFiled: May 2, 2008Date of Patent: December 7, 2010Assignee: Unimicron Technology Corp.Inventor: Wen-Hung Hu
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Patent number: 7705456Abstract: A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias; a plurality of first electrically connecting pads on the first conductive vias and completely exposed on the dielectric layer having no extending circuits for a semiconductor chip to be mounted thereon, the first electrically connecting pad being electrically connected to the first circuit layer of the first conductive via; and an insulating protective layer disposed on the main body with an opening for completely exposing the first electrically connecting pads, whereby the circuit layout density is increased without disposing circuits between the electrically connecting pads.Type: GrantFiled: November 24, 2008Date of Patent: April 27, 2010Assignee: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Patent number: 7705471Abstract: A conductive bump structure of a circuit board and a method for forming the same are proposed. A conductive layer is formed on an insulating layer on the surface of the circuit board. A first resist layer is formed on the conductive layer and a plurality of first openings is formed in the first resist layer to expose the conductive layer. Then, a patterned trace layer is electroplated in the first openings and a second resist layer is covered on the circuit board with the patterned trace layer. Second openings are formed in the second resist layer to expose part of the trace layer to be used as electrical connecting pads. Thereafter, metal bumps are electroplated in the second openings and the surface of the circuit board is covered with a solder mask. A thinning process is applied to the solder mask to expose the top surface of the metal bumps. Afterwards, an adhesive layer is formed on the surface of the metal bumps exposing out of the solder mask.Type: GrantFiled: April 27, 2006Date of Patent: April 27, 2010Assignee: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Patent number: 7674362Abstract: A method for fabricating a conductive bump structure of a circuit board is disclosed. The circuit board with a plurality of electrical connection pads is provided. An insulating protective layer and a resist layer are successively applied on the circuit board, wherein openings are formed in the layers at positions corresponding to the pads to expose the pads. Then, a conductive layer is formed on surfaces of the resist layer and openings, and a metal layer is formed on the conductive layer via electroplating and filled in the openings. Subsequently, the metal layer and conductive layer formed on the resist layer are removed via thinning, so as to form metal bumps on the pads. After the resist layer is removed, the metal bumps are covered by an adhesive layer to form a conductive bump structure for electrically connecting the circuit board to the external electronic component.Type: GrantFiled: April 2, 2008Date of Patent: March 9, 2010Assignee: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Patent number: 7659193Abstract: Conductive structures for electrically conductive pads of a circuit board and fabrication method thereof are proposed. The fabrication method includes: providing a circuit board with a plurality of first, second and third electrically conductive pads; forming first and second conductive layers on the circuit board; forming first and second resist layers respectively on the first and second conductive layers, the resist layers having a plurality of openings for exposing the conductive layers on the pads; forming a metal layer in the openings of the first and second resist layers; and forming a first connecting layer on the metal layer; forming third and fourth resist layers on the first and second resist layers respectively, the third resist layer having a plurality of openings for exposing the first connecting layer on the metal layer on the second electrically.Type: GrantFiled: October 27, 2006Date of Patent: February 9, 2010Assignee: Phoenix Precision Technology CorporationInventors: Wen-Hung Hu, Ying-Tung Wang, Shih-Ping Hsu, Chao-Wen Shih
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Patent number: 7608929Abstract: An electrical connector structure of circuit board and a method for fabricating the same are proposed. A circuit board having a conductive layer is formed with a first resist layer and a second resist layer thereon, so as to form electrical connection pads and metal bumps on the electrical connection pads. The first and second resist layers are formed with openings therein at positions corresponding to the electrical connection pads and metal bumps, and the exposed conductive layer is removed. An adhesive layer is formed to cover the exposed surfaces of the electrical connection pads and the metal bumps. Then, the second resist layer, the first resist layer and the conductive layer covered by the first resist layer are removed. Later, an insulating protective layer is formed on a surface of the circuit board, and thinned to expose a portion of the adhesive layer, such that electrical connectors of the circuit board are fabricated.Type: GrantFiled: March 8, 2006Date of Patent: October 27, 2009Assignee: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Publication number: 20090134515Abstract: A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias; a plurality of first electrically connecting pads on the first conductive vias and completely exposed on the dielectric layer having no extending circuits for a semiconductor chip to be mounted thereon, the first electrically connecting pad being electrically connected to the first circuit layer of the first conductive via; and an insulating protective layer disposed on the main body with an opening for completely exposing the first electrically connecting pads, whereby the circuit layout density is increased without disposing circuits between the electrically connecting pads.Type: ApplicationFiled: November 24, 2008Publication date: May 28, 2009Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: Wen-Hung Hu
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Publication number: 20090050359Abstract: A circuit board having an electrically connecting structure and a method for fabricating the same are provided. A circuit board body having inner-layer circuits is provided. A circuit layer is formed on at least an outermost surface of circuit board body, and including electrically connecting pads and circuits. The electrically connecting pads are partially electrically connected to the circuits, and are partially electrically connected to the inner-layer circuits via conductive vias. An insulating protective layer is disposed on the circuit board body and is formed with openings therein for exposing the electrically connecting pads. Conductive posts are formed on the electrically connecting pads. Standalone metal pads are formed on the insulating protective layer but are not used for electrical connection.Type: ApplicationFiled: August 21, 2008Publication date: February 26, 2009Applicant: Phoenix Precision Technology CorporationInventors: Wen-Hung Hu, Wen-Yuan Chi
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Publication number: 20080272501Abstract: A semiconductor package substrate structure and a manufacturing method thereof are disclosed. The structure includes a substrate having a plurality of electrical connecting pads formed on at least one surface thereof; a plurality of electroplated conductive posts each covering a corresponding one of the electrical connecting pads and an insulating protective layer formed on the surface of the substrate and having a revealing portion for exposing the electroplated conductive posts therefrom. The invention allows the interval between the electroplated conductive posts to be minimized, the generation of concentrated stresses and the overflow of underfill to be avoided, as well as the reduction of the overall height of the fabricated package.Type: ApplicationFiled: May 2, 2008Publication date: November 6, 2008Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: Wen-Hung Hu
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Publication number: 20080265411Abstract: A structure of a packaging substrate and a method for making the same are disclosed, wherein the structure comprises: a substrate body having a circuit layer on the surface thereof, wherein the circuit layer has a plurality of conductive pads which are each formed in a flat long shape to enhance the elasticity of circuit layout; a solder mask disposed on the substrate body and having a plurality of openings corresponding to and exposing the conductive pads, wherein the openings are each formed in a flat long shape; and a metal bump disposed in each of the openings of the solder mask and on each of the corresponding conductive pads.Type: ApplicationFiled: November 13, 2007Publication date: October 30, 2008Applicant: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Publication number: 20080257595Abstract: The present invention relates to a packaging substrate and a method for manufacturing the same. The packaging substrate includes: a substrate body, having a plurality of conductive pads on the surface thereof, wherein the top surfaces of the conductive pads have a concave each; a solder mask, disposed on the surface of the substrate body and having a plurality of openings to correspondingly expose the concaves of the conductive pads each; and a plurality of metal bumps, disposed correspondingly in the openings of the solder mask and over the concaves of the conductive pads. The present invention increases the joint surface area between the metal bumps and the conductive pads so as to inhibit the joint crack and improve the reliability of the conductive structure of the packaging substrate.Type: ApplicationFiled: April 16, 2008Publication date: October 23, 2008Applicant: Phoenix Precision Technology CorporationInventor: Wen-Hung Hu
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Publication number: 20080217047Abstract: A circuit board surface structure includes a circuit board having at least one surface provided with a plurality of electrically connecting pads, an insulating protective layer characterized by photosensitivity and solder resisting and formed on the circuit board, and a plurality of openings formed in the insulating protective layer to expose the electrical connecting pads on the circuit board and tapered upward; and a conductive element formed in the opening, so as to increase the contact area and reinforce bonding between the electrically connecting pads and the conductive element.Type: ApplicationFiled: March 6, 2008Publication date: September 11, 2008Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventor: Wen-Hung Hu
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Publication number: 20080179190Abstract: A method for fabricating a conductive bump structure of a circuit board is disclosed. The circuit board with a plurality of electrical connection pads is provided. An insulating protective layer and a resist layer are successively applied on the circuit board, wherein openings are formed in the layers at positions corresponding to the pads to expose the pads. Then, a conductive layer is formed on surfaces of the resist layer and openings, and a metal layer is formed on the conductive layer via electroplating and filled in the openings. Subsequently, the metal layer and conductive layer formed on the resist layer are removed via thinning, so as to form metal bumps on the pads. After the resist layer is removed, the metal bumps are covered by an adhesive layer to form a conductive bump structure for electrically connecting the circuit board to the external electronic component.Type: ApplicationFiled: April 2, 2008Publication date: July 31, 2008Applicant: Phoenix Precision Technology CorporationInventor: Wen-Hung HU
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Patent number: 7350298Abstract: A method for fabricating a circuit board having a conductive structure is disclosed. The method includes: forming first and second insulating protective layers respectively on first and second surfaces of a circuit board; forming a conductive layer on the first insulating protective layer and the openings; forming first and second resist layers on the conductive layer and the second insulating protective layer respectively; forming first electrically connecting structures by electroplating on the exposed conductive layer over a plurality of first and second electrically connecting pads in openings of the first resist layer; removing the first and the second resist layers and the conductive layer covered by the first resist layer; and forming second electrically connecting structures by stencil printing on the conductive layer over the second electrically connecting pads on the first surface and on a plurality of third electrically connecting pads of the second surface of the circuit board.Type: GrantFiled: August 28, 2006Date of Patent: April 1, 2008Assignee: Phoenix Precision Technology CorporationInventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen Hung Hu, Chao Wen Shih
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Patent number: 7341934Abstract: A method for fabricating conductive bumps of a circuit board is proposed. First of all, a circuit board having a first surface and a corresponding second surface is provided. A circuit structure having a plurality of conductive pads is formed on each of the first surface and the second surface, and conductive structures are formed in the circuit board for electrically connecting the circuit structures. Also, an insulating layer having a plurality of openings penetrating therethrough is formed on the circuit board for exposing the conductive pad. Then, a conductive layer is formed on a surface of the insulating layer having the opening formed on the first surface of the circuit board. An electroplating process is performed via the conductive layer and the conductive structure, such that a conductive bump is formed on the conductive pad located on the second surface of the circuit board.Type: GrantFiled: March 15, 2005Date of Patent: March 11, 2008Assignee: Phoenix Precision Technology CorporationInventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen-Hung Hu, Chao-Wen Shih, Meng-Da Chou
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Publication number: 20080036079Abstract: The conductive connection structure of the present invention comprises a circuit board, a plurality of conductive pads, a solder mask layer, an electroless plating copper layer, and an electroless plating adhesive layer. The manufacturing method comprises the following steps: providing the circuit board having a plurality of conductive pads thereon; forming the solder mask layer, the electroless plating copper layer, and the electroless plating adhesive layer respectively on the surface of the circuit board, and forming a solder bump on the electroless plating adhesive layer. By the assistance of the conductive connection structure and the manufacturing method thereof, cavity otherwise formed on the conductive pads can be prevented, and the solder bumps therefore are firmly fixed on the conductive pads. Moreover, the stress in the surface between the solder bump and the conductive pad can be reduced as the semiconductor chip and the circuit board are combined.Type: ApplicationFiled: June 19, 2007Publication date: February 14, 2008Applicant: Phoenix Precision Technology CorporationInventors: Chien-Chih Chen, Wen-Hung Hu
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Publication number: 20070186412Abstract: A method for fabricating a circuit board having a conductive structure is disclosed. The method includes: forming first and second insulating protective layers respectively on first and second surfaces of a circuit board; forming a conductive layer on the first insulating protective layer and the openings; forming first and second resist layers on the conductive layer and the second insulating protective layer respectively; forming first electrically connecting structures by electroplating on the exposed conductive layer over a plurality of first and second electrically connecting pads in openings of the first resist layer; removing the first and the second resist layers and the conductive layer covered by the first resist layer; and forming second electrically connecting structures by stencil printing on the conductive layer over the second electrically connecting pads on the first surface and on a plurality of third electrically connecting pads of the second surface of the circuit board.Type: ApplicationFiled: August 28, 2006Publication date: August 16, 2007Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen Hung Hu, Chao Wen Shih