Abstract: Semiconductor packages with embedded wiring on re-distributed bumps are described. In an illustrative, non-limiting embodiment, a semiconductor package may include an integrated circuit (IC) having a plurality of pads and a re-distribution layer (RDL) coupled to the IC without any substrate or lead frame therebetween, where the RDL comprises a plurality of terminals, and where one or more of the plurality of pads are wire bonded to a corresponding one or more of the plurality of terminals.

Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.

Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.

Abstract: Power supply circuits in which a supplemental current driver is utilized to boost the current provided by a voltage regulator. The supplementing driver detects operating conditions for providing the supplementary current, and may be trained to provide particular amounts of current in response to particular operation conditions of a circuit load.

Abstract: A position-adjustable probing device comprises a stationary probe comprising a first coaxial structure having a first needle core, a first dielectric layer, and a first exterior conductive layer, and a first and a second movable probes. The first movable probe arranged at a first side of the stationary probe comprises a ground needle core, and a first extending structure comprising a first planar structure electrically contacted with the stationary probe through a first movement, a first top surface and a first bottom surface. The second movable probe arranged at a second side of the stationary needle comprises a second coaxial structure comprising a second needle core, a second dielectric layer, and a second exterior conductive layer, and a second extending structure comprising a second planar structure electrically contacted with the stationary probe through a second movement, a second top surface, and a second bottom surface.

Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply an analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.

Abstract: A method includes generating a differential voltage from a first reference voltage generator; receiving the differential voltage at a second reference voltage generator; dividing the differential voltage at the second reference voltage generator into multiple available reference voltage levels; and selecting one of the available reference voltage levels to apply to a circuit.

Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply a preconfigured analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.

Abstract: A multi-rank system includes multiple circuit ranks communicating over a common data line to multiple data receivers, each corresponding to one or more of the ranks and each having a corresponding reference voltage generator and clock timing adjustment circuit, such that a rank to communicate on the shared data line is switched without reconfiguring outputs of either the reference voltage generators or the clock timing adjustment circuits.

Abstract: A multi-rank circuit system utilizing a shared IO channel includes a first stage of multiple selectors coupled to input multiple digital busses, and a second stage including one or more selectors coupled to receive outputs of the first stage of selectors and to individually select one of the outputs of the first stage of selectors to one or more control circuits for IO circuits of the ranks. The system switches one of the ranks to be an active rank on the shared IO channel, and operates the first stage of selectors to select one of the digital busses to the second stage of selectors in advance of switching a next active rank to the shared IO channel.

Abstract: A multi-rank system includes multiple circuit ranks communicating over a common data line to multiple data receivers, each corresponding to one or more of the ranks and each having a corresponding reference voltage generator and clock timing adjustment circuit, such that a rank to communicate on the shared data line is switched without reconfiguring outputs of either the reference voltage generators or the clock timing adjustment circuits.

Abstract: A multi-rank circuit system utilizing a shared IO channel includes a first stage of multiple selectors coupled to input multiple digital busses, and a second stage including one or more selectors coupled to receive outputs of the first stage of selectors and to individually select one of the outputs of the first stage of selectors to one or more control circuits for IO circuits of the ranks. The system switches one of the ranks to be an active rank on the shared IO channel, and operates the first stage of selectors to select one of the digital busses to the second stage of selectors in advance of switching a next active rank to the shared IO channel.

Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply a preconfigured analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.

Abstract: A method includes generating a differential voltage from a first reference voltage generator; receiving the differential voltage at a second reference voltage generator; dividing the differential voltage at the second reference voltage generator into multiple available reference voltage levels; and selecting one of the available reference voltage levels to apply to a circuit.

Abstract: The differential voltage output from a first reference voltage generator of a multi-rank circuit is trained on multiple ranks of the multi-rank circuit. Multiple local reference voltage generators are trained to generate reference voltages for communication on the individual ranks, where the reference voltages output by the local reference voltage generators fall within a range of the differential voltage output.

Abstract: A circular saw includes a housing, a sawing assembly including a motor and a saw blade located at two opposite sides of the housing and connected together so that the saw blasé can be driven by the motor to saw the workpiece and a saw blade shield secured to the housing and covering a part of the saw blade to prevent the saw blade from cutting the surrounding people, and a prism assembly including a protective cover affixed to the front end of the saw blade shield and a prism located in the protective cover to reflect the image of the saw blade sawing the workpiece through a window of the protective cover to the line of sight of the operator. In this way, the operator can clearly confirm whether the sawing path is skewed with the normal operating posture to improve the efficiency.

Abstract: A circular includes a housing, a sawing assembly including a motor and a saw blade located at two opposite sides of the housing and connected together so that the saw blasé can be driven by the motor to saw the workpiece and a saw blade shield secured to the housing and covering a part of the saw blade to prevent the saw blade from cutting the surrounding people, and a prism assembly including a protective cover affixed to the front end of the saw blade shield and a prism located in the protective cover to reflect the image of the saw blade sawing the workpiece through a window of the protective cover to the line of sight of the operator. In this way, the operator can clearly confirm whether the sawing path is skewed with the normal operating posture to improve the efficiency.

Abstract: An air conditioning device is provided. The air conditioning device includes a power supplier, a compressor driver, a fan driver, a temperature sensor, a vibration sensor, and an operation processing controller. The power supplier has an input end receiving an input power source and generates a first operating power source and a second operating power source according to the input power source. The compressor driver operates according to the first operating power source to generate a first drive signal to drive a compressor. The fan driver operates according to the first operating power source to generate a second drive signal to drive a fan. The vibration sensor detects vibration information of the air conditioning device.

Abstract: A slide module comprises an outer rail, a ball rail, first balls and second balls. The outer rail has a first inner surface and a second inner surface. The ball rail has a first holding section and a second holding section. The first balls are rollably disposed in a plurality of first holes of the first holding section in which the first ball is contacted with the first inner surface and the second holding section and distant from the second inner surface. The second balls are rollably disposed in a plurality of second holes of the second holding section in which the second ball is contacted with the second inner surface and the first holding section and distant from the inner surface. Thereby, the ball rail is capable of moving along the axial direction with respect to the outer rail through the first balls and the second balls.

Abstract: One embodiment of the present invention sets forth an integrated circuit that includes multiple input/output (I/O) pad groups. Each I/O pad group includes an on-chip star network, multiple I/O pads, multiple test multiplexers, a digital-to-analog converter (DAC), and a wide-range comparator. Each test multiplexer is configured to couple a different I/O pad to the on-chip star network. The DAC is configured to supply at least one of a source current, a sink current, and a first reference voltage to the on-chip star network. The wide-range comparator is configured to compare a voltage present on a first I/O pad included in the plurality of I/O pads with a second reference voltage. Advantageously, IO leakage and DC parametric testing may be performed on integrated circuits with high I/O pad counts using an ATE system with a significantly lower quantity of ATE test channels relative to prior approaches.