Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.

Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.

Abstract: Provided is a FinFET device including a substrate having at least one fin, a gate stack, a spacer, a strained layer and a composite etching stop layer. The gate stack is across the at least one fin. The spacer is on a sidewall of the gate stack. The strained layer is in the substrate aside the gate stack. The composite etching stop layer is on the spacer and on the strained layer. Besides, the composite etching stop layer is thicker on the spacer but thinner on the strained layer.

Abstract: A mapping table updating method, a memory control circuit unit and a memory storage device are provided. The mapping table updating method includes: recording first mapping information as a mapping relation between a first virtual block and a first physical erasing unit; recording second mapping information as a mapping relation between the first virtual block and a second virtual block, and the second virtual block is mapped to the first physical erasing unit; and updating the second mapping information as a mapping relation between the first virtual block and a third virtual block if copying data belonging to the first physical erasing unit to a second physical erasing unit, and the third virtual block is mapped to the second physical erasing unit.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate stack structure formed over a substrate. The gate stack structure includes a gate electrode structure having a first portion and a second portion and a first conductive layer below the gate electrode structure. In addition, the first portion of the gate electrode structure is located over the second portion of the gate electrode structure, and a width of a top surface of the first portion of the gate electrode structure is greater than a width of a bottom surface of the second portion of the gate electrode structure.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate stack structure formed over a substrate. The gate stack structure includes a gate electrode structure having a first portion and a second portion and a first conductive layer below the gate electrode structure. In addition, the first portion of the gate electrode structure is located over the second portion of the gate electrode structure, and a width of a top surface of the first portion of the gate electrode structure is greater than a width of a bottom surface of the second portion of the gate electrode structure.

Abstract: Provided is a FinFET device including a substrate having at least one fin, a gate stack, a spacer, a strained layer and a composite etching stop layer. The gate stack is across the at least one fin. The spacer is on a sidewall of the gate stack. The strained layer is in the substrate aside the gate stack. The composite etching stop layer is on the spacer and on the strained layer. Besides, the composite etching stop layer is thicker on the spacer but thinner on the strained layer.

Abstract: A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner sidewall of the spacer, and a filling metal partially wrapped by the first work function metal layer. The filling metal includes a first portion and a second portion, wherein the first portion is between the second portion and the semiconductor substrate, and the second portion is wider than the first portion.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate stack structure formed over a substrate. The gate stack structure includes a gate electrode structure having a first portion and a second portion and a first conductive layer below the gate electrode structure. In addition, the first portion of the gate electrode structure is located over the second portion of the gate electrode structure, and a width of a top surface of the first portion of the gate electrode structure is greater than a width of a bottom surface of the second portion of the gate electrode structure.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.

Abstract: A semiconductor device includes: a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; a channel region under the gate structure; and a protection layer between the substrate and the raised source/drain region. The protection layer is interposed between the substrate and the raised source/drain region. An atom stacking arrangement of the protection layer is different from the substrate and the raised source/drain region.

Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.

Abstract: A facial tracking method for detecting and tracking at least one face image in a region during a time period. The facial tracking method includes a step of performing an image acquiring operation, a step of performing a facial detecting operation to detect whether there is any face image in the entire of a current photo image, and at least one step of performing a facial tracking operation. For performing the facial tracking operation, plural tracking frames are located around a face image of the current photo image, and a similarity between the face image of the current photo image and the image included in each tracking frame in order to judge whether the face image exists in the next photo image. By the facial tracking method of the present invention, the time period of tracking face images is largely reduced.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.

Abstract: A facial tracking method for detecting and tracking at least one face image in a region during a time period. The facial tracking method includes a step of performing an image acquiring operation, a step of performing a facial detecting operation to detect whether there is any face image in the entire of a current photo image, and at least one step of performing a facial tracking operation. For performing the facial tracking operation, plural tracking frames are located around a face image of the current photo image, and a similarity between the face image of the current photo image and the image included in each tracking frame in order to judge whether the face image exists in the next photo image. By the facial tracking method of the present invention, the time period of tracking face images is largely reduced.

Abstract: An electrode slurry which includes an active component, a conductive agent, a binder, an organic solvent, and octylphenolpoly(ethyleneglycolether)x, wherein x=9˜10. The active component, conductive agent, binder, organic solvent, and octylphenolpoly(ethyleneglycolether)x are mixed together. An electrode of lithium battery includes a current collector, and a layer of electrode material applied on a surface of the current collector, wherein a material of the layer of electrode material comprises an active component, a conductive agent, a binder, and octylphenolpoly(ethyleneglycolether)x, wherein x=9˜10.

Abstract: A slide phone includes a first body, a main sheet, a second body, a pair of lever, a keypad, and a pair of supports. The main sheet is mounted on the first body. The second body is slidably installed on the main sheet and capable of moving relative to the first body. When the slide phone is closed, the second body forms a receiving space together with the first body. The levers are positioned to opposite sides of the first body. The keypad is mounted on the levers and can be accommodated in the receiving space when the slide phone is closed, and can be lifted by the levers to be substantially coplanar with an upper surface of the second body when the slide phone is opened. The pair of supports is mounted on the first body adjacent to the lever correspondingly.

Abstract: A light-emitting device having a light-emitting epitaxy structure. The light-emitting epitaxy structure has a modulus of a critical reverse voltage not less than 50 volts, while the light-emitting epitaxy structure is reverse-biased at a current density of ?10 ?A/mm2, and has a luminous efficiency not less than 50 lumen/Watt, while the light-emitting epitaxy structure is forward-biased at a current density of 150 mA/mm2.

Abstract: The present disclosure relates to an electrode slurry of a lithium battery and an electrode formed from the electrode slurry. The electrode slurry includes an active component, a conductive agent, a binder, an organic solvent, and octylphenolpoly(ethyleneglycolether)x, wherein x=9-10. The active component, conductive agent, binder, organic solvent, and octylphenolpoly(ethyleneglycolether)x are mixed together.