Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: Embodiments of the present disclosure relate to communication devices, methods, and apparatuses, and a computer-readable medium. The method includes: receiving a plurality of timing synchronization function (TSF) timer values from a plurality of communication devices, and transmitting control information to at least one communication device among the plurality of communication devices based on the plurality of TSF timer values, wherein the control information is for controlling an operation of the at least one communication device on at least one TSF timer value. Therefore, accurate time synchronization in a network is achieved.

Abstract: Examples of the disclosure relate to communication methods and apparatuses, an access point, stations and a computer readable medium. An embodiment of the method comprises: determining, at an access point and based on determining that a direct link between stations based sensing procedure is triggered, a first station and a second station associated with the sensing procedure; and transmitting, to at least one of the first station and the second station, a sensing performing request for performing the sensing procedure. In this way, target sensing between non-access-point stations is achieved, such that sensing coverage is extended and a sensing effect is improved.

Abstract: An integrated circuit structure includes a substrate, semiconductor devices, an inter-layer dielectric (ILD) structure, an interconnect, a dielectric layer, an etching barrier layer, a conductive layer, and memory units. The semiconductor devices are on the substrate. The ILD structure is over the semiconductor devices. The interconnect is in the ILD structure and electrically connected to the semiconductor devices. The dielectric layer is over the ILD structure. The etching barrier layer is on the first dielectric layer. The conductive layer is on the etching barrier layer. The memory units are stacked in a vertical direction over the etching barrier layer.

Abstract: A programmable memory device includes a ROM block to store instructions associated with functionality of the programmable memory device, a memory array having reserved pages to store updates to be performed on the ROM block, and a controller coupled to the ROM block and the memory array. The controller is to, in response to receipt of a remote command from a vendor server via a host system, execute the instructions to perform operations including: executing a set features command to access the set of reserved pages, as an extension to one time programmable mode; programming a set of sub-feature parameters to a specified feature address of the reserved pages, where the set of sub-feature parameters are to trigger operation within a ROM-emulated memory (REM) profile mode; and programming a REM-profiled page of the reserved pages with REM data received from the vendor server via the host system.

Abstract: A current limiting circuit for controlling current from a power supply to a load having a capacitance includes an inductor, a transistor coupled in a current path with the inductor, and a control circuit. The transistor includes a control terminal. The control circuit is coupled to sense a voltage across the inductor and coupled to the control terminal of the transistor. The control circuit is configured to turn off the transistor when the voltage across the inductor is greater than a threshold to restrict current from a power supply, and turn on the transistor when a defined parameter is met to allow current from the power supply to charge the load capacitance. Other example current limiting circuits are also disclosed.

Abstract: A programmable memory device includes a ROM block to store instructions associated with functionality of the programmable memory device, a memory array having reserved pages to store updates to be performed on the ROM block, and a controller coupled to the ROM block and the memory array. The controller is to, in response to receipt of a remote command from a vendor server via a host system, execute the instructions to perform operations including: executing a set features command to access the set of reserved pages, as an extension to one time programmable mode; programming a set of sub-feature parameters to a specified feature address of the reserved pages, where the set of sub-feature parameters are to trigger operation within a ROM-emulated memory (REM) profile mode; and programming a REM-profiled page of the reserved pages with REM data received from the vendor server via the host system.

Abstract: A programmable memory device includes a read only memory (ROM) block to store instructions associated with functionality of the programmable memory device. The device includes a memory array having a set of reserved pages to store updates to be performed on the ROM block. The device includes a controller coupled to the ROM block and the memory array. The controller is to execute the instructions to: execute a set features command; program, in execution of the set features command, a set of sub-feature parameters to a specified feature address of the set of reserved pages, wherein the set of sub-feature parameters are to trigger operation within a ROM-emulated memory (REM) profile mode; and program a REM-profiled page of the set of reserved pages with REM data received from a host system.

Abstract: A programmable memory device includes a read only memory (ROM) block to store instructions associated with functionality of the programmable memory device. The device includes a memory array having a set of reserved pages to store updates to be performed on the ROM block. The device includes a controller coupled to the ROM block and the memory array. The controller is to execute the instructions to: execute a set features command; program, in execution of the set features command, a set of sub-feature parameters to a specified feature address of the set of reserved pages, wherein the set of sub-feature parameters are to trigger operation within a ROM-emulated memory (REM) profile mode; and program a REM-profiled page of the set of reserved pages with REM data received from a host system.

Abstract: A current limiting circuit for controlling current from a power supply to a load having a capacitance includes an inductor, a transistor coupled in a current path with the inductor, and a control circuit. The transistor includes a control terminal. The control circuit is coupled to sense a voltage across the inductor and coupled to the control terminal of the transistor. The control circuit is configured to turn off the transistor when the voltage across the inductor is greater than a threshold to restrict current from a power supply, and turn on the transistor when a defined parameter is met to allow current from the power supply to charge the load capacitance. Other example current limiting circuits are also disclosed.

Abstract: A current limiting circuit for controlling current from a power supply to a load having a capacitance includes an inductor, a transistor coupled in a current path with the inductor, and a control circuit. The transistor includes a control terminal. The control circuit is coupled to sense a voltage across the inductor and coupled to the control terminal of the transistor. The control circuit is configured to turn off the transistor when the voltage across the inductor is greater than a threshold to restrict current from a power supply, and turn on the transistor when a defined parameter is met to allow current from the power supply to charge the load capacitance. Other example current limiting circuits are also disclosed.

Abstract: A method for manufacturing semiconductor device is provided. A substrate having a memory region and a capacitance region is provided. A plurality of word line structures are formed on the memory region of the substrate. A capacitance structure is formed on the capacitance region of the substrate. The word line structures and the capacitance structure each include a first dielectric layer on the substrate, a first conductive layer on the first dielectric layer, a second dielectric layer on the first conductive layer, and a second conductive layer on the second dielectric layer. The second conductive layers of the word line structures close to an edge of the memory region and a portion of the second conductive layer of the capacitance structure are removed at the same time to form a trench exposing a portion of the second dielectric layer.