Patents by Inventor Wen-Jiun Liu

Wen-Jiun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130164572
    Abstract: A battery device with a verification function, an anti-theft method and a packaging method thereof are disclosed. By detecting electrical characteristics of a battery, an enabling or disable signal is generated. When the enable signal is generated, a transmission unit is triggered for verification as well as obtaining a verification result. When the verification result fails, the self-discharge rate of the battery is increased. This mechanism helps improving the anti-theft function of the battery.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: Metal Industries Research & Development Centre
    Inventors: Kuan Yuen LIAO, Sheng Wei Chen, Wen Jiun Liu
  • Publication number: 20130162214
    Abstract: A capacitor active balancing device with high-voltage differential and the method thereof are disclosed. A plurality of cells are connected in series for charging an energy storage unit under a high-voltage differential. The energy storage unit discharges cells of lower power to achieve battery balancing. The mechanism helps improve the efficiency of battery balancing.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: Metal Industries Research & Development Centre
    Inventors: Kuan Yuen LIAO, Sheng Wei Chen, Wen Jiun Liu
  • Publication number: 20130127055
    Abstract: The mechanisms of forming an interconnect structures described above involves using a reflowed conductive layer. The reflowed conductive layer is thicker in smaller openings than in wider openings. The mechanisms may further involve forming a metal cap layer over the reflow conductive layer, in some embodiments. The interconnect structures formed by the mechanisms described have better electrical and reliability performance.
    Type: Application
    Filed: March 29, 2012
    Publication date: May 23, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-An CHEN, Wen-Jiun LIU, Chun-Chieh LIN, Hung-Wen SU, Ming-Hsing TSAI, Syun-Ming JANG
  • Publication number: 20060193560
    Abstract: A coupling structure between a fiber and a PLC to couple the PLC to the fiber is provided. A substrate includes a PLC region and at least one aligning groove for accommodating the fiber. The PLC region has optical circuits and input/output surfaces of the optical circuits. The input/output surfaces face the aligning groove and are at a non-perpendicular angle with respect to progressing direction of the incident light from the top view of the PLC. Therefore, the coupling loss and reflection during transmission can be effectively reduced.
    Type: Application
    Filed: April 20, 2006
    Publication date: August 31, 2006
    Inventors: Chien-Cheng Yang, Wen-Jiun Liu, Zhi-Cheng Hsiao
  • Publication number: 20060110108
    Abstract: A tunable light transceiver module for adjusting a photoelectric device is provided. The tunable structure includes a photoelectric device, a stage, and a set of two-dimensional actuators having a first direction actuator and a second direction actuator. The photoelectric device is installed on the stage. The first direction actuation device and the second direction actuation device are coupled to the stage for controlling the movement of the stage along the first direction and the second direction, which are parallel to the stage. The tunable module may comprise an additional vertical actuator for controlling the movement of the stage along the direction perpendicular to the stage, thus realizing the displacement adjustment in three dimensions.
    Type: Application
    Filed: September 16, 2005
    Publication date: May 25, 2006
    Inventors: Tsung-Fu Hsieh, Chien-Cheng Yang, Wen-Jiun Liu, Shau-Yi Chen, Jing-Yao Chang
  • Publication number: 20050265664
    Abstract: A coupling structure between a fiber and an optical waveguide to couple the optical waveguide to the fiber is disclosed. A substrate includes an optical waveguide region and at least one aligning groove for containing the fiber. The optical waveguide region has optical circuits and input/output surfaces of the optical circuits. The input/output surfaces face the aligning groove. A non-perpendicular angle is formed between input/output surfaces and the progressing direction of the incident light.
    Type: Application
    Filed: October 25, 2004
    Publication date: December 1, 2005
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Cheng Yang, Wen-Jiun Liu, Zhi-Cheng Hsiao
  • Publication number: 20050220412
    Abstract: An optical splitter with reflection suppression is disclosed. It includes an input waveguide and a plurality of receiving waveguides. The input waveguide has at least one output surface for transferring an incident light to the receiving surfaces of the receiving waveguides. Each of the output surfaces parallels the corresponding receiving surfaces, and an oblique angle is formed between the output surface and the progressing direction of the incident light.
    Type: Application
    Filed: July 29, 2004
    Publication date: October 6, 2005
    Inventors: Wen-Jiun Liu, Chien-Cheng Yang, Zhi-Cheng Hsiao, Shau-Yi Chen, Yun-Wen Lee
  • Patent number: 6804443
    Abstract: Test structure and method of step coverage for optical waveguide production are disclosed. It combines the steps of producing the optical waveguide and the testing structure by forming the optical waveguide components on the chip and the test structure in the surrounding areas, so the optical waveguide and the test structure have the same upper covering layer. Etching solution is used for the etch testing of the test structure, and the step coverage of the upper covering layer for the optical waveguide is extrapolated by the etching result.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: October 12, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Hao Tsai, Jing-Hung Chiou, Kai-Hsiang Yen, Wen-Jiun Liu, Yuh-Wen Lee
  • Patent number: 6737307
    Abstract: A method for forming amorphous silicon films with low defect density on single crystal silicon substrates and structures formed. The method is carried out by first providing a single crystal silicon substrate, then depositing a buffer layer by a material such as silicon oxide, silicon nitride, silicon carbide or a metal on top of the single crystal silicon substrate. An amorphous silicon film of substantial thickness, i.e. of thicker than 1 &mgr;m, is then deposited on top of the buffer layer achieving a smooth top surface.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: May 18, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Hao Tsai, Nai-Hao Kuo, Wen-Jiun Liu, Yuh-Wen Lee
  • Publication number: 20040081417
    Abstract: Test structure and method of step coverage for optical waveguide production are disclosed. It combines the steps of producing the optical waveguide and the testing structure by forming the optical waveguide components on the chip and the test structure in the surrounding areas, so the optical waveguide and the test structure have the same upper covering layer. Etching solution is used for the etch testing of the test structure, and the step coverage of the upper covering layer for the optical waveguide is extrapolated by the etching result.
    Type: Application
    Filed: June 24, 2003
    Publication date: April 29, 2004
    Inventors: Po-Hao Tsai, Jing-Hung Chiou, Kai-Hsiang Yen, Wen-Jiun Liu, Yuh-Wen Lee
  • Publication number: 20040002204
    Abstract: A method for forming amorphous silicon films with low defect density on single crystal silicon substrates and structures formed. The method is carried out by first providing a single crystal silicon substrate, then depositing a buffer layer by a material such as silicon oxide, silicon nitride, silicon carbide or a metal on top of the single crystal silicon substrate. An amorphous silicon film of substantial thickness, i.e. of thicker than 1 &mgr;m, is then deposited on top of the buffer layer achieving a smooth top surface.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 1, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Po-Hao Tsai, Nai-Hao Kuo, Wen-Jiun Liu, Yuh-Wen Lee