Abstract: A MOS transistor including a gate structure, an epitaxial spacer and an epitaxial structure is provided. The gate structure is disposed on a substrate. The epitaxial spacer is disposed on the substrate besides the gate structure, wherein the epitaxial spacer includes silicon and nitrogen, and the ratio of nitrogen to silicon is larger than 1.3. The epitaxial structure is disposed in the substrate besides the epitaxial spacer. A semiconductor process includes the following steps for forming an epitaxial structure. A gate structure is formed on a substrate. An epitaxial spacer is formed on the substrate besides the gate structure for defining the position of an epitaxial structure, wherein the epitaxial spacer includes silicon and nitrogen, and the ratio of nitrogen to silicon is larger than 1.3. The epitaxial structure is formed in the substrate besides the epitaxial spacer.

Abstract: A field effect transistor (FinFET) device includes a substrate, a fin structure, a shallow trench isolation and a gate structure. The fin structure is formed on a surface of the substrate and includes a base fin structure and an epitaxial fin structure formed on the base fin structure. The shallow trench isolation structure is formed on the surface of the substrate and includes a peripheral zone and a concave zone. The peripheral zone physically contacts with the fin structure. The gate structure is disposed on the epitaxial fin structure perpendicularly. A method of fabricating the aforementioned field effect transistor is also provided.

Abstract: A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

Abstract: A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

Abstract: A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

Abstract: A fabrication method of a semiconductor structure includes the following steps. First of all, a gate structure is provided on a substrate, and a first material layer is formed on the substrate and the gate structure. Next, boron dopant is implanted to the substrate, at two sides of the gate structure, to form a first doped region, and P type conductive dopant is implanted to the substrate, at the two sides of the gate structure, to form a second doped region. As following, a second material layer is formed on the first material layer. Finally, the second material layer, the first material layer and the substrate at the two sides of the gate structure are etched sequentially, and a recess is formed in the substrate, at the two sides of the gate structure, wherein the recess is positioned within the first doped region.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; performing a first dry etching process to form a recess in the substrate adjacent to the gate structure; and performing a second dry etching process to expand the recess.