Patents by Inventor Wen-Jung Chiang

Wen-Jung Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935795
    Abstract: Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hung Wang, Tsung-Lin Lee, Wen-Chih Chiang, Kuan-Jung Chen
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Patent number: 10957945
    Abstract: A battery state detection method includes: presetting at least one discharge method and at least one discharge condition of a battery set for estimating a battery state, with the discharge condition including a discharge voltage, discharge time or a relative battery impedance variation; executing a partial discharge procedure of the battery set and measuring partial discharge data; and directly calculating battery state data of the partial discharge data under the discharge method and the discharge condition. The battery state data include a SOH (state of health) datum, a SOC (state of charge) datum or a residual discharging time datum. The detection of the battery set is suitable for a manual operation system, a remote control monitoring system or an automatic scheduling system.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 23, 2021
    Assignee: ABLEREX ELECTRONICS CO., LTD.
    Inventors: Wen-Jung Chiang, Tsung-Hsien Lin, Jhih-Hao Chen, Yu-Hsiu Lin
  • Publication number: 20180205121
    Abstract: A battery state detection method includes: presetting at least one discharge method and at least one discharge condition of a battery set for estimating a battery state, with the discharge condition including a discharge voltage, discharge time or a relative battery impedance variation; executing a partial discharge procedure of the battery set and measuring partial discharge data; and directly calculating battery state data of the partial discharge data under the discharge method and the discharge condition. The battery state data include a SOH (state of health) datum, a SOC (state of charge) datum or a residual discharging time datum. The detection of the battery set is suitable for a manual operation system, a remote control monitoring system or an automatic scheduling system.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 19, 2018
    Inventors: Wen-Jung Chiang, Tsung-Hsien Lin, Jhih-Hao Chen, Yu-Hsiu Lin
  • Patent number: 9887102
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: February 6, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Patent number: 9825547
    Abstract: A multi-level DC-DC converter device includes an inverter, a 3-winding high-frequency transformer, a first full-bridge rectifier, a second full-bridge rectifier, a selective circuit and a filter circuit. A first winding at a primary side of the high-frequency transformer connects with the inverter while a second winding and a third winding of at a secondary side of the high-frequency transformer connect with the first full-bridge rectifier and the second full-bridge rectifier. The selective circuit connects with DC output ports of the first full-bridge rectifier and the second full-bridge rectifier, thereby operationally selecting two serially-connected full-bridge rectifiers or single full-bridge rectifier to output two voltage levels performed as a multi-level output voltage. The filter circuit connects between the selective circuit and a load for filtering harmonics and outputting a DC voltage.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: November 21, 2017
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Wen-Jung Chiang, Kuo-Fang Huang, Wen-Chung Chen
  • Patent number: 9787201
    Abstract: A DC-DC converter is operated in a boost mode by operating a plurality of low-voltage side switches with a first fixed duty cycle (greater than 0.5), with cutting off a plurality of the first high-voltage side switches and a plurality of the second high-voltage side switches, with conducting a plurality of the first diodes of the first high-voltage side switches and a plurality of the second diodes of the second high-voltage side switches, and with alternatively conducting and cutting off a bidirectional switch. In a buck mode, the low-voltage side switches are cut off and a plurality of diodes of the low-voltage side switches are conducted. Furthermore, the first high-voltage side switches are complemented and are operated with a second fixed duty cycle (less than 0.5) while the second high-voltage side switches are conducted and cut off alternatively and the bidirectional switch is switched on and off.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: October 10, 2017
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Wen-Jung Chiang, Kuo-Fang Huang, Wen-Chung Chen
  • Publication number: 20170264205
    Abstract: A DC-DC converter is operated in a boost mode by operating a plurality of low-voltage side switches with a first fixed duty cycle (greater than 0.5), with cutting off a plurality of the first high-voltage side switches and a plurality of the second high-voltage side switches, with conducting a plurality of the first diodes of the first high-voltage side switches and a plurality of the second diodes of the second high-voltage side switches, and with alternatively conducting and cutting off a bidirectional switch. In a buck mode, the low-voltage side switches are cut off and a plurality of diodes of the low-voltage side switches are conducted. Furthermore, the first high-voltage side switches are complemented and are operated with a second fixed duty cycle (less than 0.5) while the second high-voltage side switches are conducted and cut off alternatively and the bidirectional switch is switched on and off.
    Type: Application
    Filed: July 6, 2016
    Publication date: September 14, 2017
    Inventors: Wen-Jung Chiang, Kuo-Fang Huang, Wen-Chung Chen
  • Publication number: 20170207712
    Abstract: A multi-level DC-DC converter device includes an inverter, a 3-winding high-frequency transformer, a first full-bridge rectifier, a second full-bridge rectifier, a selective circuit and a filter circuit. A first winding at a primary side of the high-frequency transformer connects with the inverter while a second winding and a third winding of at a secondary side of the high-frequency transformer connect with the first full-bridge rectifier and the second full-bridge rectifier. The selective circuit connects with DC output ports of the first full-bridge rectifier and the second full-bridge rectifier, thereby operationally selecting two serially-connected full-bridge rectifiers or single full-bridge rectifier to output two voltage levels performed as a multi-level output voltage. The filter circuit connects between the selective circuit and a load for filtering harmonics and outputting a DC voltage.
    Type: Application
    Filed: July 6, 2016
    Publication date: July 20, 2017
    Inventors: Wen-Jung Chiang, Kuo-Fang Huang, Wen-Chung Chen
  • Patent number: 9438132
    Abstract: A multilevel AC/DC power converter device includes a high-frequency power converter including a first AC port and a low-frequency power converter including a second AC port and a DC port. A power converting method includes: serially connecting the first AC port of the high-frequency power converter and the second AC port of the low-frequency power converter; operating frequency of the low-frequency power converter synchronized with frequency of an AC power source and operating the high-frequency power converter with high-frequency PWM to generate a multilevel AC voltage; and controlling the multilevel AC voltage to obtain a current of an input AC port being sinusoidal and in a same phase with a voltage of the AC power source. Accordingly, the input power factor approaches unity and the low-frequency power converter supplies a DC voltage to a load via a DC output port.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: September 6, 2016
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou
  • Patent number: 9407165
    Abstract: A cascade bridge-type DC-AC power converter device includes a low-frequency bridge-type power converter including an AC terminal and a DC bus and a high-frequency bridge-type power converter including an AC terminal. A power conversion method includes: serially connecting the AC terminal of the high-frequency bridge-type power converter and the AC terminal of the low-frequency bridge-type power converter; operating frequency of the low-frequency bridge-type power converter synchronized with frequency of an AC source; and operating the high-frequency bridge-type power converter with high-frequency PWM to generate a multilevel AC voltage. A DC power source connects to the DC bus of the low-frequency bridge-type power converter. No additional power supply circuit will be required for power supply to a DC bus of the high-frequency bridge-type power converter. Accordingly, the power circuit is simplified, and the manufacturing cost is reduced.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: August 2, 2016
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou
  • Publication number: 20160181126
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Application
    Filed: February 26, 2016
    Publication date: June 23, 2016
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Patent number: 9305885
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: April 5, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Patent number: 9065349
    Abstract: A control method for bidirectional DC-DC converter includes: operating a bidirectional DC-DC converter having a low voltage side including a plurality of low-voltage-side switches, a voltage clamping switch and a voltage clamping capacitor, and a high voltage side including a plurality of high-voltage-side switches in a boost mode; switching the voltage clamping switch with a predetermined duty cycle prior to switching on all of the low-voltage-side switches; adjusting the predetermined duty cycle of the voltage clamping switch to be smaller than a turn-off interval of the low-voltage-side switches to reduce the conduction loss of the low-voltage-side switches and the voltage clamping switch; alternatively, operating the DC-DC converter in a buck mode; and adjusting and extending the duty cycle of the low-voltage-side switches to overlap a turn-off time of the high-voltage-side switches to reduce the conduction loss of the low-voltage-side switches.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: June 23, 2015
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Wen-Jung Chiang, Jen-Chieh Chang, Hung-Tien Chen, Yu-Ting Kuo
  • Publication number: 20150137337
    Abstract: A semiconductor package is disclosed, which includes: a die paddle portion; a plurality of conductive portions circumventing the die paddle portion; a power bus bar and a ground bus bar formed around the periphery of the die paddle portion; a semiconductor element attached to the die paddle portion and electrically connected to the conductive portions, the power bus bar, and the ground bus bar by a plurality of bonding wires; and an encapsulant encapsulating the semiconductor element and the bonding wires. The ground bus bar extends outward along the power bus bar and is mutually configured with the power bus bar so as to reduce the loop inductance and resistance of the power bus bar while in use.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 21, 2015
    Applicant: Siliconware Precision Industries Co., Ltd
    Inventors: Tsung-Tien Hsieh, Wen-Jung Chiang
  • Patent number: 8981540
    Abstract: A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: March 17, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cheng-Yu Chiang, Wen-Jung Chiang, Hsing-Hung Lee
  • Patent number: 8923027
    Abstract: A five-level DC-AC converter includes a capacitor set and a full-bridge circuit. The capacitor set contains two DC capacitors, a power electronic switch and two diodes. When the power electronic switch is turned on/off, the two DC capacitors are connected in series/parallel to provide a two-level DC voltage to the full-bridge circuit. The full-bridge circuit further converts the two-level DC voltage to output a voltage with three voltage levels in the positive half cycle and three voltage levels in the negative half cycle. This achieves the goal of using five power electronic switches to convert DC power into AC power with five voltage levels.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: December 30, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Ming-Pin Mai, Chia-Wei Chou, Mao-Jang He
  • Patent number: 8878489
    Abstract: An estimation method for residual discharging time of batteries includes the steps of: providing a set of battery-discharge-current intervals and a set of battery-discharge equations, setting the discharge time of each battery-discharge-current intervals at zero; detecting a discharge current, voltage and time of batteries; judging whether the discharge current exceeds all of the battery-discharge-current intervals; selecting one of the battery-discharge-current intervals and the associated battery-discharge equation according to the detected discharge current; calculating an estimation of residual discharging time; accumulating and recording the discharge time; judging whether the discharge voltage is lower than a predetermined value and calculating an estimation error of the residual discharging time; and adjusting parameters of the battery-discharge equation for reducing the estimation error of the residual discharging time if the estimation error is greater than a predetermined error value.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: November 4, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Yu-Hua Sun, Chin-Chang Wu, Wen-Jung Chiang
  • Publication number: 20140301124
    Abstract: A cascade bridge-type DC-AC power converter device includes a low-frequency bridge-type power converter including an AC terminal and a DC bus and a high-frequency bridge-type power converter including an AC terminal. A power conversion method includes: serially connecting the AC terminal of the high-frequency bridge-type power converter and the AC terminal of the low-frequency bridge-type power converter; operating frequency of the low-frequency bridge-type power converter synchronized with frequency of an AC source and operating the high-frequency bridge-type power converter with high-frequency PWM to generate a multilevel AC voltage. A DC power source connects to the DC bus of the low-frequency bridge-type power converter. No additional power supply circuit will be required for power supply to a DC bus of the high-frequency bridge-type power converter. Accordingly, the power circuit is simplified and the manufacturing cost is reduced.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 9, 2014
    Applicant: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou
  • Publication number: 20140301119
    Abstract: A multilevel AC/DC power converter device includes a high-frequency power converter including a first AC port and a low-frequency power converter including a second AC port and a DC port. A power converting method includes: serially connecting the first AC port of the high-frequency power converter and the second AC port of the low-frequency power converter; operating frequency of the low-frequency power converter synchronized with frequency of an AC power source and operating the high-frequency power converter with high-frequency PWM to generate a multilevel AC voltage; controlling the multilevel AC voltage to obtain a current of an input AC port being sinusoidal and in same phase with a voltage of the AC power source. Accordingly, the input power factor approaches unity and the low-frequency power converter supplies a DC voltage to a load via a DC output port.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 9, 2014
    Applicant: Ablerex Electronics Co., Ltd.
    Inventors: Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou