Abstract: The present disclosure provides a high electron mobility transistor (HEMT) including a substrate; a buffer layer over the substrate; a GaN layer over the buffer layer; a first AlGaN layer over the GaN layer; a first AlN layer over the first AlGaN layer; a p-type GaN layer over the first AlN layer; and a second AlN layer on the p-type GaN layer.

Abstract: A semiconductor device includes a III-V compound semiconductor layer, a III-V compound barrier layer, a gate trench, and a p-type doped III-V compound layer. The III-V compound barrier layer is disposed on the III-V compound semiconductor layer. The gate trench is disposed in the III-V compound barrier layer. The p-type doped III-V compound layer is disposed in the gate trench, and a top surface of the p-type doped III-V compound layer and a top surface of the III-V compound barrier layer are substantially coplanar.

Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, recesses, a passivation layer and an etch mask layer. The group III-V body layer is disposed on the substrate. The group III-V barrier layer is disposed on the group III-V body layer in the active region and the isolation region. The recesses are disposed in the group III-V barrier layer in the active region and the isolation region, respectively. The passivation layer disposed in the recesses of the active region and the isolation region. The etch mask layer disposed between the passivation layer and the group III-V barrier layer in the active region, where the etch mask layer is spaced apart from bottoms of the recesses in the active region and the isolation region.

Abstract: Provided are a nitride semiconductor device and a manufacturing method thereof. The nitride semiconductor device includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first metal layer, a second metal layer and a dielectric layer. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer. The first metal layer is disposed in the second nitride semiconductor layer. The second metal layer is disposed on the second nitride semiconductor layer. The dielectric layer is disposed between the first metal layer and the second nitride semiconductor layer and/or between the second metal layer and the second nitride semiconductor layer.

Abstract: Provided are a nitride semiconductor device and a manufacturing method thereof. The nitride semiconductor device includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a metal layer and a dielectric layer. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a trench. The trench exposes a part of the first nitride semiconductor layer. The metal layer is disposed in the trench. The dielectric layer is disposed in the trench and located between the metal layer and the first nitride semiconductor layer.

Abstract: A capacitor structure includes an insulation layer and a capacitor unit disposed on the insulation layer. The capacitor unit includes a first electrode, a second electrode, a first dielectric layer, and a patterned conductive layer. The second electrode is disposed above the first electrode in a vertical direction. The first dielectric layer is disposed between the first electrode and the second electrode in the vertical direction. The patterned conductive layer is disposed between first electrode and the second electrode, the patterned conductive layer is electrically connected with the first electrode, and the first dielectric layer surrounds the patterned conductive layer in a horizontal direction.

Abstract: A semiconductor transistor structure with reduced contact resistance includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a two-dimensional electron gas (2DEG) layer at an interface between the barrier layer and the channel layer, and a recess in a contact region. The recess penetrates through the barrier layer and extends into the channel layer. An Ohmic contact metal is disposed in the recess. The Ohmic contact metal is in direct contact with a vertical side surface of the barrier layer in the recess and in direct contact with an inclined side surface of the 2DEG layer and the channel layer in the recess.

Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.

Abstract: A method for forming a high-electron mobility transistor is disclosed. A substrate is provided. A buffer layer is formed over the substrate. A GaN channel layer is formed over the buffer layer. An AlGaN layer is formed over the GaN channel layer. A GaN source layer and a GaN drain layer are formed on the AlGaN layer within a source region and a drain region, respectively. A gate recess is formed in the AlGaN layer between the source region and the drain region. A p-GaN gate layer is then formed in and on the gate recess.

Abstract: The present invention provides a method of forming an insulating structure of a high electron mobility transistor (HEMT), firstly, a gallium nitride layer is formed, next, an aluminum gallium nitride layer is formed on the gallium nitride layer, then, a first patterned photoresist layer is formed on the aluminum gallium nitride layer, and a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer, next, an insulating layer is formed and filling up the groove. Afterwards, a second patterned photoresist layer is formed on the insulating layer, wherein the pattern of the first patterned photoresist layer is complementary to the pattern of the second patterned photoresist layer, and part of the insulating layer is removed, then, the second patterned photoresist layer is removed, and an etching step is performed on the remaining insulating layer to remove part of the insulating layer again.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, a barrier layer on the buffer layer, a p-type semiconductor layer on the buffer layer, a gate electrode on the p-type semiconductor layer, a source electrode and a drain electrode adjacent to two sides of the gate electrode on the barrier layer, a hard mask on the barrier layer and around the p-type semiconductor layer, the source electrode, and the drain electrode, and a passivation layer on the hard mask.

Abstract: An insulating structure of a high electron mobility transistor (HEMT) is provided, which comprises a gallium nitride layer, an aluminum gallium nitride layer disposed on the gallium nitride layer, a groove disposed in the gallium nitride layer and the aluminum gallium nitride layer, an insulating layer disposed in the groove, wherein a top surface of the insulating layer is aligned with a top surface of the aluminum gallium nitride layer, and a passivation layer, disposed on the aluminum gallium nitride layer and the insulating layer.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

Abstract: A high electron mobility transistor (HEMT) and method for forming the same are disclosed. The high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation and the mesa structure. The mesa structure includes a channel layer and a barrier layer disposed on the channel layer. The contact structure includes a body portion and a plurality of protruding portions. The body portion is through the passivation layer. The protruding portions connect to a bottom surface of the body portion and through the barrier layer and a portion of the channel layer.

Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a group III-V gate structure and a group III-V patterned structure. The group III-V body layer and the group III-V barrier layer are disposed on the substrate. The group III-V gate structure is disposed on the group III-V barrier layer within the active region. The group III-V patterned structure is disposed on the group III-V barrier layer within the isolation region. The composition of the group III-V patterned structure is the same as the composition of the group III-V gate structure.

Abstract: According to an embodiment of the present invention, a method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.