Patents by Inventor Wen Ling

Wen Ling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144604
    Abstract: Aspects of the subject disclosure may include, for example, capturing a first depiction of an exhibit environment, wherein the first depiction of the exhibit environment comprises an image of at least one artifact and an image of at least one interface element, and wherein the at least one interface element is located in the exhibit environment at a first location relative to the at least one artifact; obtaining a first user profile of a first user, wherein the first user profile comprises at least one first preference of the first user, and wherein the first user is located in a first remote environment; and facilitating a presenting of a first modified version of the first depiction of the exhibit environment in the first remote environment, wherein the first modified version moves the image of the at least one interface element to a second location relative to the at least one artifact, wherein the second location is different than the first location, and wherein the second location is selected based upon
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Eric Zavesky, Jean-Francois Paiement, Wen-Ling Hsu, Tan Xu, Aritra Guha, Qiong Wu
  • Patent number: 11972984
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 30, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
  • Patent number: 11969448
    Abstract: A probiotic composition for improving an effect of a chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is disclosed in the present disclosure. The probiotic composition comprises an effective amount of Lactobacillus paracasei GMNL-133, an effective amount of Lactobacillus reuteri GMNL-89, and a pharmaceutically acceptable carrier, wherein the Lactobacillus paracasei GMNL-133 was deposited in the China Center for Type Culture Collection on Sep. 26, 2011 under an accession number CCTCC NO. M 2011331, and the Lactobacillus reuteri GMNL-89 was deposited in the China Center for Type Culture Collection on Nov. 19, 2007 under an accession number CCTCC NO. M 207154. A method for improving the effect of the chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is further disclosed in the present disclosure.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 30, 2024
    Assignee: GENMONT BIOTECH INC.
    Inventors: Wan-Hua Tsai, I-ling Hsu, Shan-ju Hsu, Wen-ling Yeh, Ming-shiou Jan, Wee-wei Chieng, Li-jin Hsu, Ying-chun Lai
  • Publication number: 20240136472
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240136444
    Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Inventors: Yu-Chu Lin, Chi-Chung Jen, Wen-Chih Chiang, Yi-Ling Liu, Huai-Jen Tung, Keng-Ying Liao
  • Publication number: 20240136291
    Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.
    Type: Application
    Filed: January 12, 2023
    Publication date: April 25, 2024
    Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
  • Patent number: 11964409
    Abstract: A multi-shot moulding part structure includes a first structural part, an ink decoration layer, and a second structural part. The first structural part has a first area surface, a second area surface, and a joining surface located on the second area surface. The joining surface is non-parallel to the second area surface. The ink decoration layer is spread on the first area surface and the second area surface, but not on the joining surface. The second structural part is combined with the first structural part and covers the second area surface. The second structural part touches the joining surface. By the second structural part touching the joining surface of the first structural part that is not coated with the ink decoration layer, the structural bonding strength between the first structural part and the second structural part is enhanced.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 23, 2024
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Wen-Ching Lin, Ting-Yu Wang, Fa-Chih Ke, Yu-Ling Lin, Wen-Hsiang Chen
  • Patent number: 11965069
    Abstract: A heat-shrinkable polyester film made of a polyester-forming resin composition includes a recycled material, and has an exothermic crystallization peak and an endothermic melting peak which are determined via differential scanning calorimetry, and which satisfy relationships of T2?T1?68° C. and T3?T2?78° C., where T1 represents an onset point of the exothermic crystallization peak, T2 represents an end point of the exothermic crystallization peak and an onset point of the endothermic melting peak, and T3 represents an end point of the endothermic melting peak. A method for manufacturing the heat-shrinkable polyester film is also disclosed.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 23, 2024
    Assignee: FAR EASTERN NEW CENTURY CORPORATION
    Inventors: Li-Ling Chang, Yow-An Leu, Ting-Yu Lin, Ching-Chun Tsai, Wen-Yi Chang
  • Patent number: 11966322
    Abstract: A method, computer program product and system are provided for preloading debug information based on the presence of incremental source code files. Based on parsed input parameters to a source code debugger, a source code repository and a local storage area are searched for an incremental file. In response to the incremental file being located, a preload indicator in the incremental file, which is a source code file, is set. Based on the preload indicator being set, debug symbol data from the incremental file is merged to a preload symbol list. In response to receiving a command to examine the debug symbol data from the incremental file, the preload symbol list is searched for the requested debug symbol data.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: April 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiao Ling Chen, Xiao Xuan Fu, Jiang Yi Liu, Zhan Peng Huo, Wen Ji Huang, Qing Yu Pei, Min Cheng, Yan Huang
  • Patent number: 11967546
    Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
  • Publication number: 20240129889
    Abstract: For example, a method includes collecting orientation data from a mobile device as a user of the mobile device moves within an indoor space, generating orientation estimates for the mobile device from the orientation data, generating distance estimates representing distances of the mobile device to a wireless access point in the indoor space, storing the orientation estimates and the distance estimates together as a series of data blocks, constructing a plurality of trajectory segments from the orientation estimates, identifying identifiers for a last number of trajectory segments, using data blocks corresponding to the last number of trajectory segments, and identifying a predicted place within the indoor space to which the user is expected to go by using the identifiers to traverse a prediction tree, where branches of the prediction tree that are associated with the identifiers define a path that ends at a leaf node corresponding to the predicted place.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 18, 2024
    Inventors: Manoop Talasila, Qiong Wu, Wen-Ling Hsu, Xiaopeng Jiang, Cristian Borcea, Pritam Sen
  • Publication number: 20240108230
    Abstract: The embodiments of the disclosure provide a method for evaluating a health condition indicator of a subject, a host, and a computer readable storage medium. The method includes: obtaining a reference heart rate of the subject and determining a heart rate indicator of the subject according to the reference heart rate; determining a fitness indicator of the subject based on physiological information of the subject; determining an age indicator of the subject based on an age of the subject; and determining the health condition indicator of the subject at least based on the heart rate indicator, the fitness indicator, and the age indicator.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: BOMDIC INC.
    Inventors: Yao Shiao, Shao Wen Tou, Yu-Ting Liu, Amy Pei-Ling Chiu
  • Publication number: 20240112766
    Abstract: Systems and methods for the recruitment, registration, or tracking of results associated with individuals who are in close contact with other individuals, for example, individuals who are organization/entity members, are provided. These systems and methods may utilize a mobile application and a cloud-based computing architecture to permit a user to register and identify relationships between individuals or identify relationships between individuals and an organization/entity. The systems and methods may enable generation of information related to registration status, testing participation information, test results, or information related to actions, decisions, or status related to a testing program. The systems and methods may enable an organization/entity to manage staffing or utilization of services based on data from a testing program.
    Type: Application
    Filed: June 21, 2023
    Publication date: April 4, 2024
    Applicant: FloodLAMP Biotechnologies, PBC
    Inventors: Randall James TRUE, Theresa Chia-Wen LING
  • Publication number: 20240113234
    Abstract: An integrated chip including a gate layer. An insulator layer is over the gate layer. A channel structure is over the insulator layer. A pair of source/drains are over the channel structure and laterally spaced apart by a dielectric layer. The channel structure includes a first channel layer between the insulator layer and the pair of source/drains, a second channel layer between the insulator layer and the dielectric layer, and a third channel layer between the second channel layer and the dielectric layer. The first channel layer, the second channel layer, and the third channel layer include different semiconductors.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 4, 2024
    Inventors: Ya-Yun Cheng, Wen-Ling Lu, Yu-Chien Chiu, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11947966
    Abstract: A computer-implemented method includes preprocessing, by a compiler, a plurality of macros in a computer program. Preprocessing a macro includes identifying a compile time condition associated with the macro. Preprocessing the macro further includes determining a current value of the compile time condition at the time of compiling a computer instruction and a previous value of the compile time condition. Preprocessing the macro further includes determining a set of computer instructions enclosed by the macro. The method further includes storing a macro information record that includes the compile time condition, the current value and the previous value of the compile time condition, and an identification of the set of computer instructions enclosed by the macro.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: April 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Wen Ji Huang, Xiao Ling Chen, Wen Bin Han, Sheng Shuang Li, Xiao Zhen Zhu
  • Publication number: 20240104858
    Abstract: Creating scent models and using scent models in cross-reality environments can include capturing experience data identifying a scent detected and a context in which the scent was detected. The experience data can be provided to a scent modeling service to generate a scent model that can represent perceived scents and perceived scent intensities for a user. The scent model can be used to generate cross-reality session data to be used in a cross-reality session presented by a cross-reality device. The cross-reality device can include a scent generator and can generate the cross-reality session using data obtained from the user device. The cross-reality device can generate a further scent during the cross-reality session based on the scent model.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Wen-Ling Hsu, Eric Zavesky, Louis Alexander, Aritra Guha, Jean-Francois Paiement, Qiong Wu, Zhengyi Zhou
  • Publication number: 20240104467
    Abstract: Tasks associated with users can be managed for efficient workflow management. A task management component (TMC) can analyze, including performing artificial intelligence-based analysis on, task-related information relating to associated with a user(s), assessment information relating to assessing performance or expertise associated with a task, biometric information relating to health, diet, and activity associated with the user(s), and/or user(s) feedback information. Based on the analysis, TMC can adaptively adjust respective attributes associated with respective tasks, resulting in respective adjusted attributes associated with the respective tasks. Based on the respective adjusted attributes, TMC can determine task information and can present the task information to a device(s) associated with the user(s) to facilitate performance of the tasks.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Aritra Guha, Zhengyi Zhou, Jean-Francois Paiement, Eric Zavesky, Jianxiong Dong, Wen-Ling Hsu, Qiong Wu, Louis Alexander
  • Publication number: 20240098734
    Abstract: A method of wireless communication at UE is disclosed herein. The method includes transmitting at least one of a first indication including UE capability information indicating that the UE is capable of transmitting in UL during one or more MGs or a second indication including information indicating a first set of slots corresponding to the one or more MGs. The method includes obtaining a configuration to transmit a set of UL transmissions based on at least one of the first indication or the second indication. The method includes transmitting, based on the configuration, the set of UL transmissions in the first set of slots corresponding to the one or more MGs.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Changhwan PARK, Xiao Feng WANG, Liangping MA, Bharat SHRESTHA, Jae Ho RYU, Rebecca Wen-Ling YUAN, Sanghoon KIM
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20240088246
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang