Abstract: The invention describes methods and systems for monitoring the performance of an optical network by marking a group of optical signals with a set of identification tags which are unique to network characteristics. In the preferred embodiments, fiber identification (FID) and bundle identification (BID) tags are encoded into optical signals by marking an optical signal with low frequency dither tones whose frequencies are unique to the fiber section and to a bundle of fibers respectively. Detecting of the FID and BID tones provides more effective and accurate monitoring of performance of the optical network and allows determining of the network topology, e.g. paths of optical channels and traffic load through different fiber sections in the network. Other sets of hierarchically arranged identifiers encoded into optical signals have also been proposed, including band, conduit, city, region, country, etc. identifiers, as well as identifiers related to network security and service characteristics.

Abstract: A semiconductor device having a silicon oxide/silicon nitride/silicon oxide (“ONO”) structure is formed by providing a first silicon oxide layer and a silicon nitride layer over a substrate having a memory region and a logic device region; patterning the first silicon oxide layer and the silicon nitride layer to define bottom oxide and silicon nitride portions of partially completed ONO stacks and to expose the substrate in the logic device regions; performing a rapid thermal annealing process in the presence of a radical oxidizing agent to form concurrently a second silicon oxide layer on the exposed surface of the silicon nitride layer and a gate oxide layer over the substrate; and depositing a conductive layer over the completed ONO stacks and the gate oxide. The invention is employed in manufacture of, for example, memory devices having and peripheral logic devices and memory cells including ONO structures.

Abstract: A method of reducing the pattern effect in the CMP process. The method comprises the steps of providing a semiconductor substrate having a patterned dielectric layer, a barrier layer on the patterned dielectric layer, and a conductive layer on the barrier layer; performing a first CMP process to remove part of the conductive layer before the barrier layer is polished, thereby a step height of the conductive layer is reduced; depositing a layer of material substantially the same as the conductive layer on the conductive layer; and performing a second CMP process to expose the dielectric layer. A method of eliminating the dishing phenomena after a CMP process and a CMP rework method are also provided.

Abstract: The portable device comprises a control IC imbedded in the portable device and a RF module coupled to the control IC for wireless communication. A display and an input unit are coupled to said control IC. Memory is coupled to the control IC to store data and a projection display module is coupled to said control IC for the data projection. The projection display module includes three liquid crystal panels that perform image displays in red, green, and blue, respectively; light emitting sources employed and positioned in correspondence with the liquid crystal panels, respectively. A dichroic prism is used for each display color combination, wherein the liquid crystal panels and the said light emitting sources are positioned on the light-incidence side of the side surfaces of said dichroic prism. A projection lens is provided on the light emission side of the dichroic prism.

Abstract: A method for adjusting attributes of a video signal within a system is disclosed. The system includes a display device and a host. The display device has a first signal attribute specification, and the video signal has a second signal attribute specification. The first step of this method is to output a video signal from the host. The display device responds with a status signal to the host according to the first and the second signal attribute specifications. Afterward, the host can modify the attributes of the video signal according to the status signal.

Abstract: An optical assembly includes a barrel including a slot, a lens installed inside the barrel for magnifying an image, a magnification-adjusting mechanism installed outside and around the barrel including an adjusting loop installed outside the barrel in a rotatable manner including a groove on a side facing the barrel, and a roller installed between the adjusting loop and the barrel. The optical machine further includes a rod for adjusting the magnification of the lens. One end of the rod is installed inside the slot of the barrel in a slidable manner, and another end of the rod is installed inside the groove of the adjusting loop in a slidable manner.

Abstract: A monitor with an adjustable angle and operating method thereof. The monitor includes a rotation component to control display angle, an OSD (On Screen Display) module, a microprocessor and a motor. The OSD module provides an interface from which a target angle can be selected, and the OSD module transmits a first control signal corresponding to the target angle to the microprocessor. The microprocessor transmits a second control signal corresponding to the first control signal to the motor. The motor drives the rotation component to automatically adjust angle of the monitor to the target angle according to the second control signal.

Abstract: A method of fabricating an array of trapped charge memory cells is described that eliminates bird's beak issues. Implants at a tilt angle form pockets in a substrate that reduce problems resulting from a short channel effect.

Abstract: A method of forming a protective layer over a metal filled semiconductor feature to prevent metal oxidation including providing a semiconductor process wafer comprising an insulating dielectric layer having an opening for forming a semiconductor feature; blanket depositing a metal layer over the opening to substantially fill the opening; and, blanket depositing a protective layer comprising at least one of a oxidation resistant metal and metal nitride over the metal layer.

Abstract: A lampshade includes a main body made of silicone rubber and preset in shape. The main body has its upper and lower circumferential edge respectively wrapped inside with an elastic bar and the inner side of its upper circumferential edge provided with a plurality of lugs respectively bored with an insert hole. The supporting bars at the upper end of a lamp holder are respectively inserted and fixed in the insert holes at the upper inner side of the main body to prop open the upper side of the main body and let the lower side drop downward naturally to form a lampshade for use. The lampshade made of flexible silicone rubber with excellent plasticity can be collapsed to diminish its dimensions when it is not in use.

Abstract: The present invention relates to a device for directing and accelerating the growth of neuronal axon or neurite. The invention accelerates the growth speed of axon of nerve cells by using a substrate configured with a discontinuous micropattern of neuronal path-finding molecules or material thereon. The invention can reduce the connection or regeneration time of neural network. The present invention also discloses a micro-contact printing method for producing the device.

Abstract: A single-poly two-transistor PMOS memory cell for multiple-time programming applications includes a PMOS floating gate transistor sharing a drain/source P+ diffusion region with a PMOS select gate transistor all formed within a first n-well. A control plate for the floating gate transistor is formed in a second n-well. A single-poly two-transitor PMOS memory cell for one-time programming applications includes a PMOS floating gate transistor having a source formed as a p+ diffusion region in a single n-well. The source is adapted to also serve as control plate for the floating gate transistor.

Abstract: A method for forming a memory device includes providing a substrate, providing a plurality of features on the substrate, and forming a silicon-rich dielectric layer over the features. An inter-layer dielectric (ILD) or inter-metal dielectric (IMD) layer may be formed by a spin-on-glass (SOG) process on the silicon-rich dielectric layer, the silicon-rich dielectric layer preventing diffusion of a solvent used in the SOG process.

Abstract: Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.

Abstract: A novel method for preventing the formation of voids in metal interconnects fabricated on a wafer, particularly during a thermal anneal process, is disclosed. The method includes fabricating metal interconnects between metal lines on a wafer. During a thermal anneal process carried out to reduce electrical resistance of the interconnects, the wafer is positioned in spaced-apart relationship to a wafer heater. This spacing configuration facilitates enhanced stabilility and uniformity in heating of the wafer by reducing the presence of particles on and providing a uniform flow of heated air or gas against and the wafer backside. This eliminates or at least substantially reduces the formation of voids in the interconnects during the anneal process.

Abstract: A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

Abstract: A variable polarization independent optical power splitter is disclosed. An input light beam “A” is split into two output light beams “M” and “N” where the optical power ratio of the two output light beams “M” and “N” is adjusted to a desired ratio by controlling a variable polarization rotator, e.g. a liquid crystal unit. The polarization components “P” and “S” of the input light beam “A” are separated in a first polarization separator, then processed through the variable polarization rotator, and a second polarization separator. The polarization independence of the power split is thus achieved through the stratagem of processing the “P” and “S” polarized components of the input light beam “A” separately, resulting in four light beams “H”, “I”, “L” and “K”, which are appropriately combined in the polarization combiner to yield the output light beams “M” and “N” having the desired optical power ratio “R”.

Abstract: This invention provides nucleic acid sequences and characterization of the gene cluster responsible for the biosynthesis of the enediyne C-1027 (produced by Streptomyces globisporus). The pathway comprises a nonriobsomal peptide synthetase (NRPS). Methods are provided for the biosynthesis of enediynes, enediyne analogs and other biological molecules.

Abstract: This invention provides nucleic acid sequences and characterization of the gene cluster responsible for the biosynthesis of the enediyne C-1027 (produced by Streptomyces globisporus). Methods are provided for the biosynthesis of enediynes, enediyne analogs and other biological molecules. This invention also provides enediyne and enediyne analogs biosynthesized by manipulation of the C-1027 gene pathway.

Abstract: The invention is a method of reducing catalyst dissolution in the cathode of a membrane electrode assembly fuel cell, said method comprising the steps of: (a) preparing a membrane electrode assembly comprising an anode, a cathode and a polymer electrolyte membrane interposed between said anode and said cathode; (b) assembling a fuel cell using said membrane electrode assembly; (c) applying a fluid comprising an oxidant to said cathode of said membrane electrode assembly; (d) applying a fluid comprising a fuel to said anode of said membrane electrode assembly; and (e) supplying a sufficient quantity of reducing agent to said cathode to maintain the average open-circuit voltage of said cathode at less than about 0.98 V.