Patents by Inventor Wen (Phil) Shih CHEN

Wen (Phil) Shih CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250128241
    Abstract: A catalyst comprises gold particles and titanium-containing particles. The catalyst comprises gold particles that are within at least 15 nm of at least one titanium-containing particle. The gold particles have an average diameter of less than 15 nm and a standard deviation of +/?5 nm. A method for preparing methyl methacrylate from methacrolein and methanol using the catalyst is also disclosed.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 24, 2025
    Inventors: Kirk W. Limbach, Christopher D. Frick, Wen Sheng Lee, Victor J. Sussman
  • Publication number: 20250133758
    Abstract: A method for forming a semiconductor structure is provided. The method includes forming a second semiconductor layer on a first semiconductor layer. The first semiconductor layer and the second semiconductor layer have different energy bandgaps. The method further includes performing an etching process to form an opening exposing a first vertical sidewall of the first semiconductor layer and a second vertical sidewall of the second semiconductor layer. The method further includes forming an electrode structure in the opening to cover the first vertical sidewall and the second vertical sidewall.
    Type: Application
    Filed: October 24, 2023
    Publication date: April 24, 2025
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yung-Fong LIN, Kwang-Ming LIN, Li-Wen CHUANG, Tsung-Hsiang LIN, Ting-En HSIEH
  • Publication number: 20250132208
    Abstract: The present disclosure provides a redistribution structure that includes a metal line, a first dielectric layer disposed over the metal line, a first etch stop layer (ESL) disposed over the first dielectric layer, a second dielectric layer disposed over the first ESL, and a conductive via extending through the second dielectric layer, the first ESL and the first dielectric layer to contact the metal line. A lower portion of the second dielectric layer extends downward through the first ESL and the first dielectric layer and partially into the metal line.
    Type: Application
    Filed: February 13, 2024
    Publication date: April 24, 2025
    Inventors: Tzu-Ting Liu, Wen-Chiung Tu, Ming-Wei Lee, Chen-Chiu Huang, Dian-Hau Chen
  • Publication number: 20250133668
    Abstract: An inflator with an energy storage power source includes: a housing having a top end face, a bottom end face and a number of sidewalls between the top end face and the bottom end face; a control circuit board arranged within the housing and having a display mounted thereon; a compressor assembly arranged within the housing and including a casing and a compressor arranged within the casing; a battery module arranged within the housing and electrically connected to the control circuit board and the compressor; and a mounting member connected to the housing.
    Type: Application
    Filed: October 11, 2024
    Publication date: April 24, 2025
    Inventors: Mingrong Wen, Qijie Shi, Zheyu Chen
  • Publication number: 20250133931
    Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate and a display apparatus, wherein the display substrate includes: a base substrate; an anode layer arranged on the base substrate and comprising a plurality of anodes arranged at intervals; a pixel defining layer disposed on the base substrate, the pixel defining layer defining a plurality of pixel areas and covering an edge area of each of the anodes; a light-emitting functional layer arranged on a side of the anode layer away from the base substrate, the light-emitting functional layer at least covering the pixel areas; and a cathode layer and a metal patterning layer arranged on a side of the light-emitting functional layer away from the base substrate.
    Type: Application
    Filed: January 3, 2023
    Publication date: April 24, 2025
    Inventors: Yansong LI, Haidong WU, Jingbo XU, Xiaobo DU, Pengfei ZUO, Na BI, Xiangmin WEN
  • Publication number: 20250131546
    Abstract: A method of adaptably detecting dirt, occlusion and smudge on camera lens and image sensor includes capturing an image; subjecting original pixels of the image to sampling to result in sampled pixels; excluding outliers of the sampled pixels to result in retained pixels; obtaining an average value of the retained pixels; obtaining a tolerance value according to luminance values of the retained pixels; generating a threshold value for determining dirt, occlusion and smudge on camera lens and image sensor in the image according to the tolerance value and the average value of the retained pixels; and comparing a luminance value of at least one pixel of the image with a corresponding threshold value.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 24, 2025
    Inventors: Yi-Kai Chen, Chun-Chi Huang, Wen-Yi Chang
  • Publication number: 20250132235
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first non-conductive layer over a top side a semiconductor die and patterning the first non-conductive layer to form an opening exposing a top surface of a bond of the semiconductor die. A metal trace of a redistribution layer is formed over a portion of the first non-conductive layer and exposed top surface of the bond pad. A surrounding bump metallization (SBM) structure is formed on a portion of the metal trace. The SBM structure includes a plurality of vertical metal wall segments surrounding a central opening.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Inventors: Kuan-Hsiang Mao, Che Ming Fang, Wen Yuan Chuang, Wen Hung Huang
  • Publication number: 20250133324
    Abstract: A headphone device of the invention includes a headband, a pair of joining members, a pair of holding members and a pair of sound generating modules. The headband is arc-shaped and has a first end and a second opposite to the first end. The joining members are movably disposed on the headband to approach or apart from the first end and the second end, and each of the joining members includes an upper contact portion extending towards another of the joining member. The holding members are rotatably joined to the joining members respectively, wherein each of the holding members includes a first pivot portion rotatably connected to one of the joining members and a holding portion secured to first pivot portion. The sound generating modules detachably disposed in the holding portion. The holding members rotate between a stretch position and a fold position.
    Type: Application
    Filed: August 9, 2024
    Publication date: April 24, 2025
    Inventors: Tung-Wen TU, Chia-Shuo CHANG, Chi-Tai HO, Ke-Hua LIN
  • Publication number: 20250130149
    Abstract: Provided is a driving device for detecting mechanical characteristics and electrical characteristics of cells. A structure of the driving device includes a piezoelectric stack, a bridge-type flexible hinge mechanism, a parallel hinge mechanism, a lead screw guide rail, a stepping motor, a linear displacement sensor, a force sensor, a ceramic needle, a first electrode, a second electrode, a cell container, an XY axis displacement platform, a positioning hole, a first metal base, a second metal base, a first metal connecting plate, a second metal connecting plate, a first pre-tightening wedge, a second pre-tightening wedge, screws, and a pre-tightening screw. During the operation of the driving device, the piezoelectric stack is driven under an excitation effect of a driving electric field signal, such that the bridge-type flexible hinge mechanism stretches, and the ceramic needle is driven by the parallel flexible hinge mechanism to move downwards.
    Type: Application
    Filed: August 28, 2024
    Publication date: April 24, 2025
    Applicant: Zhejiang Normal University
    Inventors: Jianping LI, Jianming WEN, Yili HU, Jijie MA, Junwu KAN, Zhonghua ZHANG, Song CHEN, Yingting WANG, Kang CHEN, Shuqi JIANG, Guangming CHENG, Nen WAN
  • Publication number: 20250132273
    Abstract: An electronic package is formed by disposing an electronic element and a lead frame having a plurality of conductive posts on a carrier structure having an antenna function, and encapsulating the electronic element and the lead frame with an encapsulant. The encapsulant is defined with a first encapsulating portion and a second encapsulating portion lower than the first encapsulating portion. The electronic element is positioned in the first encapsulating portion, and the plurality of conductive posts are positioned in the second encapsulating portion. End surfaces of the plurality of conductive posts are exposed from a surface of the second encapsulating portion so as to be electrically connected to a connector.
    Type: Application
    Filed: January 2, 2025
    Publication date: April 24, 2025
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai
  • Publication number: 20250133775
    Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, a trench, an erase gate, a control gate, and a floating gate. The trench is disposed in the substrate. The erase gate is disposed in the trench and includes a concave corner. The control gate is disposed on the substrate, and a bottom surface of the control gate is higher than a bottom surface of the erase gate. The floating gate is disposed on the substrate, and the floating gate includes a lower tip pointing toward the concave corner of the erase gate and extending beyond a sidewall of the trench.
    Type: Application
    Filed: March 22, 2024
    Publication date: April 24, 2025
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng, Chen-Ming Tsai
  • Publication number: 20250129329
    Abstract: A culture medium for hepatoma organoid culture, comprising an MST1/2 kinase inhibitor, at least one cell culture additive selected from N2 and B27, a hepatocyte growth factor, an ITS cell culture additive, Y27632, dexamethasone, Neuregulin-1, insulin, an epidermal cell growth factor, GlutaMAX, and non-essential amino acids. The application further relates to a hepatoma organoid culture method and an application thereof. By using the culture medium for hepatoma organoid, effective and rapid expansion of the hepatoma organoid can be achieved, and the organoid obtained by such expansion maintains the pathological characteristics of a patient, improves the culture success rate and the expansion rate of the hepatoma organoid, and provides a research basis for individualized treatment of the patient.
    Type: Application
    Filed: September 16, 2021
    Publication date: April 24, 2025
    Applicant: PRECEDO PHARMACEUTICALS CO., LTD
    Inventors: Qing Song LIU, Wen Liang Wang, Tao HUANG, Cheng CHEN
  • Publication number: 20250130336
    Abstract: The present disclosure provides a Beidou satellite-based initial train positioning calculation method, and a positioning system. The initial train positioning calculation method includes the following operations: S1: receiving Beidou satellite signals to obtain Beidou navigation data, and verifying the validity of the data; S2: obtaining a track electronic map file, and verifying the validity of the file; S3: based on the Beidou navigation data and the track electronic map file, screening out possible track sections of the current position of the train as candidate track sections, and putting the candidate track sections into a set TrackList; S4: determining whether the number of the candidate track sections in the TrackList is 1; and S5: according to the determination result, selecting to execute a single track position comparison algorithm or a non-single track position comparison algorithm.
    Type: Application
    Filed: November 10, 2022
    Publication date: April 24, 2025
    Inventors: Xianliang XU, Ziwei LI, Yazhong ZHANG, Fengwei YANG, Hongfei AN, Wen YANG, Dening CAO
  • Publication number: 20250130396
    Abstract: An imaging lens assembly has an optical axis and includes a plastic lens element set. The plastic lens element set includes two plastic lens elements and at least one anti-reflective layer. The two plastic lens elements, in order from an object side to an image side along the optical axis are a first plastic lens element and a second plastic lens element. The anti-reflective layer has a nanostructure and is disposed on at least one of an image-side surface of the first plastic lens element and an object-side surface of the second plastic lens element.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 24, 2025
    Inventors: Chien-Pang CHANG, Wen-Yu TSAI, Lin-An CHANG, Ming-Ta CHOU, Kuo-Chiang CHU
  • Publication number: 20250133790
    Abstract: A semiconductor device includes a gate structure, a first epitaxial layer, a second epitaxial layer and a cap layer. The gate structure is disposed on a substrate. The first epitaxial layer is disposed in the substrate and at two sides of the gate structure. The second epitaxial layer is disposed on the first epitaxial layer, in which an included angle between a surface of the second epitaxial layer and a horizontal direction is 15 degrees to 35 degrees. The cap layer is disposed on the second epitaxial layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 24, 2025
    Applicant: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Yong XIE, Shih-Hsien HUANG, Sheng-Hsu LIU, Qiang GAO, Wen Yi TAN
  • Publication number: 20250133800
    Abstract: A semiconductor device includes a MEOL structure and a BEOL structure. The BEOL structure is formed over the MEOL structure and includes a first dielectric layer, a spacer and a conductive portion. The first dielectric layer has a lateral surface and a recess, wherein the recess is recessed with respect to the lateral surface. The spacer is formed the lateral surface and covers an opening of the recess. The conductive portion is formed adjacent to the spacer.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hwei-Jay CHU, Hsi-Wen TIEN, Wei-Hao LIAO, Yu-Teng DAI, Hsin-Chieh YAO, Chih-Wei LU, Cheng-Hao CHEN
  • Publication number: 20250133753
    Abstract: A package structure and a formation method are provided. The method includes receiving a first chip structure, and the first chip structure has multiple conductive bonding structures and a dielectric bonding structure surrounding the conductive bonding structures. Top surfaces of the conductive bonding structures and the dielectric bonding structure are coplanar. The method also includes bonding a second chip structure to the dielectric bonding structure and the conductive bonding structures through dielectric-to-dielectric bonding and metal-to-metal bonding. The method further includes forming an insulating layer over the first chip structure, and the insulating layer laterally surrounds the first chip structure. In addition, the method includes forming a capacitor element laterally spaced apart from the second chip structure, and the insulating layer partially surrounds the capacitor element.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Wen-Shiang LIAO
  • Publication number: 20250133756
    Abstract: A diode is formed in an active region. The diode includes a P-type component embedded in a first portion of the active region, an N-type component embedded in a second portion of the active region, and an undoped component disposed between the P-type component and the N-type component. An interconnect structure is formed over a first side of the diode. Different portions of the interconnect structure are electrically coupled to the P-type component and the N-type component, respectively. One or more openings are etched through a dielectric structure disposed over a second side of the diode opposite the first side. A dopant material is implanted into the active region through the one or more openings. The one or more openings are filled with a conductive material.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 24, 2025
    Inventors: Chen-Ming Lee, Zi-Ang Su, Ming-Shuan Li, I-Wen Wu
  • Publication number: 20250130086
    Abstract: A metering method based on converted slip ratio fitting for wet natural gas is provided. The method includes fitting relationships between a gas Froude number and Venturi differential pressure and Venturi pressure loss with known data to obtain a gas Froude number calculation formula; dividing the known data according to a size of the gas Froude number, and performing piecewise fitting to obtain a piecewise converted slip ratio calculation formula under different gas Froude numbers; performing fitting on the dryness fraction and the converted slip ratio calculation formula; and acquiring, on the basis of the gas Froude number calculation formula, the converted slip ratio calculation formula, an overrated factor calculation formula and a dryness fraction calculation formula, some necessary real-time data to calculate a real-time flow rate of the wet gas. The method avoids using a ray flow meter and has advantages that include accurate metering and no radioactive pollution.
    Type: Application
    Filed: April 20, 2023
    Publication date: April 24, 2025
    Applicants: Haimo Subsea Technology (Shanghai) co., Ltd., Haimo Subsea Technologies (Shenzhen) Co., Ltd.
    Inventors: Yanzhi PAN, Pengrong WEN, Jianhua XIE, Xiaodong ZHANG
  • Publication number: 20250128408
    Abstract: A control system of a mechanical arm is provided. The control system includes a first transform circuit, a second transform circuit and a third transform circuit. The first transform circuit outputs a first digital power signal in a first mode of the mechanical arm. The second transform circuit outputs a second digital power signal in the first mode of the mechanical arm. When the control system is unable to control the mechanical arm to move in the first mode, the second digital power signal is cut off. When the control system is unable to control the mechanical arm to move in the first mode, the third transform circuit outputs a third digital power signal.
    Type: Application
    Filed: January 22, 2024
    Publication date: April 24, 2025
    Inventors: Yu-Chin JIANG, Ting-Ya Hsiao, Chun-Wen Lai