Patents by Inventor Wen Yang

Wen Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120317
    Abstract: A fan-out semiconductor device includes stacked semiconductor dies having die bond pads arranged in columns exposed at a sidewall of the stacked semiconductor dies. The stacked dies are encapsulated in a photo imageable dielectric (PID) material, which is developed to form through-hole cavities that expose the columns of bond pads of each die at the sidewall. The through-hole cavities are plated or filled with an electrical conductor to form conductive through-holes coupling die bond pads within the columns to each other.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Cheng-Hsiung Yang, Chien Te Chen, Cong Zhang, Ching-Chuan Hsieh, Yu-Ying Tan, Juan Zhou, Ai-wen Wang, Yih-Fran Lee, Yu-Wen Huang
  • Publication number: 20240120388
    Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.
    Type: Application
    Filed: January 18, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Jih-Sheng Yang, Shih-Chieh Chao, Chia Ming Liang, Yih-Ann Lin, Ryan Chia-Jen Chen
  • Patent number: 11957062
    Abstract: A memory includes a transistor and a magnetic tunnel junction (MTJ) storage element, a bottom electrode of the MTJ storage element is electrically connected to a drain electrode of the transistor using a conduction structure, wiring layers are disposed between the transistor and the MTJ storage element in the storage area, and a dielectric layer is filled between adjacent wiring layers, the conduction structure includes a first conduction part, and the first conduction part includes a first metal wire, a second metal wire, and a first via hole, the wiring layers comprise a first wiring layer, a second wiring layer, and a third wiring layer, the first via hole penetrates a dielectric layer and the third wiring layer that are located between the first wiring layer and the second wiring layer.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: April 9, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wen Yang, Yanxiang Liu
  • Patent number: 11954734
    Abstract: An exemplary system according to the present disclosure comprises a computing device that in operation, causes the system to receive financial product or financial portfolio data, map the financial product to a risk factor, execute a risk factor simulation process involving the risk factor, generate product profit and loss values for the financial product or portfolio profit and loss values for the financial portfolio based on the risk factor simulation process, and determine an initial margin for the financial product. The risk factor simulation process can be a filtered historical simulation process.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: April 9, 2024
    Assignee: Intercontinental Exchange Holdings, Inc.
    Inventors: Atsushi Maruyama, Boudewijn Duinstra, Christian A. M. Schlegel, Daniel R. de Almeida, Fernando V. Cerezetti, Gabriel E. S. Medina, Ghais Issa, Iddo Yekutieli, Jerome M. Drean, Marcus Keppeler, Rafik Mrabet, Stephen R. Pounds, Wen Jiang, Yanyan Hu, Yunke Yang
  • Patent number: 11951259
    Abstract: Disclosed herein are novel designs of a medical tube for delivering a respiratory gas to a subject in respiratory therapy, wherein the medical tube is in fluid connection with a user interface and a respiratory device. The medical tube has a tubular body, a first rib helically extending along the outer surface of the tubular body, and optionally, a second rib disposed next to the first rib, and optionally, a membrane encapsulating the first and/or second ribs thereby creating a helical space along the outer surface of the tubular body. In some embodiments, the first rib has a lumen and at least one wire disposed outside the lumen. In other embodiments, the first rib is free of any lumen and includes one or more wires extended therethrough. The lumen of the first rib or the helical space created by membrane encapsulation is configured to monitor the temperature, humidity, flow rate or pressure of the respiratory gas or an exhaled/inhaled gas of a subject.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 9, 2024
    Assignee: FOXXMED LTD.
    Inventors: Jeng-Yu Chou, Yung-Yang Shih, Wen-Hsien Liu
  • Patent number: 11952291
    Abstract: Disclosed is a device for efficiently recycling nickel from wastewater and a method. The device includes a housing, and an extraction unit and an electro-deposition unit which are respectively arranged inside the housing. The device is reasonable in overall structural design. An oscillating and floating component and a rotating component in an extraction cavity are used to fully and uniformly mix a solution to maximize the extraction strength. A mixing component in an electro-deposition cavity is used to accelerate ion dispersion, to better recycle nickel. The device is easy to operate, low in cost and suitable for mass promotion.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: April 9, 2024
    Assignee: Chongqing University Of Arts And Sciences
    Inventors: Wei Guan, Wen Zeng, Zhongwen Ou, Dan Song, Subo Yang, Yong Zhang, Bitao Liu, Zhigang Xie
  • Patent number: 11950771
    Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 9, 2024
    Assignee: UNITED ORTHOPEDIC CORPORATION
    Inventors: Yan-Shen Lin, Jiann-Jong Liau, Yu-Liang Liu, Teh-Yang Lin, Wen-Chuan Chen
  • Publication number: 20240114116
    Abstract: A multi-projector system and a method of calibrating the multi-projector system are provided. The method includes: controlling a first projector to project a first image, and capturing and generating a first captured image including the first image to obtain a first color value from the first captured image through an image capturing device; projecting a second image according to a first projection parameter, and capturing and generating a second captured image including the second image to obtain a second color value from the second captured image through the image capturing device, wherein the first projection parameter includes an electrical parameter of a light source module of the second projector; calculating an absolute difference between the first color value and the second color value; and adjusting the first projection parameter to update the absolute difference in response to the absolute difference being greater than a first threshold.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 4, 2024
    Applicant: Coretronic Corporation
    Inventors: Xuan-En Fung, Chun-Lin Chien, Yu-Wen Lo, Yu-Hua Yang
  • Patent number: 11949016
    Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Lin, Chih-Chuan Yang, Chih-Hsuan Chen, Bwo-Ning Chen, Cha-Hon Chou, Hsin-Wen Su, Chih-Hsiang Huang
  • Patent number: 11948197
    Abstract: An exemplary system according to the present disclosure comprises a computing device that in operation, causes the system to receive financial product or financial portfolio data, map the financial product to a risk factor, execute a risk factor simulation process involving the risk factor, generate product profit and loss values for the financial product or portfolio profit and loss values for the financial portfolio based on the risk factor simulation process, and determine an initial margin for the financial product. The risk factor simulation process can be a filtered historical simulation process.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: April 2, 2024
    Assignee: Intercontinental Exchange Holdings, Inc.
    Inventors: Atsushi Maruyama, Boudewijn Duinstra, Christian A. M. Schlegel, Daniel R. de Almeida, Fernando V. Cerezetti, Gabriel E. S. Medina, Ghais Issa, Iddo Yekutieli, Jerome M. Drean, Marcus Keppeler, Rafik Mrabet, Stephen R. Pounds, Wen Jiang, Yanyan Hu, Yunke Yang
  • Patent number: 11949174
    Abstract: A broadband fifth-generation (5G) circularly polarized filtering antenna includes a reflecting plate, a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, a fourth dielectric substrate, a feed line with a phase adjustment function print on one surface of the first dielectric substrate, a ground with a chair-like groove on an other surface of the first dielectric substrate, a first rectangular radiating unit, a second rectangular radiating unit, a first metal transmission strip group and a second metal transmission strip group.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: April 2, 2024
    Assignee: ANHUI UNIVERSITY
    Inventors: Yingsong Li, Wen Li, Zhixiang Huang, Lixia Yang
  • Publication number: 20240099920
    Abstract: A method for controlling a device for automatically adjusting an airway opening body position is provided. The device includes a horizontal base plate, a head support block, a back support plate, a neck support apparatus, a head cover assembly, and a programmable logic controller (PLC). The neck support apparatus is positioned between the head support block and the back support plate. The PLC is configured to controls a stroke of an electric cylinder according to the following equations: ?=1.235?+?, and ?=KX+B+C, where ? is a body position angle, the body position angle is an angle between a positive projection line of a connecting line from a mandibular angle to an external acoustic meatus on a symmetrical surface of a human body and the back support plate, and ? is a preset value ranging from 90° to 100°.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 28, 2024
    Inventors: XIANG-MEI YANG, MIN-YUE SUN, HONG-MEI CHEN, YAN LUO, JUN WU, JUAN HUANG, DONG-MEI LI, QING ZENG, JING ZHOU, JING WEN, JIN-JIN GUO
  • Publication number: 20240102154
    Abstract: A vacuum processing apparatus (110) for deposition of a material on a substrate is provided. The vacuum processing apparatus (110) includes a vacuum chamber comprising a processing area (111); a deposition apparatus (112) within the processing area (111) of the vacuum chamber; a cooling surface (113) inside the vacuum chamber; and one or more movable shields (220) between the cooling surface (113) and the processing area (111).
    Type: Application
    Filed: February 24, 2020
    Publication date: March 28, 2024
    Inventors: Chun Cheng CHEN, Hung-Wen CHANG, Shin-Hung LIN, Chi-Chang YANG, Christoph MUNDORF, Thomas GEBELE, Jürgen GRILLMAYER
  • Patent number: 11941572
    Abstract: Various embodiments are disclosed for providing machine learning routines with peripheral device data to infer driver activity and location. Peripheral device data may be collected on a peripheral device having a machine learning routine executing thereon to infer driver activity and perform improved estimation of driver location. Using driver activity and location estimation, contextually relevant delivery workflow assistance may be automatically provided to a delivery driver or other individual without requiring manual input, thereby improving driver safety and operational efficiency.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: March 26, 2024
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Ruth Ravichandran, Hebaallah Aly Abdelhalim Aly Ismail, Zheng Wang, Shao-Wen Yang, Yang Pan, David Hung Huynh, Andrey Li, Hoshgeldy Tagangeldyevich Tachmuradov, Steven Larson
  • Patent number: 11942145
    Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chuan Yang, Jui-Wen Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11942169
    Abstract: A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen Su, Kian-Long Lim, Wen-Chun Keng, Chang-Ta Yang, Shih-Hao Lin
  • Patent number: 11944021
    Abstract: Some embodiments relate to an integrated circuit including one or more memory cells arranged over a semiconductor substrate between an upper metal interconnect layer and a lower metal interconnect layer. A memory cell includes a bottom electrode disposed over the lower metal interconnect layer, a data storage or dielectric layer disposed over the bottom electrode, and a top electrode disposed over the data storage or dielectric layer. An upper surface of the top electrode is in direct contact with the upper metal interconnect layer without a via or contact coupling the upper surface of the top electrode to the upper metal interconnect layer. Sidewall spacers are arranged along sidewalls of the top electrode, and have bottom surfaces that rest on an upper surface of the data storage or dielectric layer.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yang Chang, Wen-Ting Chu
  • Publication number: 20240097337
    Abstract: A broadband fifth-generation (5G) circularly polarized filtering antenna includes a reflecting plate, a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, a fourth dielectric substrate, a feed line with a phase adjustment function print on one surface of the first dielectric substrate, a ground with a chair-like groove on an other surface of the first dielectric substrate, a first rectangular radiating unit, a second rectangular radiating unit, a first metal transmission strip group and a second metal transmission strip group.
    Type: Application
    Filed: July 5, 2023
    Publication date: March 21, 2024
    Inventors: Yingsong LI, Wen LI, Zhixiang HUANG, Lixia YANG
  • Publication number: 20240096985
    Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20240097035
    Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang