Patents by Inventor Wen Yu

Wen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220233931
    Abstract: A throwing device for efficiently throwing a ball. The throwing device has a scoop. The scoop has a closed end, a first ball opening and a second ball opening. The first ball opening and the second ball opening intersect on the scoop. The first ball opening is at least as large as the ball. The second ball opening is normally smaller than the ball. The second ball opening expands when pressed against the ball. This enables the ball to pass into the scoop through the second ball opening. A shaft extends from the closed end of the scoop for manipulating the scoop and ball.
    Type: Application
    Filed: January 25, 2021
    Publication date: July 28, 2022
    Inventor: Wen Yu Hung
  • Publication number: 20220223758
    Abstract: A light-emitting diode includes an N-type cladding layer, and a superlattice structure, an active layer, a P-type electron-blocking layer, and a P-type cladding layer disposed on the N-type cladding layer in such order. The superlattice structure includes at least one first layered element which has a sub-layer made of a nitride-based semiconductor material including Al, and having an energy band gap greater than that of said electron-blocking layer. The P-type electron-blocking layer is made of a nitride-based semiconductor material including Al, and has an energy band gap greater than that of the P-type cladding layer.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 14, 2022
    Inventors: Wen-Yu LIN, Meng-Hsin YEH, Yun-Ming LO, Chien-Yao TSENG, Chung-Ying CHANG
  • Patent number: 11387363
    Abstract: A method includes forming a first channel region and a first gate structure formed over the first channel region. A first source/drain region is formed adjacent the first channel region and the first source/drain region includes a crystalline structure doped with a first dopant. A first silicide is formed over the first source/drain region. The first source/drain region includes a first concentration of the first dopant between 2.0×1021 atoms per centimeter cubed and 4.0×1021 atoms per centimeter cubed at a depth of 8 to 10 nanometers.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Sheng-Wen Yu, Ziwei Fang
  • Publication number: 20220210415
    Abstract: Still frame detection for single pass video data, including: determining that an average quantization parameter of a frame of video data falls below a quantization parameter threshold; determining whether an amount of skipped macroblocks in the frame meets a skipped macroblock threshold; and responsive to the amount of skipped macroblocks exceeding the skipped macroblock threshold, identifying the frame as a still frame.
    Type: Application
    Filed: December 28, 2020
    Publication date: June 30, 2022
    Inventors: MEHDI SEMSARZADEH, JIAO WANG, YAO WEN YU, EDWARD HAROLD, RICHARD E. GEORGE
  • Publication number: 20220196969
    Abstract: An imaging lens assembly has an optical axis and includes a plastic lens element set. The plastic lens element set includes two plastic lens elements and at least one anti-reflective layer. The two plastic lens elements, in order from an object side to an image side along the optical axis are a first plastic lens element and a second plastic lens element. The anti-reflective layer has a nanostructure and is disposed on at least one of an image-side surface of the first plastic lens element and an object-side surface of the second plastic lens element.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 23, 2022
    Inventors: Chien-Pang CHANG, Wen-Yu TSAI, Lin-An CHANG, Ming-Ta CHOU, Kuo-Chiang CHU
  • Publication number: 20220196970
    Abstract: An optical lens assembly is provided in the present disclosure. The optical lens assembly includes, from an object side to an image side, at least five optical lens elements. At least one of the optical lens elements includes an anti-reflective coating, and the optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer, and the coating layer at the outer of the anti-reflective coating is made of metal oxide. The anti-reflective coating includes a plurality of holes, and sizes of the holes adjacent to the outer of the anti-reflective coating are relatively larger than sizes of the holes adjacent to the inner of the anti-reflective coating.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Chien-Pang CHANG, Wen-Yu TSAI, Chun-Hung TENG, Kuo-Chiang CHU
  • Publication number: 20220196881
    Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Wen-Yu TSAI, Chien-Pang CHANG, Chi-Wei CHI, Wei-Fong HONG, Chun-Hung TENG, Kuo-Chiang CHU
  • Publication number: 20220196882
    Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.
    Type: Application
    Filed: January 17, 2022
    Publication date: June 23, 2022
    Inventors: Wen-Yu TSAI, Chien-Pang CHANG, Chi-Wei CHI, Wei-Fong HONG, Chun-Hung TENG, Kuo-Chiang CHU
  • Patent number: 11362589
    Abstract: A flying capacitor converter includes an inductor, a first switch and a second switch, a first diode and a second diode, a first capacitor and a second capacitor, a flying capacitor, a third diode and a third capacitor, a fourth diode, and a fifth diode. The inductor is coupled to a first node. The first switch and the second switch are commonly connected to a second node. The first diode and the second diode are commonly connected to a third node. The first capacitor and the second capacitor are commonly connected to a fourth node. The flying capacitor is coupled to the second node and the third node. The third diode and the third capacitor are commonly connected to a fifth node. The fifth diode is coupled to the third node and the fourth node.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: June 14, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wen-Yu Huang, Wei-Lun Hsin, Xin-Hung Lin
  • Publication number: 20220181505
    Abstract: A MOS capacitor includes a substrate having a capacitor forming region thereon, an ion well having a first conductivity type in the substrate, a counter doping region having a second conductivity type in the ion well within the capacitor forming region, a capacitor dielectric layer on the ion well within the capacitor forming region, a gate electrode on the capacitor dielectric layer, a source doping region having the second conductivity type on a first side of the gate electrode within the capacitor forming region, and a drain doping region having the second conductivity type on a second side of the gate electrode within the capacitor forming region.
    Type: Application
    Filed: January 11, 2021
    Publication date: June 9, 2022
    Inventors: Jian-Li Lin, Wei-Da Lin, Cheng-Guo Chen, Ta-Kang Lo, Yi-Chuan Chen, Huan-Chi Ma, Chien-Wen Yu, Kuan-Ting Lu, Kuo-Yu Liao
  • Patent number: 11355875
    Abstract: A dual-row cable structure is applied to a first circuit board and a second circuit board. A board-to-board connector is on the first circuit board, and the first circuit board includes a first group of contacts and a second group of contacts. An electrical connector is on the second circuit board. The second circuit board includes a third group of contacts and a fourth group of contacts. The dual-row cable structure includes a wire assembly including high-speed signal wires, low-speed signal wires, one or more power wires, and one or more ground wires. The high-speed signal wires are connected to the first group of contacts. The low-speed signal wires, the power wire, and the ground wire are respectively connected to the second group of contacts. The third group of contacts and the fourth group of contacts are respectively connected to the other end of the wire assembly.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 7, 2022
    Assignee: ADVANCED-CONNECTEK INC.
    Inventors: Wen-Yu Wang, Ji-Zhou Li, Ming-Yung Chang, Tzu-Hao Li
  • Publication number: 20220172511
    Abstract: This disclosure describes systems and techniques for synchronizing cameras and tagging images for face authentication. For face authentication by a facial recognition model, a dual infrared camera may generate an image stream by alternating between capturing a “flood image” and a “dot image” and tagging each image with metadata that indicates whether the image is a flood or a dot image. Accurately tagging images can be difficult due to dropped frames and errors in metadata tags. The disclosed systems and techniques provide for the improved synchronization of cameras and tagging of images to promote accurate facial recognition.
    Type: Application
    Filed: October 10, 2019
    Publication date: June 2, 2022
    Applicant: Google LLC
    Inventors: Zhijun He, Wen Yu Chien, Po-Jen Chang, Xu Han, Adarsh Prakash Murthy Kowdle, Jae Min Purvis, Lu Gao, Gopal Parupudi, Clayton Merrill Kimber
  • Publication number: 20220165808
    Abstract: An electronic device includes a transparent substrate, a number of pixel structures and a first trace structure. The transparent substrate includes a transparent region and a trace region. Each of the pixel structures has a sub-pixel structure of first color and a sub-pixel structure of second color. The sub-pixel structure of first color has a light emitting element of first color. The sub-pixel structure of second color has a light emitting element of second color. The first trace structure includes a first main trace, a first auxiliary trace and a second auxiliary trace. The first main trace is disposed in the trace region and surrounds a portion of the transparent region. The first auxiliary trace and the second auxiliary trace are electrically connected to the first main trace, and are electrically connected to the corresponding sub-pixel structure of first color and the corresponding sub-pixel structure of second color, respectively.
    Type: Application
    Filed: November 27, 2020
    Publication date: May 26, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ying-Ting LIOU, Ruo-Lan CHANG, Wen-Yu KUO, Wen-Ya CHAO, Wei-Chung CHEN
  • Patent number: 11337344
    Abstract: A shielding member includes a frame body and an outer cover. Two sides of a first end of the frame body respectively include a first shaft portion. Two sides of the frame body respectively include a first side plate. The frame body is covered by the outer cover. Two sides of a first end of the outer cover respectively include a second shaft portion, and each of the second shaft portions is pivotally connected to the corresponding first shaft portion. Two sides of the outer cover respectively include a second side plate, and each of the second side plates covers an outer side of the corresponding first side plate. Accordingly, the frame body and the outer cover are assembled to form a one-piece metallic shielding member. The structure of the shielding member is simple, the manufacturing for the shielding member is easy, and the cost for manufacturing the shielding member is reduced.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: May 17, 2022
    Assignee: Advanced-Connectek Inc.
    Inventors: Wen-Yu Wang, Ming-Yung Chang, Tzu-Hao Li, Yu-Xuan Tung
  • Patent number: 11336833
    Abstract: In a system including a processor and a computer-readable medium in communication with the processor, the computer-readable medium includes executable instructions that, when executed by the processor, cause the processor to control the system to perform receiving, from a remote system via a communication network, a first remote field of view (FOV) of a remote subject; causing, based on the received first remote FOV, a camera orienting unit to orient a camera in a first orientation, wherein the camera oriented in the first orientation has a first local FOV corresponding to the first remote FOV received from the remote system; upon orienting the camera in the first orientation, causing an image capturing unit to capture a first local image through a display; and transmitting, to the remote system via the communication network, the captured first local image.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: May 17, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Benjamin Franklin Cutler, Wen-Yu Chang, Spencer G Fowers
  • Publication number: 20220146985
    Abstract: Energy-collecting display modules are disclosed. The modules include a base substrate with a plurality of sub-pixels, which are laid out in a substantially regular sub-pixel pattern. The sub-pixels are dispersed along the base substrate with sub-pixel spacing regions between individual sub-pixels. The modules also include a photovoltaic region disposed within the sub-pixel spacing regions such that the photovoltaic region minimally obscures a subpixel viewing cone region.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 12, 2022
    Inventor: Wen-Yu Wu
  • Publication number: 20220148293
    Abstract: An image feature visualization method and apparatus, and an electronic device during model training, inputs the real training data with positive samples into a mapping generator to obtain fictitious training data with negative samples. The mapping generator includes a mapping module configured to learn a key feature map that distinguishes the real training data with positive samples/negative samples, and the fictitious training data with negative samples is generated based on the real training data with positive samples and the key feature map. The training data with negative samples is input into a discriminator to obtain a discrimination result. An optimizer optimizes the mapping generator and the discriminator until training is completed. During model application, a target image that is to be processed is input into the mapping generator, and the mapper in the mapping generator extracts features of the target image.
    Type: Application
    Filed: March 11, 2020
    Publication date: May 12, 2022
    Inventors: Shuqiang WANG, Wen YU, Chenchen XIAO, Shengye HU, Yanyan SHEN
  • Publication number: 20220140080
    Abstract: A method for fabricating p-type field effect transistor (FET) includes the steps of first providing a substrate, forming a pad layer on the substrate, forming a well in the substrate, performing an ion implantation process to implant germanium ions into the substrate to form a channel region, and then conducting an anneal process to divide the channel region into a top portion and a bottom portion. After removing the pad layer, a gate structure is formed on the substrate and a lightly doped drain (LDD) is formed adjacent to two sides of the gate structure.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 5, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shi-You Liu, Tsai-Yu Wen, Ching-I Li, Ya-Yin Hsiao, Chih-Chiang Wu, Yu-Chun Liu, Ti-Bin Chen, Shao-Ping Chen, Huan-Chi Ma, Chien-Wen Yu
  • Patent number: 11308016
    Abstract: A USB integrated circuit includes three TX connecting component pairs and three RX connecting component pairs. The first TX connecting component pair and the first RX connecting component pair are respectively coupled to the first TX pin pair and the first RX pin pair of the first USB connector. The second TX connecting component pair and the second RX connecting component pair are respectively coupled to the first TX pin pair and the first RX pin pair of a second USB connector. The third TX connecting component pair is coupled to the second TX pin pair of the first USB connector or to the second TX pin pair of the second USB connector. The third RX connecting component pair is coupled to the second RX pin pair of the first USB connector or to the second RX pin pair of the second USB connector.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: April 19, 2022
    Assignee: VIA LABS, INC.
    Inventors: Wen-Yu Tseng, Wen-Hao Cheng, Terrance Shiyang Shih
  • Publication number: 20220115983
    Abstract: A step-up conversion module includes a first step-up circuit, a second step-up circuit, a first unidirectional conduction element, and a second unidirectional conduction element. The first step-up circuit includes a first input loop composed of a first inductor and a first switch unit. The second step-up circuit includes a second input loop composed of a second inductor and a second switch unit. The first inductor and the second inductor form a coupling inductor with a common core. The first unidirectional conduction element blocks a first reverse current induced by the coupling inductor to the first input loop. The second unidirectional conduction element blocks a second reverse current induced by the coupling inductor to the second input loop.
    Type: Application
    Filed: July 14, 2021
    Publication date: April 14, 2022
    Inventors: Wen-Yu HUANG, Xin-Hung LIN