Abstract: A drive control circuit includes an input circuit, a first output circuit and a first output control circuit. An input circuit is configured to control the potentials of a first node and a second node under the control of a signal input terminal and a clock signal terminal. The first output circuit is configured to provide a first power supply signal to a third node under the control of a first node or to provide a second power supply signal to a first output terminal under the control of a second node. The first output control circuit is configured to turn on or turn off the third node and the first output terminal under the control of the first control terminal.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: Provided is a display panel. The display panel includes: a base substrate having a display region and a peripheral region surrounding the display region; a plurality of pixel units disposed in the display region and including a light-emitting unit; a barrier structure disposed in the peripheral region and surrounding the plurality of pixel units; a connecting structure disposed in the peripheral region; a first insulating layer disposed between the first electrode layer and the base substrate, wherein a via hole is formed in a portion of the first insulating layer in the peripheral region; a circuit structure disposed in the peripheral region and including a first circuit structure; a second insulating layer disposed on a side of the second metal layer; and a third insulating layer disposed on a side of the second insulating layer and including a body pattern.

Abstract: An array substrate is provided. The array substrate includes a voltage supply network. The voltage supply network includes, in a corner region of a peripheral area, a first peripheral voltage supply line; a plurality of second peripheral voltage supply lines; and an electrical connecting structure configured to connect the plurality of second peripheral voltage supply lines with the first peripheral voltage supply line. The electrical connecting structure crosses over at least one of the plurality of second peripheral voltage supply lines.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: An array substrate is provided. The array substrate includes a plurality of light emitting elements and a plurality of pixel driving circuits configured to drive light emission in the plurality of light emitting elements. In a first region, transistors of multiple pixel driving circuits of the plurality of pixel driving circuits are present, and the plurality of light emitting elements are absent. In a second region, multiple light emitting elements of the plurality of light emitting elements are present, and transistors of the plurality of pixel driving circuits are absent.

Abstract: Provided are a display panel, a manufacturing method, and a display device. The display panel includes: a substrate including a display area and a peripheral area; a driving circuit layer including: a pixel circuit in the display area, and a gate driver circuit on a side of the pixel circuit in proximity to the peripheral area, and at least partially in the display area; a first metal layer on a side of the driving circuit layer away from the substrate, insulated from the driving circuit layer; and a first electrode layer in the display area and on a side of the first metal layer away from the substrate, insulated from the first metal layer, and electrically connected to the pixel circuit; where orthographic projections, on the substrate, of the first electrode layer, the first metal layer, and the gate driver circuit, are at least partially overlapped.

Abstract: A display substrate, includes: a display region. The display region includes a plurality of sub-pixels disposed on a substrate, a plurality of first signal lines extending in a first direction, and a plurality of data lines extending in a second direction. At least one sub-pixel includes a driving circuit, and the driving circuit includes a plurality of transistors and at least one storage capacitor. The transistor at least includes a first conductive layer and a second conductive layer. The plurality of first signal lines is located in a third conductive layer. The third conductive layer is located on a side of a control electrode of a transistor of the driving circuit away from the substrate.

Abstract: An array substrate, a display panel, and a driving method of the array substrate are provided. The array substrate includes: a plurality of pairs of gate lines, each pair including a first gate line and a second gate line, and a pixel array, including pixel units arranged into a plurality of rows and a plurality of columns. A scan signal terminal of a pixel unit of an nth column in an mth row of pixel units is connected to the first gate line in an mth pair of gate lines to receive a first scan signal; m and n are positive integers; a reset signal terminal of the pixel unit of the (n+1)th column in the mth row of pixel units is connected to the first gate line in the mth pair of gate lines to receive the first scan signal serving as a first reset signal.

Abstract: The present invention provides an automatic water jet cutter system, where a continuous boundary position trajectory pre-planned on a navigation image is fitted to generate a motion control position trajectory; a water jet cutter coordinate system is established, the motion control position trajectory is converted into the water jet cutter coordinate system, then motion position trajectory parameters for each axis are calculated; according to the motion position trajectory parameters for each axis, the water jet cutter is controlled to perform respective motions in a jet flow axis, a suction flow axis, a linear motion axis and a rotary motion axis by a multi-axis linkage control method; and in the multi-axis linkage control method, an error in any one of the jet flow axis, the suction flow axis, the linear motion axis and the rotary motion axis of the water jet cutter are correlated with errors in the other three axes.

Abstract: The present application discloses a biplanar ultrasound image planning method, which solves the problem of large path planning errors.

Abstract: Provided are a display substrate, a driving method thereof, and a display apparatus. The display substrate includes multiple sub-pixels, a sub-pixel includes a pixel drive circuit and a light emitting device, the pixel drive circuit includes an initial signal line (INIT), a reset signal line (Reset) and multiple transistors, the initial signal line includes a first branch (INIT-1). Multiple transistors include a drive transistor, a first reset transistor and a second reset transistor, the drive transistor provides a drive current to the light emitting device, the first reset transistor resets a gate of the drive transistor through the INIT-1 under control of the reset signal line. The second reset transistor resets a first terminal of the light emitting device through the INIT-1 under control of the reset signal line. The first reset transistor and the second reset transistor in a same sub-pixel are controlled by a same reset signal line.

Abstract: A display substrate and manufacturing method therefor, and a display apparatus. The display substrate comprises driving structure layer comprising multiple light-emitting units and light-emitting structure layer comprising multiple unit rows and at least two dummy rows. A unit row comprises multiple circuit units arranged in a first direction, a dummy row comprises multiple dummy unit arranged in first direction, multiple unit rows and at least two dummy rows are sequentially arranged in a second direction intersecting first direction; at least one dummy row is provided with first connecting line extending in first direction and connected to first initial signal line extending in second direction to form a mesh structure for transmitting first initial signal; and/or at least another dummy row is provided with second connecting line extending in first direction and connected to a second initial signal line extending in second direction to form a mesh structure for transmitting second initial signal.

Abstract: A display panel and a display device are disclosed. The display panel includes display area and a peripheral area surrounding the display area. The peripheral area includes a first peripheral area located at a side of the display area, the first peripheral area has a cell test area for arranging a cell test unit, the display panel has a first edge, and the first edge is located at a side of the first peripheral area away from the display area. The display panel is provided with a reference power bus and a touch signal line, and in the first peripheral area, the reference power bus has a reference power bus protrusion.

Abstract: Disclosed is a display substrate including a display region (100) and a bonding region (200) located on a side of the display region (100). The display region (100) includes a base substrate (101) and a drive circuit layer disposed on the base substrate (101). The drive circuit layer includes a plurality of circuit units constituting a plurality of unit rows and a plurality of unit columns, a plurality of data signal lines (60), and a plurality of data connection lines (70). The data connection lines (70) include a first connection line (71) extending along a first direction and a second connection line (72) extending along a second direction. The first connection line (71) is electrically connected with the second connection line (72) and a data signal line (60) respectively. The first connection line (71) and the second connection line (72) are located in different conductive layers.

Abstract: An array substrate is provided. The array substrate includes a plurality of pixel driving circuits configured to drive light emission in a plurality of subpixels; at least one dummy circuit incapable of driving light emission; and a plurality of voltage supply lines configured to provide a voltage. The voltage is provided to a second capacitor electrode of at least one pixel driving circuit of the plurality of pixel driving circuits, and is provided to both capacitor electrodes of the at least one dummy circuit.

Abstract: The present disclosure provides a resetting control signal generation circuitry, a resetting control signal generation method, a resetting control signal generation module and a display device. The resetting control signal generation circuitry includes a resetting control signal output end, a first node control circuitry, a second node control circuitry, a first output circuitry and a second output circuitry. The first output circuitry is configured to enable the resetting control signal output end to be electrically coupled to or electrically decoupled from a first voltage end under the control of a potential at a first node. The second output circuitry is configured to enable the resetting control signal output end to be electrically coupled to or electrically decoupled from a second voltage end under the control of a potential at a second node.

Abstract: A driving circuit, a driving method, a pixel circuit, a display panel and a display device are provided. The driving circuit includes a first switching circuit and a scanning signal generation circuit; the first switching circuit is electrically connected to a first gating control line, at least two data output terminals of a source driver and the scanning signal generation circuit, and is configured to write a data signal provided by the at least two data output terminals into the scanning signal generation circuit under the control of a first gating control signal provided by the first gating control line; the scanning signal generation circuit is configured to generate a scanning signal according to the data signal, and output the scanning signal through the scanning signal output terminal.

Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes multiple circuit units constituting multiple unit rows and multiple unit columns, and multiple dummy units constituting at least one dummy row and/or at least one dummy column. The dummy row includes multiple dummy units sequentially arranged along a first direction. The dummy column includes multiple dummy units sequentially arranged along a second direction; at least one unit column is provided with a first initial signal line, at least one dummy row is provided with a first connection line, and the first initial signal line is connected with the first connection line and/or, at least one unit row is provided with a second initial signal line, at least one dummy column is provided with a second connection line (80), and the second initial signal line is connected with the second connection line.