Abstract: A low noise cable core and a manufacturing method thereof and a low noise cable using the same include an insulated conductor, a first type conductive layer, and a second type conductive layer. The insulated conductor includes a conductive core and an insulation layer encapsulating the conductive core. The first type conductive layer encapsulates the insulated conductor, and the second type conductive layer encapsulates the first type conductive layer. The first type conductive layer and the second type conductive layer are respectively formed by way of a first forming method and a second forming method different from the first forming method.

Abstract: The photoelectric signal conversion and transmission device includes a photoelectric signal module and a fiber joint, matched and coupled together. A circuit board of the photoelectric signal module includes one or more connection bases. Light emission elements, light reception elements, and amplifiers are configured on a first coupling face of the connection based, and electrically connected by first and second wires. The fiber joint includes a number of fibers axially aligned with the light emission and reception elements. By having the light emission and reception elements and amplifiers configured on a same coupling face, their physical connection distance is reduced, thereby decreasing signal attenuation, enhancing signal transmission performance, and facilitating structural miniaturization.

Abstract: The present invention relates to a coating process and a process system for a cable, and a cable manufactured thereby. The process includes: (1) providing the cable; (2) transporting the cable into immersion device, the cable immerged in first solution to form first coating layer thereon; (3) transporting the cable out of the immersion; (4) transporting the cable into coating device through third wire die, the cable immerged in second solution to form second coating layer thereon, the second layer is attached to the cable through the first layer; (5) transporting the cable out of the coating device through fourth wire die, fourth aperture diameter of the fourth wire die is larger than third aperture diameter of the third wire die; and (6) heating the cable to cure the second coating layer. The system includes: a cable providing device; an immersion device; a coating device; and a heating device.

Abstract: The photoelectric signal conversion and transmission device includes a photoelectric signal module and a fiber joint, matched and coupled together. A circuit board of the photoelectric signal module includes one or more connection bases. Light emission elements, light reception elements, and amplifiers are configured on a first coupling face of the connection based, and electrically connected by first and second wires. The fiber joint includes a number of fibers axially aligned with the light emission and reception elements. By having the light emission and reception elements and amplifiers configured on a same coupling face, their physical connection distance is reduced, thereby decreasing signal attenuation, enhancing signal transmission performance, and facilitating structural miniaturization.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.

Abstract: A measuring device for measuring a response speed of a display panel is provided. The measuring device includes a microcontroller and at least one photo sensor. The microcontroller provides a control command, according to which a display controller of the display panel provides test pattern to the display panel. The photo sensor senses a test frame displayed corresponding to the test pattern by the display panel, and provides a corresponding sensing signal associated with brightness and a response signal. According to the response signal, the response speed of the display panel is calculated.

Abstract: A measuring device for measuring a response speed of a display panel is provided. The measuring device includes a microcontroller and at least one photo sensor. The microcontroller provides a control command, according to which a display controller of the display panel provides test pattern to the display panel. The photo sensor senses a test frame displayed corresponding to the test pattern by the display panel, and provides a corresponding sensing signal associated with brightness and a response signal. According to the response signal, the response speed of the display panel is calculated.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.

Abstract: The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.