Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.

Abstract: Bonded wafer device structures, such as a wafer-on-wafer (WoW) structures, and methods of fabricating bonded wafer device structures, including an array of contact pads formed in an interconnect level of at least one wafer of the bonded wafer device structure. The array of contact pads formed in an interconnect level of at least one wafer may have an array pattern that corresponds to an array pattern of contact pads that is subsequently formed over a surface of the bonded wafer structure. The array of contact pads formed in an interconnect level of at least one wafer of the bonded wafer device structure may enable improved testing of individual wafers, including circuit probe testing, prior to the wafer being stacked and bonded to one or more additional wafers to form a bonded wafer structure.

Abstract: A method of controlling movement of an autonomous mobile apparatus including a driving module, a processor, and a positioning module includes steps of: the processor moving the autonomous mobile apparatus at a default speed from a first location toward a second location along a straight path; the positioning module obtaining data related to a current location; when the processor determines that a distance between the current location and the second location is greater than a predetermined distance, the processor obtaining a deviating direction and a minimum distance of the current location relative to the straight path; the processor setting a movement speed and an angular velocity based on the deviating direction, a tolerant distance, the minimum distance, and the default speed; and the processor controlling the driving apparatus to move the autonomous mobile apparatus at the movement speed and turning the autonomous mobile apparatus at the angular velocity.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: An implantable rotator cuff muscle suture spacer with pressure sensing is provided, formed by a semiconductor manufacture procedure, including a base layer, made of a polymer material and having flexibility, and further including a first configuration region and a second configuration region, where the base layer is folded at imaginary fold line positions of the first configuration region and the second configuration region, so that the first configuration region is located above the second configuration region; a first electrode region, deposited on the first configuration region; a second electrode region, deposited on the second configuration region, corresponding to a position below the first electrode region, and configured to obtain a pressure sensing value; an inductance coil, deposited on the second configuration region and surrounding the second electrode region; and a capacitor layer, coated above a surface of the base layer to form a dielectric substance.

Abstract: A semiconductor device includes a first die having a first bonding layer; a second die having a second bonding layer disposed over and bonded to the first bonding layer; a plurality of bonding members, wherein each of the plurality of bonding members extends within the first bonding layer and the second bonding layer, wherein the plurality of bonding members includes a connecting member electrically connected to a first conductive pattern in the first die and a second conductive pattern in the second die, and a dummy member electrically isolated from the first conductive pattern and the second conductive pattern; and an inductor disposed within the first bonding layer and the second bonding layer. A method of manufacturing a semiconductor device includes bonding a first inductive coil of a first die to a second inductive coil of a second die to form an inductor.

Abstract: The photoelectric signal conversion and transmission device includes a photoelectric signal module and a fiber joint, matched and coupled together. A circuit board of the photoelectric signal module includes one or more connection bases. Light emission elements, light reception elements, and amplifiers are configured on a first coupling face of the connection based, and electrically connected by first and second wires. The fiber joint includes a number of fibers axially aligned with the light emission and reception elements. By having the light emission and reception elements and amplifiers configured on a same coupling face, their physical connection distance is reduced, thereby decreasing signal attenuation, enhancing signal transmission performance, and facilitating structural miniaturization.

Abstract: The present invention relates to a coating process and a process system for a cable, and a cable manufactured thereby. The process includes: (1) providing the cable; (2) transporting the cable into immersion device, the cable immerged in first solution to form first coating layer thereon; (3) transporting the cable out of the immersion; (4) transporting the cable into coating device through third wire die, the cable immerged in second solution to form second coating layer thereon, the second layer is attached to the cable through the first layer; (5) transporting the cable out of the coating device through fourth wire die, fourth aperture diameter of the fourth wire die is larger than third aperture diameter of the third wire die; and (6) heating the cable to cure the second coating layer. The system includes: a cable providing device; an immersion device; a coating device; and a heating device.

Abstract: The photoelectric signal conversion and transmission device includes a photoelectric signal module and a fiber joint, matched and coupled together. A circuit board of the photoelectric signal module includes one or more connection bases. Light emission elements, light reception elements, and amplifiers are configured on a first coupling face of the connection based, and electrically connected by first and second wires. The fiber joint includes a number of fibers axially aligned with the light emission and reception elements. By having the light emission and reception elements and amplifiers configured on a same coupling face, their physical connection distance is reduced, thereby decreasing signal attenuation, enhancing signal transmission performance, and facilitating structural miniaturization.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.

Abstract: Disclosed are a feedblock multiplier with thickness gradient variation, a feedblock system, a method, and multilayer structure made by the method. The feedblock multiplier combines the functionalities of feedblock and multiplier conventionally used for producing the multilayer structure. The feedblock multiplier includes an input section for feeding fluid materials. A feedblock section is included for dividing the fluid delivered into multiple channels correspondingly. The fluids in the channels are segmented into two or more fluid segments by a segmenting section. The each fluid segment is delivered through corresponding channel-conversion section with thickness-gradient variation in the feedblock multiplier. Each channel-conversion section includes multiple channels with configurable positions. The fluids are then combined in a multiplier section for producing the multilayer structure with overlapped layers. The multilayer structure is outputted from an extruding section.