Patents by Inventor Wendy Belluomini

Wendy Belluomini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130054873
    Abstract: Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Venu G. Nayar, Daniel F. Smith, Krishnakumar Rao Surugucchi
  • Patent number: 8386714
    Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, Michael A. Ko
  • Patent number: 8364924
    Abstract: According to one embodiment, a method for using flash memory in a storage cache comprises receiving data to be cached in flash memory of a storage cache, at least some of the received data being received from at least one of a host system and a storage medium, selecting a block of the flash memory for receiving the data, buffering the received data until sufficient data has been received to fill the block, and overwriting existing data in the selected block with the buffered data. According to another embodiment, a method comprises receiving data, at least some of the data being from a host system and/or a storage medium, and sequentially overwriting sequential blocks of the flash memory with the received data. Other devices and methods for working with flash memory in a storage cache according to various embodiments are included and described herein.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: January 29, 2013
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, Michael A. Ko
  • Publication number: 20130013943
    Abstract: Embodiments of the invention relate to dynamic power management of storage volumes and disk arrays in a storage subsystem to mitigate loss of performance resulting from the power management. The volumes and arrays are prioritized, and in real-time power is selectively reduced in response to both the prioritization and an energy savings goal. A feedback loop is provided to dynamically measure associated power gain based upon a lowering of power consumption, and device selection may be adjusted based upon received feedback.
    Type: Application
    Filed: July 31, 2012
    Publication date: January 10, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, David D. Chambliss, Joseph S. Glider, Himabindu Pucha, Rui Zhang
  • Publication number: 20130013941
    Abstract: Embodiments of the invention relate to dynamic power management of storage volumes and disk arrays in a storage subsystem to mitigate loss of performance resulting from the power management. The volumes and arrays are prioritized, and in real-time power is selectively reduced in response to both the prioritization and an energy savings goal. A feedback loop is provided to dynamically measure associated power gain based upon a lowering of power consumption, and device selection may be adjusted based upon received feedback.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 10, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, David D. Chambliss, Joseph S. Glider, Himabindu Pucha, Rui Zhang
  • Publication number: 20120297127
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith
  • Publication number: 20120297113
    Abstract: Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, James L. Hafner, Steven R. Hetzler, Assaf Nitzan, Eyal Lotem, Venu G. Nayar, Edi Shmueli, Daniel F. Smith
  • Patent number: 8284627
    Abstract: Embodiments of the invention relate to reducing energy consumption and optimizing workload and performance in multi-tier storage systems using extent-level dynamic tiering. An aspect of the invention includes a receiving data access information of a storage extent stored in a storage system and utilization information of storage devices in the storage system. The storage system includes a plurality of storage tiers and each of the plurality of storage tiers is made up of a plurality of storage devices. Storage resources required for each of the plurality of the storage tiers to satisfy the storage extent's performance and capacity requirements are estimated based on the data access information. One storage tier that would incur the lowest power consumption to the storage system for satisfying the storage extent's performance and capacity requirements is determined.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Joseph S. Glider, Jorge Guerra Delgado, Himabindu Pucha
  • Patent number: 8196119
    Abstract: A computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Binny S. Gill, Wendy A. Belluomini
  • Publication number: 20120102350
    Abstract: Embodiments of the invention relate to reducing energy consumption and optimizing workload and performance in multi-tier storage systems using extent-level dynamic tiering. An aspect of the invention includes a receiving data access information of a storage extent stored in a storage system and utilization information of storage devices in the storage system. The storage system includes a plurality of storage tiers and each of the plurality of storage tiers is made up of a plurality of storage devices. Storage resources required for each of the plurality of the storage tiers to satisfy the storage extent's performance and capacity requirements are estimated based on the data access information. One storage tier that would incur the lowest power consumption to the storage system for satisfying the storage extent's performance and capacity requirements is determined.
    Type: Application
    Filed: October 22, 2010
    Publication date: April 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Joseph S. Glider, Jorge Guerra Delgado, Himabindu Pucha
  • Patent number: 8166463
    Abstract: A method and computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: April 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Binny S. Gill, Wendy A. Belluomini
  • Publication number: 20110320687
    Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny S. Gill, Michael A. Ko
  • Patent number: 8006126
    Abstract: Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk is associated with a first validation appendix comprising second validation information, wherein the first validation appendix is stored on a first storage medium independent of said one or more storage mediums.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Veera W. Deenadhayalan, James L. Hafner, James C. Wyllie, Wendy A. Belluomini
  • Publication number: 20110185233
    Abstract: Embodiments of the invention relate to automated system problem diagnosing. An index is created with problem description information of previously diagnosed problems, a diagnosis for each problem, and a solution to each diagnosis. System states, traces and logs are extracted from a source system with a new problem. The problem diagnosis system generates problem description information of the new problem from the system states, traces and logs. Problem description information of the new problem is compared with problem description information in the problem description index. A search score is computed for each document in the problem description index. The search score is a measure of similarity between each document in the index and the description of the new problem. A matching score is assigned to each previously diagnosed problems based on the search score. The matching score is a measure of similarity between the new problem and each previously diagnosed problem.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wendy A. Belluomini, Binny Sher Gill, Xifeng Yan, Pin Zhou
  • Publication number: 20110093648
    Abstract: According to one embodiment, a method for using flash memory in a storage cache comprises receiving data to be cached in flash memory of a storage cache, at least some of the received data being received from at least one of a host system and a storage medium, selecting a block of the flash memory for receiving the data, buffering the received data until sufficient data has been received to fill the block, and overwriting existing data in the selected block with the buffered data. According to another embodiment, a method comprises receiving data, at least some of the data being from a host system and/or a storage medium, and sequentially overwriting sequential blocks of the flash memory with the received data. Other devices and methods for working with flash memory in a storage cache according to various embodiments are included and described herein.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 21, 2011
    Applicant: International Business Machines Corporation
    Inventors: Wendy A. Belluomini, Binny S. Gill, Michael A. Ko
  • Patent number: 7873878
    Abstract: A data storage method comprises storing first data in at least a first data chunk, wherein the first data chunk is a logical representation of one or more sectors on at least a first disk drive in a storage system; storing first metadata, associated with the first data, in at least a first appendix, wherein the first appendix is a logical representation of a sector region on at least the first disk drive in the storage system, and wherein the first metadata comprises first atomicity metadata (AMD) and first validity metadata (VMD) associated with the first data; and storing a copy of the first VMD for the first data in at least one low latency non-volatile storage (LLNVS) device.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Wendy Belluomini, John Edward Bish, Kenneth Day, III, James Hafner, Bret S. Weber
  • Publication number: 20100217752
    Abstract: Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk is associated with a first validation appendix comprising second validation information, wherein the first validation appendix is stored on a first storage medium independent of said one or more storage mediums.
    Type: Application
    Filed: May 11, 2010
    Publication date: August 26, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Veera W. Deenadhayalan, James L. Hafner, James C. Wyllie, Wendy A. Belluomini
  • Patent number: 7752489
    Abstract: Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk is associated with a first validation appendix comprising second validation information, wherein the first validation appendix is stored on a first storage medium independent of said one or more storage mediums.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Veera W. Deenadhayalan, James L. Hafner, James C. Wyllie, Wendy A Belluomini
  • Publication number: 20090089760
    Abstract: A computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.
    Type: Application
    Filed: March 28, 2008
    Publication date: April 2, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. Gill, Wendy A. Belluomini
  • Publication number: 20090089771
    Abstract: A method and computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Binny S. Gill, Wendy A. Belluomini