Patents by Inventor Wenhao Li
Wenhao Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11856860Abstract: A liquid dispersion includes a matrix phase of polymerizable material and at least 10% by volume of solid conductive particles distributed throughout the matrix. The conductive particles may have an average particle size of less than approximately 100 nm, and the liquid dispersion may have a viscosity of less than approximately 100 Poise. Such a liquid dispersion may be printed or extruded and then cured to form a solid thin film. The content and distribution of conductive particles within the thin film may reach a percolation threshold such that the thin film may form a conductive layer. Polymer-based devices, such as nanovoided polymer (NVP)-based actuators may be formed by co-extrusion of a nanovoided polymer material between conductive polymer electrodes.Type: GrantFiled: January 29, 2020Date of Patent: December 26, 2023Assignee: Meta Platforms Technologies, LLCInventors: Spencer Allan Wells, Kenneth Diest, Wenhao Li, Sheng Ye, Renate Eva Klementine Landig, Andrew John Ouderkirk
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Patent number: 11839314Abstract: A child carrier includes: a seat portion; a buckle movably provided on the seat portion; a backrest portion connected to the seat portion and extending upward, the backrest portion having a plurality of adjustment holes formed therein from bottom to top; and a shoulder strap having a fixed end and a free end, the fixed end being fixed on a rear side of the backrest portion, the free end passing through one of the plurality of adjustment holes and being removably connected to the seat portion.Type: GrantFiled: February 17, 2022Date of Patent: December 12, 2023Assignee: WONDERLAND SWITZERLAND AGInventors: Bo Wu, Meifeng Fan, Wenhao Li
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Publication number: 20230315538Abstract: A resource transfer information detection method and apparatus are provided. In a process of performing resource transfer path search on a resource transfer relationship graph, a current search node, a reference node that points to the current search node and that is in a current resource transfer path, and a candidate node that the current search node points to and that is in the resource transfer relationship graph are determined. A first resource transfer time is obtained between the current search node and the reference node and a second resource transfer time between the current search node and the candidate node is obtained. When the first resource transfer time and the second resource transfer time satisfy a time difference condition, the candidate node is added to the current resource transfer path to detect a target resource transfer path.Type: ApplicationFiled: May 31, 2023Publication date: October 5, 2023Applicant: Tencent Technology (Shenzhen) Company LimitedInventor: Wenhao LI
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Publication number: 20230317545Abstract: Microelectronic die package structures formed according to some embodiments may include a substrate and a die having a first side and a second side. The first side of the die is coupled to the substrate, and a die backside layer is on the second side of the die. The die backside layer includes a plurality of unfilled grooves in the die backside layer. Each of the unfilled grooves has an opening at a surface of the die backside layer, opposite the second side of the die, and extends at least partially through the die backside layer.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Pilin Liu, Feras Eid, Michael Baker, Wenhao Li, Zhaozhi Li
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Publication number: 20230317676Abstract: Microelectronic die package structures formed according to some embodiments may include a thermal compression bonding (TCB) assembly including a bond head with a first thermal zone separated from a second thermal zone by a thermal separator, the thermal separator extending through a thickness of the bond head. A bond head nozzle is coupled to a first side of the bond head, where the bond head nozzle includes one or more nozzle channels extending through a thickness of the bond head nozzle.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Michael Baker, Feras Eid, Wenhao Li, Zhaozhi Li, Pilin Liu
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Publication number: 20230317660Abstract: Microelectronic die package structures formed according to some embodiments may include a substrate having one or more solder structures. A first set of solder structures is located in a peripheral region of the substrate and a second set of solder structures is located in a central region of the substrate. A height of individual ones of the second set of solder structures is greater than a height of individual ones of the first set of solder structures. A die having a first side and a second side includes one or more conductive die pads on the first side, where individual ones of the conductive die pads are on individual ones of the first set solder structures and on individual ones of the second set solder structures. A die backside layer is on the second side of the die.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Zhaozhi Li, Feras Eid, Michael Baker, Wenhao Li, Pilin Liu, Johanna Swan
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Publication number: 20230317549Abstract: A porous mesh structure for use in the thermal management of integrated circuit devices may be formed as a solid matrix with a plurality of pores dispersed therein, wherein the solid matrix may be a plurality of fused matrix material particles and the plurality of pores may comprise between about 10% and 90% of a volume of the porous mesh structure. The porous mesh structure may be formed on an integrated circuit device and/or on a heat dissipation assembly component, and may be incorporated into an immersion cooling assembly, wherein the porous mesh structure may act as a nucleation site for a working fluid in the immersion cooling assembly.Type: ApplicationFiled: March 30, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Feras Eid, Wenhao Li, Paul Diglio, Xavier Brun, Johanna Swan
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Publication number: 20230317630Abstract: Microelectronic die package structures formed according to some embodiments may include a substrate comprising one or more conductive interconnect structures on a surface of the substrate. One or more support features are on one or more peripheral regions of the surface of the substrate. A first side of a die is coupled to the one or more conductive interconnect structures and is over the one or more support features. A die backside layer is on the second side of the die.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Wenhao Li, Feras Eid, Michael Baker, Pilin Liu, Zhaozhi Li
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Publication number: 20230313247Abstract: An antimycin compound and a preparation method and use thereof are provided. The preparation method comprises: fermenting a marine actinomycete (Steptomyces sp.4-7) with a preservation number CCTCCNO: M2020953 to obtain a fermented product and soaking and extracting the fermented product with ethyl acetate to obtain a crude extract; and carrying out separation and purification by normal-phase silica gel column chromatography, reversed-phase MPLC, and semi-preparative reversed-phase high-performance liquid chromatography. The antimycin compound has the advantages of resistance against Botrytis cinerea and Penicillium citrinum.Type: ApplicationFiled: March 29, 2023Publication date: October 5, 2023Applicant: Ningbo UniversityInventors: Lijian DING, Shan HE, Wenhao LI, Weiyan ZHANG, Yingying WEI
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Publication number: 20230317675Abstract: Microelectronic die package structures formed according to some embodiments may include a thermal compression bonding (TCB) tool including a pedestal having a convex surface to receive a package substrate, a bond head to compress a die against the package substrate, and a heat source thermally coupled to at least one of the pedestal or the bond head.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Applicant: Intel CorporationInventors: Michael Baker, Zhaozhi Li, Feras Eid, Pilin Liu, Wenhao Li
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Publication number: 20230285999Abstract: Cold-spray nozzles, systems, and techniques are described herein related to manufacturing implementations of efficient film deposition. A deposition system includes multiple feed systems to deliver solid powder materials at controlled feed rates and temperatures, and a nozzle, including convergent and divergent sections and connections to the feed systems, to receive a carrier fluid in the convergent section and to spray the carrier fluid and the solid powder materials out of the divergent section. A nozzle includes multiple ports to receive solid powder materials for admission into a carrier fluid, with one or more ports in the convergent section and one or more ports in the divergent section. A method may include delivering a carrier fluid to a nozzle, heating multiple solid powder materials, delivering these solid powder materials to the nozzle, and spraying the solid powder materials out of a divergent section of the nozzle.Type: ApplicationFiled: March 14, 2022Publication date: September 14, 2023Applicant: Intel CorporationInventors: Wenhao Li, Feras Eid, Paul Diglio, Jiraporn Seangatith
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Publication number: 20230282543Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a metal matrix composite layer on the backside surface, wherein the metal matrix composite layer has a filler material disposed therein that has a graded content to reduce the coefficient of thermal expansion at the backside surface of the integrated circuit device. The filler material may have at least two filler material particle constituents having different particle diameters, wherein a first filler material particle constituent that has the smaller average diameter is closest to the backside surface of the integrated circuit device and wherein a second filler material constituent that has the larger average diameter is farthest from the backside surface of the integrated circuit device.Type: ApplicationFiled: March 2, 2022Publication date: September 7, 2023Applicant: Intel CorporationInventors: Feras Eid, Wenhao Li, Yoshihiro Tomita
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Publication number: 20230282542Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a metal matrix composite layer on the backside surface, wherein the metal matrix composite layer has a filler material disposed therein to reduce the coefficient of thermal expansion thereof. The filler material may be a plurality of graphitic carbon filler particles, wherein the plurality of graphitic carbon filler particles has an average aspect ratio of greater than about 10, or the filler material may be a plurality of diamond particles, wherein the filler material is clad with a metal material.Type: ApplicationFiled: March 2, 2022Publication date: September 7, 2023Applicant: Intel CorporationInventors: Wenhao Li, Feras Eid, Yoshihiro Tomita
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Publication number: 20230271445Abstract: Reusable composite stencils for spray processes, particularly for spray processes used in the fabrication of integrated circuit devices, may be fabricated having a permanent core and at least one sacrificial material layer. Thus, in operation, when a predetermined amount of the sacrificial material layer has been ablated away by a material being sprayed in the spray process, the remaining sacrificial material layer may be removed and reapplied to its original thickness. Therefore, the permanent core, which is usually expensive and/or difficult to fabricate, may be repeatedly reused.Type: ApplicationFiled: February 25, 2022Publication date: August 31, 2023Applicant: Intel CorporationInventors: Feras Eid, Wenhao Li, Jiraporn Seangatith, Paul Diglio, Xavier Brun
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Publication number: 20230230780Abstract: Disclosed are a passive triggered-power electronic tap-changer device and a contact device. The power electronic tap-changer device comprises: two taps, a main contact, two auxiliary contacts, two trigger contacts, an output terminal, two thyristors, and four voltage divider resistors, which can achieve the passive triggering of a power electronic switch by means of controlling the auxiliary contacts and the trigger contacts. Provided in the present invention is a contact device for the passive triggered-power electronic tap-changer, comprising: at least two stationary contacts, a main contact, two thyristor trigger contacts, two thyristor auxiliary contacts, and a drive shaft, wherein the main contact, the thyristor trigger contacts, and the thyristor auxiliary contacts are fixed to the drive shaft, the contact device can switch the power electronic switch to different stationary contacts by means of controlling the rotation of the drive shaft, and maintains the switching time sequence of passive triggering.Type: ApplicationFiled: May 6, 2021Publication date: July 20, 2023Applicants: ELECTRIC POWER RESEARCH INSTITUTE. CHINA SOUTHERN POWER GRID, SHANGHAI HUAMING POWER EQUIPMENT CO., LTD.Inventors: Yao YUAN, Yi XIAO, Xi ZHANG, Qiang ZHU, Zongming HE, Shuaibing WANG, Lianwei BAO, Jiahui YANG, Wenhao LI, Linjie ZHAO, Ruihai LI
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Publication number: 20230222721Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media relate to a method for generating an avatar within a video communication platform. The system may receive a selection of an avatar model from a group of one or more avatar models. The system receives a first video stream and audio data of a first video conference participant. The system analyzes image frames of the first video stream to determine a group of pixels representing the first video conference participant. The system determines a plurality of facial expression parameter associated with the determined group of pixels. Based on the determined plurality of facial expression parameter values, the system generates a first modified video stream depicting a digital representation of the first video conference participant in an avatar form.Type: ApplicationFiled: January 31, 2022Publication date: July 13, 2023Inventors: Wenyu Chen, Chichen Fu, Guozhu Hu, Qiang Li, Wenhao Li, Wenchong Lin, Bo Ling, Gengdai Liu, Geng Wang, Kai Wei, Yian Zhu
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Publication number: 20230098710Abstract: Technologies for high throughput additive manufacturing (HTAM) structures are disclosed. In one embodiment, a sacrificial dielectric is formed to provide a negative mask on which to pattern a conductive trace using HTAM. In another embodiment, a permanent dielectric is patterned using a processing such as laser project patterning. A conductive trace can then be patterned using HTAM. In yet another embodiment, conductive traces with tapered sidewalls can be patterned, and then a buffer layer and HTAM layer can be deposited on top.Type: ApplicationFiled: September 24, 2021Publication date: March 30, 2023Applicant: Intel CorporationInventors: Yoshihiro Tomita, Aleksandar Aleksov, Feras Eid, Adel Elsherbini, Wenhao Li, Stephen Morein
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Publication number: 20230098303Abstract: Technologies for high throughput additive manufacturing (HTAM) structures are disclosed. In one embodiment, a sacrificial dielectric is formed to provide a negative mask on which to pattern a conductive trace using HTAM. In another embodiment, a permanent dielectric is patterned using a processing such as laser project patterning. A conductive trace can then be patterned using HTAM. In yet another embodiment, conductive traces with tapered sidewalls can be patterned, and then a buffer layer and HTAM layer can be deposited on top.Type: ApplicationFiled: September 24, 2021Publication date: March 30, 2023Applicant: Intel CorporationInventors: Yoshihiro Tomita, Aleksandar Aleksov, Feras Eid, Adel Elsherbini, Wenhao Li, Stephen Morein
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Publication number: 20230099827Abstract: Technologies for high throughput additive manufacturing (HTAM) structures are disclosed. In one embodiment, a sacrificial dielectric is formed to provide a negative mask on which to pattern a conductive trace using HTAM. In another embodiment, a permanent dielectric is patterned using a processing such as laser project patterning. A conductive trace can then be patterned using HTAM. In yet another embodiment, conductive traces with tapered sidewalls can be patterned, and then a buffer layer and HTAM layer can be deposited on top.Type: ApplicationFiled: September 24, 2021Publication date: March 30, 2023Applicant: Intel CorporationInventors: Adel Elsherbini, Aleksandar Aleksov, Feras Eid, Wenhao Li, Stephen Morein, Yoshihiro Tomita
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Patent number: 11530054Abstract: A spacecraft nutation inhibition method for low-orbit geomagnetic energy storage in-orbit delivery includes: S1, enabling a delivery connection rod to be slidably connected to two mass blocks in a length direction, and adjusting the center of mass of a spacecraft system to pass through a main connecting shaft; S2, respectively measuring, calibrating and adjusting the center of mass and the principal axis of inertia of the delivery connection rod that is to deliver the space target or de-orbit debris; S3, carrying out energy storage delivery; S4, respectively adjusting the center of mass and the moment of inertia of the delivery connection rod after delivering the space target or de-orbit debris; S5, carrying out energy dissipation and unloading; and S6, enabling the spacecraft system to prepare to grab the next space target or de-orbit debris and proceeding to the next delivery work cycle.Type: GrantFiled: June 23, 2020Date of Patent: December 20, 2022Assignees: INSTITUTE OF MECHANICS, CHINESE ACADEMY OF SCIENCES, GUANGDONG ACADEMY OF AEROSPACE RESEARCH IMECH, CASInventors: Wenhao Li, Heng Zhang, Guanhua Feng, Chen Zhang, Lei Yang, Linli Lv