Abstract: Transistors with switchable polarity and non-volatile configurations are provided. The transistors include a van der Waals (vdW) semiconductor layer. A ferroelectric layer with local polarization determines the type and concentration of the doping in the vdW semiconductor layer. Local program gates allow application of voltage to set or switch the polarization in the ferroelectric layer in the source and drain regions. Source and drain contacts permit either n-type or p-type transistor operations according to the carrier polarity in the vdW semiconductor layer.

Abstract: A classifier circuit includes an array of dual gate graphene transistors, each of the transistors having a source, a top gate receiving one of an input voltage to be evaluated or a reference voltage, a bottom or embedded gate receiving the other of the input voltage or reference voltage and a drain, the source and drain contacting a graphene channel One of the source and the drain is connected to a voltage source. A common output combines output current of a plurality of the dual gate graphene transistors, which current varies in response to the difference between the input voltage and the reference voltage. A method for forming a classifier transistor with high remanent polarization forms dielectric with ferroelectric capability on a low resistivity substrate. A non-ferroelectric oxide layer is formed on the dielectric. A window is opened, and a graphene channel is formed in the window.

Abstract: Transistors with switchable polarity and non-volatile configurations are provided. The transistors include a van der Waals (vdW) semiconductor layer. A ferroelectric layer with local polarization determines the type and concentration of the doping in the vdW semiconductor layer. Local program gates allow application of voltage to set or switch the polarization in the ferroelectric layer in the source and drain regions. Source and drain contacts permit either n-type or p-type transistor operations according to the carrier polarity in the vdW semiconductor layer.

Abstract: A classifier circuit includes an array of dual gate graphene transistors, each of the transistors having a source, a top gate receiving one of an input voltage to be evaluated or a reference voltage, a bottom or embedded gate receiving the other of the input voltage or reference voltage and a drain, the source and drain contacting a graphene channel One of the source and the drain is connected to a voltage source. A common output combines output current of a plurality of the dual gate graphene transistors, which current varies in response to the difference between the input voltage and the reference voltage. A method for forming a classifier transistor with high remanent polarization forms dielectric with ferroelectric capability on a low resistivity substrate. A non-ferroelectric oxide layer is formed on the dielectric. A window is opened, and a graphene channel is formed in the window.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.

Abstract: The present disclosure provides vertical hetero- and homo-junction tunnel FET (TFET) based on multi-layer black phosphorus (BP) and transition metal dichalcogenides.

Abstract: The present disclosure provides vertical hetero- and homo-junction tunnel FET (TFET) based on multi-layer black phosphorus (BP) and transition metal dichalcogenides.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges passing through the nanopore.

Abstract: A technique is provided for performing sequencing with a nanodevice. Alternating graphene layers and dielectric layers are provided one on top of another to form a multilayer stack of heterojunctions. The dielectric layers include boron nitride, molybdenum disulfide, and/or hafnium disulfide layers. A nanopore is formed through the graphene layers and the dielectric layers. The graphene layers are individually addressed by applying individual voltages to each of the graphene layers on a one to one basis when a particular base of a molecule is in the nanopore. Each of the graphene layers is an electrode. Individual electrical currents are measured for each of the graphene layers as the particular base moves from a first graphene layer through a last graphene layer in the nanopore. The base is identified according to the individual electrical currents repeatedly measured for the base moving from the first through last graphene layer in the nanopore.

Abstract: A technique is provided for performing sequencing with a nanodevice. Alternating graphene layers and dielectric layers are provided one on top of another to form a multilayer stack of heterojunctions. The dielectric layers include boron nitride, molybdenum disulfide, and/or hafnium disulfide layers. A nanopore is formed through the graphene layers and the dielectric layers. The graphene layers are individually addressed by applying individual voltages to each of the graphene layers on a one to one basis when a particular base of a molecule is in the nanopore. Each of the graphene layers is an electrode. Individual electrical currents are measured for each of the graphene layers as the particular base moves from a first graphene layer through a last graphene layer in the nanopore. The base is identified according to the individual electrical currents repeatedly measured for the base moving from the first through last graphene layer in the nanopore.

Abstract: A technique is provided for performing sequencing with a nanodevice. Alternating graphene layers and dielectric layers are provided one on top of another to form a multilayer stack of heterojunctions. The dielectric layers include boron nitride, molybdenum disulfide, and/or hafnium disulfide layers. A nanopore is formed through the graphene layers and the dielectric layers. The graphene layers are individually addressed by applying individual voltages to each of the graphene layers on a one to one basis when a particular base of a molecule is in the nanopore. Each of the graphene layers is an electrode. Individual electrical currents are measured for each of the graphene layers as the particular base moves from a first graphene layer through a last graphene layer in the nanopore. The base is identified according to the individual electrical currents repeatedly measured for the base moving from the first through last graphene layer in the nanopore.

Abstract: A technique is provided for performing sequencing with a nanodevice. Alternating graphene layers and dielectric layers are provided one on top of another to form a multilayer stack of heterojunctions. The dielectric layers include boron nitride, molybdenum disulfide, and/or hafnium disulfide layers. A nanopore is formed through the graphene layers and the dielectric layers. The graphene layers are individually addressed by applying individual voltages to each of the graphene layers on a one to one basis when a particular base of a molecule is in the nanopore. Each of the graphene layers is an electrode. Individual electrical currents are measured for each of the graphene layers as the particular base moves from a first graphene layer through a last graphene layer in the nanopore. The base is identified according to the individual electrical currents repeatedly measured for the base moving from the first through last graphene layer in the nanopore.

Abstract: Semiconductor nano pressure sensor devices having graphene membrane suspended over cavities formed in a semiconductor substrate. A suspended graphene membrane serves as an active electro-mechanical membrane for sensing pressure, which can be made very thin, from about one atomic layer to about 10 atomic layers in thickness, to improve the sensitivity and reliability of a semiconductor pressure sensor device.

Abstract: Semiconductor nano pressure sensor devices having graphene membrane suspended over open cavities formed in a semiconductor substrate. A suspended graphene membrane serves as an active electro-mechanical membrane for sensing pressure, which can be made very thin, from about one atomic layer to about 10 atomic layers in thickness, to improve the sensitivity and reliability of a semiconductor pressure sensor device.

Abstract: A three-dimensional integrated circuit includes a semiconductor device, an insulator formed on the semiconductor device, an interconnect formed in the insulator, and a graphene device formed on the insulator.

Abstract: A method of forming a semiconductor device includes forming a field-effect transistor (FET), and forming a fuse which includes a graphene layer and is electrically connected to the FET.

Abstract: A technique for a nanodevice is provided. A reservoir is separated into two parts by a membrane. A nanopore is formed through the membrane, and the nanopore connects the two parts of the reservoir. The nanopore and the two parts of the reservoir are filled with ionic buffer. The membrane includes a graphene layer and insulating layers. The graphene layer is wired to first and second metal pads to form a graphene transistor in which transistor current flowing through the graphene transistor is modulated by charges or dipoles passing through the nanopore.