Abstract: Solutions described herein refer to cryptographic data processing, utilizing a first masking scheme of a shared secret and a second masking scheme of the shared secret, wherein a transformation from the first masking scheme to the second masking scheme is conducted by forcing one type of calculation among at least two types of calculations.

Abstract: Error correction is proposed, wherein, on the basis of a data word, a syndrome calculation is carried out with a matrix M on the basis of a matrix H of a code, and, if the result of the syndrome calculation reveals that the data word is erroneous, the result of the syndrome calculation is transformed by means of a linear mapping. Next, an error vector is determined on the basis of the result of the linear mapping by means of an efficient error correction algorithm and the erroneous data word is corrected on the basis of the error vector.

Abstract: Error correction is proposed in which a syndrome calculation is carried out in a code domain of a second code and an efficient error correction algorithm is carried out in a code domain of a first code.

Abstract: A device is suggested including a cryptographic module, wherein the device is operable in a secure mode and in a non-secure mode, wherein the cryptographic module is configured in the secure mode by storing a secret key and a seed value in the cryptographic module, and wherein the device is operable in the non-secure mode to generate a signature based on input data utilizing the secret key and the seed value. Also, a method for operating such device is provided.

Abstract: An integrated circuit for outputting a function value, comprising a pattern matching circuit, configured to compare an input value and multiple transformed versions of the input value with a specified bit pattern, wherein the transformed versions of the input value or the specified bit pattern are created by repeated application of a transformation to the input value or the specified bit pattern, wherein the function is invariant under the transformation or wherein an inverse transformation exists for the transformation, by means of which a change in the function values that is caused by the transformation of the input values can be reversed, a selection circuit configured to select a function value depending on the matching result of the pattern matching circuit and the input value, and an output circuit configured to output a function value for the input value based on the selected function value.

Abstract: A method for providing challenges to a device comprising (i) compiling a first challenge based on a first random value and a parameter; (ii) compiling a second challenge based on a second random value, the parameter and based on the first challenge or any intermediate result thereof; and (iii) providing the first challenge and the second challenge to the device.

Abstract: An integrated circuit for outputting a function value, comprising a pattern matching circuit, configured to compare an input value and multiple transformed versions of the input value with a specified bit pattern, wherein the transformed versions of the input value or the specified bit pattern are created by repeated application of a transformation to the input value or the specified bit pattern, wherein the function is invariant under the transformation or wherein an inverse transformation exists for the transformation, by means of which a change in the function values that is caused by the transformation of the input values can be reversed, a selection circuit configured to select a function value depending on the matching result of the pattern matching circuit and the input value, and an output circuit configured to output a function value for the input value based on the selected function value.

Abstract: One embodiment describes a method for permuting data elements, comprising receiving a sequence of data elements, and carrying out a plurality of interchange operations each comprising randomly selecting a data element from the data elements in the sequence, interchanging the data element with another data element at a deterministically predefined position in the sequence of data elements, and applying a predefined permutation to the deterministically predefined position or to the sequence of data elements.

Abstract: A device is suggested including a cryptographic module, wherein the device is operable in a secure mode and in a non-secure mode, wherein the cryptographic module is configured in the secure mode by storing a secret key and a seed value in the cryptographic module, and wherein the device is operable in the non-secure mode to generate a signature based on input data utilizing the secret key and the seed value. Also, a method for operating such device is provided.

Abstract: A memory arrangement having a memory cell array, wherein each column is associated with a bit line and each row is associated with a word line, wherein the columns have first columns of memory cells that store useful data, and columns of memory cells of a second column type that store prescribed verification data, wherein during a read access operation the memory cells of at least the columns of memory cells of the second column type set the associated bit line to a value that corresponds to a logic combination of the values stored by the memory cells of the column of the second column type that belong to rows of memory cells addressed during the read access operation, and a detection circuit that is configured to, during a read access operation, detect whether a bit line associated with a column of memory cells of the second column type is set to a value that corresponds to the logic combination of values stored by memory cells of the column of the second column type of memory cells and whose values belong t

Abstract: A device for determining an inverse of an initial value related to a modulus, comprising a unit configured to process an iterative algorithm in a plurality of iterations, wherein an iteration includes two modular reductions and has, as an iteration loop result, values obtained by an iteration loop of an extended Euclidean algorithm.

Abstract: According to one embodiment, a processing circuit is described including a first input path and a second input path, a processing element configured to receive a first input bit and a second input bit via the first input path and the second input path and configured to perform a logic operation which is commutative with respect to the first input bit and the second input bit and a sorter configured to distribute the first input bit and the second input bit to the first input path and the second input path according to a predetermined sorting rule.

Abstract: A memory arrangement having a memory cell array, wherein each column is associated with a bit line and each row is associated with a word line, wherein the columns have first columns of memory cells that store useful data, and columns of memory cells of a second column type that store prescribed verification data, wherein during a read access operation the memory cells of at least the columns of memory cells of the second column type set the associated bit line to a value that corresponds to a logic combination of the values stored by the memory cells of the column of the second column type that belong to rows of memory cells addressed during the read access operation, and a detection circuit that is configured to, during a read access operation, detect whether a bit line associated with a column of memory cells of the second column type is set to a value that corresponds to the logic combination of values stored by memory cells of the column of the second column type of memory cells and whose values belong t

Abstract: A method for generating a data frame is disclosed which contains a user data block with the message and a code block. To generate the code block, a first data record is initially coded by means of a first coding algorithm in order to calculate a first code word. Subsequently, the message is transformed. By using the first code words thus generated and the transformed message, a second code word is subsequently calculated by using a second coding algorithm. The data frame comprises the second code word but not the first code word.

Abstract: In various embodiments, a communication arrangement is provided. The communication arrangement includes a first communication device, and a second communication device. The first communication device includes a processing element configured to read out a device-specific number from a component of the first communication device, to mask the device-specific number by the random number and to transmit the masked device-specific number to the second communication device. The second communication device includes a mapping element configured to map the masked device-specific number to a codeword of a code and to transmit the codeword to the first communication device. The first communication device further includes a key generator configured to demask the codeword by the random number and to determine a cryptographic key based on the demasked codeword.

Abstract: Disclosed herein are techniques related to predetermining a token for use in a cryptographic system. A method includes providing a memento, mapping the memento to a candidate token according to a rule that updates a parameter, predetermine the token to be the candidate token, if the candidate token meets a test condition according to the rule, identifying a parameter value of the parameter, and providing the memento and the parameter value for future use as an input to re-generate the token. Another method disclosed herein is to re-generate the predetermined token for use in a cryptographic system. The method includes providing a memento associated with the predetermined token, providing a parameter value associated with the predetermined token, and providing a precept for mapping the memento to a candidate token. Further disclosed is instruction code for performing the techniques disclosed herein.

Abstract: A key-generating apparatus is provided for generating a session key which is known to a first communication apparatus and a second communication apparatus, for the first communication apparatus, from secret information which may be determined by the first and second communication apparatuses. The key-generating apparatus includes a first module operable to calculate the session key using a concatenation of at least a part of a random number and a part of the secret information, and a second module operable to use the session key for communication with the second communication apparatus.

Abstract: Embodiments relate to systems and methods for authenticating devices and securing data. In embodiments, a session key for securing data between two devices can be derived as a byproduct of a challenge-response protocol for authenticating one or both of the devices.

Abstract: Embodiments relate to systems and methods for authenticating devices and securing data. In embodiments, a session key for securing data between two devices can be derived as a byproduct of a challenge-response protocol for authenticating one or both of the devices.

Abstract: In various embodiments, a communication arrangement is provided. The communication arrangement includes a first communication device, and a second communication device. The first communication device includes a processing element configured to read out a device-specific number from a component of the first communication device, to mask the device-specific number by the random number and to transmit the masked device-specific number to the second communication device. The second communication device includes a mapping element configured to map the masked device-specific number to a codeword of a code and to transmit the codeword to the first communication device. The first communication device further includes a key generator configured to demask the codeword by the random number and to determine a cryptographic key based on the demasked codeword.