Patents by Inventor Wieland Fischer

Wieland Fischer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160105281
    Abstract: According to one embodiment, a processing circuit is described including a first input path and a second input path, a processing element configured to receive a first input bit and a second input bit via the first input path and the second input path and configured to perform a logic operation which is commutative with respect to the first input bit and the second input bit and a sorter configured to distribute the first input bit and the second input bit to the first input path and the second input path according to a predetermined sorting rule.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 14, 2016
    Inventors: Wieland FISCHER, Thomas KUENEMUND, Bernd MEYER
  • Publication number: 20150350241
    Abstract: A method for generating a data frame is disclosed which contains a user data block with the message and a code block. To generate the code block, a first data record is initially coded by means of a first coding algorithm in order to calculate a first code word. Subsequently, the message is transformed. By using the first code words thus generated and the transformed message, a second code word is subsequently calculated by using a second coding algorithm. The data frame comprises the second code word but not the first code word.
    Type: Application
    Filed: June 2, 2015
    Publication date: December 3, 2015
    Inventors: Albrecht Mayer, Gerd Dirscherl, Wieland Fischer
  • Publication number: 20150270965
    Abstract: Disclosed herein are techniques related to predetermining a token for use in a cryptographic system. A method includes providing a memento, mapping the memento to a candidate token according to a rule that updates a parameter, predetermine the token to be the candidate token, if the candidate token meets a test condition according to the rule, identifying a parameter value of the parameter, and providing the memento and the parameter value for future use as an input to re-generate the token. Another method disclosed herein is to re-generate the predetermined token for use in a cryptographic system. The method includes providing a memento associated with the predetermined token, providing a parameter value associated with the predetermined token, and providing a precept for mapping the memento to a candidate token. Further disclosed is instruction code for performing the techniques disclosed herein.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 24, 2015
    Inventor: Wieland Fischer
  • Publication number: 20150236853
    Abstract: One embodiment describes a method for permuting data elements, comprising receiving a sequence of data elements, and carrying out a plurality of interchange operations each comprising randomly selecting a data element from the data elements in the sequence, interchanging the data element with another data element at a deterministically predefined position in the sequence of data elements, and applying a predefined permutation to the deterministically predefined position or to the sequence of data elements.
    Type: Application
    Filed: February 17, 2015
    Publication date: August 20, 2015
    Inventors: Wieland Fischer, Bernd Meyer
  • Patent number: 8977668
    Abstract: A calculating unit for reducing an input number with respect to a modulus, wherein the input number has input number portions of different significances, wherein the input number portions represent the input number with respect to a division number, wherein the modulus has modulus portions of different significances, and wherein the modulus portions represent the modulus with respect to the division number, includes a unit for estimating a result of an integer division of the input number by the modulus using a stored most significant portion of the number, a stored most significant portion of the modulus and the number, and for storing the estimated result in a memory of the calculating unit, and a unit for calculating a reduction result based on a subtraction of a product of the modulus and a value derived from the estimated result from the number.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8879726
    Abstract: An apparatus for calculating a result of a scalar multiplication of a reference number with a reference point on an elliptic curve comprises a point selector and a processor. The point selector is configured to select randomly or pseudo-randomly an auxiliary point on the elliptic curve. The processor is configured to calculate the result of the scalar multiplication with a double-and-always-add process using the auxiliary point.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: November 4, 2014
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8861725
    Abstract: A random bit stream generator includes a plurality of feedback shift registers configured to store a plurality of bit values that represent an internal state of the random bit stream generator. Each feedback shift register includes a register input and a register output. The random bit stream generator further includes a Boolean output function configured to receive the plurality of register outputs from the plurality of feedback registers, to perform a first Boolean combination of the plurality of register outputs, and to provide a corresponding output bit, wherein a plurality of successive output bits forms a random bit stream. A feedback loop is configured to perform a second Boolean combination of the output bit with at least one register feedback bit of at least one of the feedback shift registers, so that the register input of the at least one feedback shift register is a function of the output bit.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: October 14, 2014
    Assignee: Infineon Technologies AG
    Inventors: Rainer Goettfert, Berndt Gammel, Markus Gail, Wieland Fischer
  • Patent number: 8861722
    Abstract: A device for generating a session key which is known to a first communication partner and a second communication partner, for the first communication partner, from secret information which may be determined by the first and second communication partners, includes a first module operable to calculate the session key using a concatenation of at least a part of a random number and a part of the secret information. The device also includes a second module operable to use the session key for communication with the second communication partner.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 14, 2014
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Wieland Fischer, Stefan Mangard
  • Publication number: 20140169557
    Abstract: A key-generating apparatus is provided for generating a session key which is known to a first communication apparatus and a second communication apparatus, for the first communication apparatus, from secret information which may be determined by the first and second communication apparatuses. The key-generating apparatus includes a first module operable to calculate the session key using a concatenation of at least a part of a random number and a part of the secret information, and a second module operable to use the session key for communication with the second communication apparatus.
    Type: Application
    Filed: November 7, 2013
    Publication date: June 19, 2014
    Inventors: Berndt Gammel, Wieland Fischer, Stefan Mangard
  • Publication number: 20140129837
    Abstract: Embodiments relate to systems and methods for authenticating devices and securing data. In embodiments, a session key for securing data between two devices can be derived as a byproduct of a challenge-response protocol for authenticating one or both of the devices.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Inventors: Cheow Guan Lim, Stephan Schaecher, Wieland Fischer, Bernd Meyer
  • Publication number: 20140129840
    Abstract: Embodiments relate to systems and methods for authenticating devices and securing data. In embodiments, a session key for securing data between two devices can be derived as a byproduct of a challenge-response protocol for authenticating one or both of the devices.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Inventors: Cheow Guan Lim, Stephan Schaecher, Wieland Fischer, Bernd Meyer
  • Patent number: 8705732
    Abstract: A device for generating a session key which is known to a first communication partner and a second communication partner, for the first communication partner, from secret information which may be determined by the first and second communication partners, includes a first module operable to calculate the session key using a concatenation of at least a part of a random number and a part of the secret information. The device also includes a second module operable to use the session key for communication with the second communication partner.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: April 22, 2014
    Assignee: Infineon Technologies AG
    Inventors: Berndt Gammel, Wieland Fischer, Stefan Mangard
  • Publication number: 20140019502
    Abstract: A random bit stream generator includes a plurality of feedback shift registers configured to store a plurality of bit values that represent an internal state of the random bit stream generator. Each feedback shift register includes a register input and a register output. The random bit stream generator further includes a Boolean output function configured to receive the plurality of register outputs from the plurality of feedback registers, to perform a first Boolean combination of the plurality of register outputs, and to provide a corresponding output bit, wherein a plurality of successive output bits forms a random bit stream. A feedback loop is configured to perform a second Boolean combination of the output bit with at least one register feedback bit of at least one of the feedback shift registers, so that the register input of the at least one feedback shift register is a function of the output bit.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 16, 2014
    Applicant: Infineon Technologies AG
    Inventors: Rainer Goettfert, Berndt Gammel, Markus Gail, Wieland Fischer
  • Patent number: 8630411
    Abstract: Embodiments relate to systems and methods for authenticating devices and securing data. In embodiments, a session key for securing data between two devices can be derived as a byproduct of a challenge-response protocol for authenticating one or both of the devices.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: January 14, 2014
    Assignee: Infineon Technologies AG
    Inventors: Cheow Guan Lim, Stephan Schaecher, Wieland Fischer, Bernd Meyer
  • Publication number: 20130346461
    Abstract: An apparatus for calculating a result of a scalar multiplication of a reference number with a reference point on an elliptic curve comprises a point selector and a processor. The point selector is configured to select randomly or pseudo-randomly an auxiliary point on the elliptic curve. The processor is configured to calculate the result of the scalar multiplication with a double-and-always-add process using the auxiliary point.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 26, 2013
    Applicant: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8542820
    Abstract: An apparatus for calculating a result of a scalar multiplication of a reference number with a reference point on an elliptic curve comprises a point selector and a processor. The point selector is configured to select randomly or pseudo-randomly an auxiliary point on the elliptic curve. The processor is configured to calculate the result of the scalar multiplication with a double-and-always-add process using the auxiliary point.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: September 24, 2013
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8417760
    Abstract: For calculating a result of a modular multiplication with long operands, at least the multiplicand is divided into at least three shorter portions. Using the three shorter portions of the multiplicand, the multiplier and the modulus, a modular multiplication is performed within a cryptographic calculation, wherein the portions of the multiplicand, the multiplier and the modulus are parameters of the cryptographic calculation. The calculation is performed sequentially using the portions of the multiplicand and using an intermediate result obtained in a previous calculation, until all portions of the multiplicand are processed, to obtain the final result of the modular multiplication. The calculation of an intermediate result is performed using a multiplication addition operation, in which MMD operations and updating operations are performed sequentially, and short auxiliary registers and short result registers are used.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 9, 2013
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8364737
    Abstract: For calculating the result of a sum of a first operand and a second operand, a modified second operand is calculated, which is negative and less than the modulus. Based on this modified second operand, a sum is calculated which is less than a maximally processable number of a calculating unit executing the calculation. Finally, the sum calculated using the modified second operand is reduced, namely with respect to the modulus, to obtain the result of the sum of the first and second operands.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: January 29, 2013
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8364740
    Abstract: For calculating a result of a modular multiplication with long operands, at least the multiplicand is divided into at least three shorter portions. Using the three shorter portions of the multiplicand, the multiplier and the modulus, a modular multiplication is performed within a cryptographic calculation, wherein the portions of the multiplicand, the multiplier and the modulus are parameters of the cryptographic calculation. The calculation is performed sequentially using the portions of the multiplicand and using an intermediate result obtained in a previous calculation, until all portions of the multiplicand are processed, to obtain the final result of the modular multiplication.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: January 29, 2013
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 8290151
    Abstract: A device for determining an inverse of an initial value related to a modulus, comprising a unit configured to process an iterative algorithm in a plurality of iterations, wherein an iteration includes two modular reductions and has, as an iteration loop result, values obtained by an iteration loop of an extended Euclidean algorithm.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: October 16, 2012
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer