Patents by Inventor William A. Martin

William A. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240009299
    Abstract: The present invention provides compositions comprising polypeptides comprising a plurality of epitopes from the spike glycoprotein of SARS-CoV-2, systems, and methods of using thereof for the treatment of viral infections (e.g., coronavirus disease 2019 (COVID-19)).
    Type: Application
    Filed: August 4, 2021
    Publication date: January 11, 2024
    Inventors: Feixiong Cheng, William Martin
  • Patent number: 11865632
    Abstract: Thin-film devices, for example electrochromic devices for windows, and methods of manufacturing are described. Particular focus is given to methods of patterning optical devices. Various edge deletion and isolation scribes are performed, for example, to ensure the optical device has appropriate isolation from any edge defects. Methods described herein apply to any thin-film device having one or more material layers sandwiched between two thin film electrical conductor layers. The described methods create novel optical device configurations.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: January 9, 2024
    Assignee: View, Inc.
    Inventors: Abhishek Anant Dixit, Todd William Martin, Anshu A. Pradhan, Fabian Strong, Robert T. Rozbicki
  • Publication number: 20240002049
    Abstract: In one aspect the subject matter herein describes a cable tilt actuator for an aircraft propulsion unit. One embodiment comprises: a cable spool, fore and aft cable sections, a compression beam, a compression beam guide, and a linear actuator. As the linear actuator drives the compression beam, relative rotation is imposed between the compression beam and the spool. Described, in one aspect, is an embodiment configured to tilt an aircraft propulsion unit.
    Type: Application
    Filed: November 21, 2021
    Publication date: January 4, 2024
    Inventor: William Martin Waide
  • Patent number: 11857818
    Abstract: A pump panel training device is provided and includes a plurality of simulated gages operable to imitate gages upon a fire truck pump panel, a plurality of simulated controls operable to imitate controls upon the fire truck pump panel, and a simulated water hose operable to imitate one of water temperature changes, water temperature pressure, and water hose vibration for the fire truck pump panel.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: January 2, 2024
    Assignee: FAAC Incorporated
    Inventors: David S. Bouwkamp, William Martin, Nikolaos Dimitri Zachary Kazakos, James R. Mason, Dale Eammon Atkin, Travis Staley, Steven Olson, Joseph Lewis Clift, Stuart Ball, Philip C. Duczyminski
  • Publication number: 20230420040
    Abstract: A static random-access memory is set forth comprising: a word line circuit for generating a word line signal on a word line; a plurality of six-transistor memory cells arranged between a first bitline, a second bitline and the word line for simultaneously selecting one of either all or a portion of the plurality of six-transistor memory cells for data reading or writing, and wherein each memory cell includes first and second n-channel transistors and a bitline precharge circuit for precharging the first bitline and second bitline to a voltage of Vdd/2 prior to the first and second n-channel transistors receiving the word line signal.
    Type: Application
    Filed: August 21, 2023
    Publication date: December 28, 2023
    Inventors: Katsuyuki SATO, William Martin SNELGROVE, Saijagan SAIJAGAN, Joseph Francis ROHLMAN
  • Patent number: 11854021
    Abstract: Method and system for providing access to information comprising the steps of receiving a request for information derived from data from a requester having one or more requester properties. Determining if the one or more requester properties meet one or more predetermined criteria associated with the data, if the one or more requester properties meet the predetermined criteria then providing the requested information to the requester. Storing data describing the request within a blockchain. In another aspect, there is provided a method and system for anonymizing data comprising the steps of at a first source of data determining one or more parameters of a procedure for dividing a first data set into subsets of data, such that each subset of data meets one or more criteria. Providing the parameters to a second source of data. At the second source of data amending the parameters such that the procedure will divide a second data set data into subsets of data that each meet the one or more criteria.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: December 26, 2023
    Assignee: Barclays Execution Services Limited
    Inventors: Anthony A. Macey, Harry Powell, Richard Craibe William Martin, Antoine Amend
  • Publication number: 20230409338
    Abstract: An example device includes a plurality of computational memory banks. Each computational memory bank of the plurality of computational memory banks includes an array of memory units and a plurality of processing elements connected to the array of memory units. The device further includes a plurality of single instruction, multiple data (SIMD) controllers. Each SIMD controller of the plurality of SIMD controllers is contained within at least one computational memory bank of the plurality of computational memory banks. Each SIMD controller is to provide instructions to the at least one computational memory bank.
    Type: Application
    Filed: July 27, 2023
    Publication date: December 21, 2023
    Inventors: William Martin SNELGROVE, Darrick John WIEBE
  • Patent number: 11844826
    Abstract: The invention is directed to T cell epitopes wherein said epitopes comprises a peptide or polypeptide chain comprising at least a portion of an immunoglobulin constant or variable region. The invention also relates to methods of using and methods of making the epitopes of the invention.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: December 19, 2023
    Assignee: EpiVax Inc.
    Inventors: Anne De Groot, William Martin, Daniel S. Rivera
  • Publication number: 20230395142
    Abstract: A low-power static random access memory (SRAM) is set forth which includes a cache memory function without requiring a special bit cell, and which realizes robust read and write operation without any write assist circuit at 16 nm or below FinFET technology. The SRAM comprises a half-Vdd precharge 6T SRAM cell array for robust operation at low supply voltage at 16 nm or below, and with cacheable dynamic flip-flop based differential amplifier referred to as a main amplifier (MA). Prior art 6T SRAM cell arrays use Vdd or Vdd-Vth precharge schemes, and have separate read and write amplifiers. The SRAM set forth uses one main amplifier only, which is connected to the bit line (BL) through a transmission gate. The main amplifiers functions as a read amplifier, write amplifier, and a cache memory.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 7, 2023
    Inventors: Katsuyuki SATO, William Martin SNELGROVE, Saijagan SAIJAGAN
  • Publication number: 20230393442
    Abstract: Certain embodiments relate to optical devices and methods of fabricating optical devices that pre-treat a sub-layer to enable selective removal of the pre-treated sub-layer and overlying layers. Other embodiments pertain to methods of fabricating an optical device that apply a sacrificial material layer.
    Type: Application
    Filed: August 18, 2023
    Publication date: December 7, 2023
    Inventors: Todd William Martin, Abhishek Anant Dixit, Fabian Wilbur Strong, Anshu Ajit Pradhan
  • Publication number: 20230395141
    Abstract: A low-power static random access memory (SRAM) is set forth which includes a cache memory function without requiring a special bit cell, and which realizes robust read and write operation without any write assist circuit at 16 nm or below FinFET technology. The SRAM comprises a half-Vdd precharge 6 T SRAM cell array for robust operation at low supply voltage at 16 nm or below, and with cacheable dynamic flip-flop based differential amplifier referred to as a main amplifier (MA). Prior art 6 T SRAM cell arrays use Vdd or Vdd-Vth precharge schemes, and have separate read and write amplifiers. The SRAM set forth uses one main amplifier only, which is connected to the bit line (BL) through a transmission gate. The main amplifiers functions as a read amplifier, write amplifier, and a cache memory.
    Type: Application
    Filed: August 21, 2023
    Publication date: December 7, 2023
    Inventors: Katsuyuki SATO, William Martin SNELGROVE, Saijagan SAIJAGAN
  • Publication number: 20230388341
    Abstract: A computer-implemented method and system for managing and configuring flow specification (FlowSpec) messages for a customer network by a controller device coupled to the customer network. Network traffic is monitored by the controller device flowing through the customer network detect a network attack in the customer network. The controller device enables a network user to configure a Flowspec message responsive to the detected network attack. The controller device preferably enables the network user to either 1) manually configure a FlowSpec message or 2) configure a Flowspec message utilizing one or more pre-existing FlowSpec rulesets preferably defined for that customer network.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 30, 2023
    Applicant: Arbor Networks, Inc.
    Inventors: Chris Thiele, Ryan O'Reilly, William Martin Northway, JR.
  • Publication number: 20230376563
    Abstract: A processing device includes a two-dimensional array of processing elements, each processing element including an arithmetic logic unit to perform an operation. The device further includes interconnections among the two-dimensional array of processing elements to provide direct communication among neighboring processing elements of the two-dimensional array of processing elements. A processing element of the two-dimensional array of processing elements is connected to a first neighbor processing element that is immediately adjacent the processing element in a first dimension of the two-dimensional array. The processing element is further connected to a second neighbor processing element that is immediately adjacent the processing element in a second dimension of the two-dimensional array.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 23, 2023
    Inventor: William Martin SNELGROVE
  • Publication number: 20230367739
    Abstract: A computing device includes an array of processing elements mutually connected to perform single instruction multiple data (SIMD) operations, memory cells connected to each processing element to store data related to the SIMD operations, and a cache connected to each processing element to cache data related to the SIMD operations. Caches of adjacent processing elements are connected. The same or another computing device includes rows of mutually connected processing elements to share data. The computing device further includes a row arithmetic logic unit (ALU) at each row of processing elements. The row ALU of a respective row is configured to perform an operation with processing elements of the respective row.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 16, 2023
    Inventors: William Martin SNELGROVE, Jonathan SCOBBIE
  • Publication number: 20230359376
    Abstract: A device may include a device memory, and a device functionality circuit, wherein at least a portion of the device functionality circuit may be capable of accessing at least a portion of the device memory, and a control circuit configured to provide information, wherein the information may indicate that the at least a portion of the device functionality circuit may be capable of accessing the at least a portion of the device memory. Additionally, or alternatively, the control circuit may be configured to receive at least one request, and perform, based on the at least one request, a configuration operation, wherein the configuration operation may include configuring at least a portion of the device memory to be accessed by the at least a portion of the device functionality circuit.
    Type: Application
    Filed: April 28, 2023
    Publication date: November 9, 2023
    Inventors: Oscar P. PINTO, William MARTIN
  • Publication number: 20230358414
    Abstract: The system and method to maintain the temperature inside a building or house within comfort levels independently of the Grid. The system has a collector; an accumulator; and a transformer, which is the building or house. The method consists of transforming energy from solar radiation into thermal energy, accumulating that energy into an accumulator, and using that accumulated thermal energy to warm the internal environment of buildings or houses. One of its loops functions between dawn and sunset and includes only the collector and the accumulator; its second loop includes only the accumulator and the transformer and operates primarily between sunset and dawn. The collector uses a blackened surface to transform sun's radiation into thermal energy to warm air that is used to conduct the thermal energy throughout the system. The system can be built with inexpensive material; utilized in significantly isolated areas; and constructed and assembled on site.
    Type: Application
    Filed: May 7, 2022
    Publication date: November 9, 2023
    Applicant: Cambridge Research and Technology L.L.C.
    Inventors: Julio Cesar Guerrero, William Martin Worek
  • Publication number: 20230342208
    Abstract: An apparatus may include a device including at least one computational resource configured to perform a computational device function, and a circuit configured to access, based on an identifier, the computational device function, wherein the identifier may include protocol information for the computational device function. The protocol information may include information to pass a parameter. The information to pass the parameter may include information to pass a parameter to the computational device function. The information to pass the parameter may indicate a parameter passing technique. The parameter passing technique may include passing the parameter with a command. The parameter passing technique may include passing the parameter using a reference to the parameter. The identifier may include a first portion including at least a portion of the protocol information. The identifier may include a second portion including information to identify a functionality of the computational device function.
    Type: Application
    Filed: July 5, 2023
    Publication date: October 26, 2023
    Inventors: Oscar P. PINTO, William MARTIN
  • Publication number: 20230345180
    Abstract: Electroacoustic drivers that can be utilized in loudspeaker systems that utilize drivers having a magnetic negative spring (MNS) (such as reluctance assist drivers (RAD) and permanent magnet crown (PMC) drivers). The electroacoustic drivers can be used at all audio frequencies, including subwoofer frequencies. The magnetic negative springs of the electroacoustic drivers can cancel, or partially cancel, the large pressure forces on a sound panel (of an audio speaker) so that substantial subwoofer notes can be efficiently and cost effectively produced in small/portable speakers. The electroacoustic drivers can include a stabilizing/centering mechanism to overcome the destabilizing forces of a MNS that are too large for a voice coil alone to produce.
    Type: Application
    Filed: September 18, 2020
    Publication date: October 26, 2023
    Applicant: CLEAN ENERGY LABS, LLC
    Inventors: Joseph F. Pinkerton, David A. Badger, James A. Andrews, William Martin Lackowski, William Neil Everett
  • Publication number: 20230330836
    Abstract: A wearable robotic device includes a hip-mounted, powered exoskeleton, an adjustable vest coupled to the exoskeleton, a power source for powering the exoskeleton, a computing device for controlling the robotic device and determining when to activate the powered exoskeleton. The exoskeleton includes a pair of motor units configurable between a first powered mode wherein the exoskeleton assists in extending the user’s hip and a second free mode wherein the user is able to freely extend or contract the hip.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 19, 2023
    Inventors: Thomas Sugar, Kevin Hollander, Darren Kinney, William Martin
  • Publication number: 20230321237
    Abstract: The present is directed to compositions comprising regulatory T cell epitopes, wherein said epitopes comprise a polypeptide comprising at least a portion of SEQ NOS: 1-73, fragments and/or variants thereof, as well as methods of producing and using the same.
    Type: Application
    Filed: August 13, 2021
    Publication date: October 12, 2023
    Inventors: Anne De Groot, William Martin