Patents by Inventor William Boyd
William Boyd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10204803Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die can be provided. A polymer layer can be formed over the semiconductor die. A via can be formed in the polymer layer. The polymer layer can be cross-linked in a first process, after forming the via, by exposing the polymer layer to ultraviolet (UV) radiation to form a sidewall of the via with via sidewall slope greater than or equal to 45 degrees and to further form a cross-linked via sidewall surface. The polymer layer can be thermally cured in a second process after the first process, wherein a maximum ramp-up rate from room temperature to a peak temperature of the second process is greater than 10 degrees Celsius per minute.Type: GrantFiled: October 6, 2015Date of Patent: February 12, 2019Assignee: Deca Technologies Inc.Inventors: William Boyd Rogers, Willibrordus Gerardus Maria van den Hoek
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Publication number: 20180330966Abstract: A method of making a semiconductor device may include providing a carrier comprising a semiconductor die mounting site. A build-up interconnect structure may be formed over the carrier. A first portion of a conductive interconnect may be formed over the build-up interconnect structure in a periphery of the semiconductor die mounting site. An etch stop layer and a second portion of the conductive interconnect may be formed over the first portion of the conductive interconnect. A semiconductor die may be mounted to the build-up interconnect at the semiconductor die mounting site. The conductive interconnect and the semiconductor die may be encapsulated with a mold compound. A first end of the conductive interconnect on the second portion of the conductive interconnect may be exposed. The carrier may be removed to expose the build-up interconnect structure. The first portion of the conductive interconnect may be etched to expose the etch stop layer.Type: ApplicationFiled: June 19, 2018Publication date: November 15, 2018Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Patent number: 10050004Abstract: A method of making a semiconductor device can comprise providing a temporary carrier comprising a semiconductor die mounting site, and forming an insulating layer over the temporary carrier. Conductive pads can be formed within openings in the insulating layer and be positioned both within and without the die mounting area. A backside redistribution layer (RDL) can be formed over the temporary carrier before mounting a semiconductor die at the die mounting site. Conductive interconnects can be formed over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted face up to the insulating layer. The conductive interconnects, backside RDL, and semiconductor die can be encapsulated with a mold compound. A build-up interconnect structure can be formed and connected to the semiconductor die and the conductive interconnects. The temporary carrier can be removed and the conductive pads exposed in a grinding process.Type: GrantFiled: November 18, 2016Date of Patent: August 14, 2018Assignee: DECA Technologies Inc.Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Patent number: 9938669Abstract: A regulator moldboard and grader blade assembly includes a moldboard having at least one transversely extending pin, the pin having a notch with a surface inclined toward the moldboard. At least one grader blade has at least one mounting opening having a flared surface complementary to the notch so that the blade is hangable on the pin so that the notch draws the blade against the moldboard as a fastener tightens the blade to the moldboard.Type: GrantFiled: September 16, 2015Date of Patent: April 10, 2018Assignee: NORDCO INC.Inventors: James William Boyd, David A. Spence, Justin Jerome Pipol, Michael David Thompson
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Publication number: 20170221830Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.Type: ApplicationFiled: April 4, 2017Publication date: August 3, 2017Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Publication number: 20170221719Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.Type: ApplicationFiled: April 11, 2017Publication date: August 3, 2017Inventors: Timothy L. Olson, William Boyd Rogers, Ferdinand Aldas
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Publication number: 20170148755Abstract: A method of making a semiconductor device can comprise providing a temporary carrier comprising a semiconductor die mounting site, and forming an insulating layer over the temporary carrier. Conductive pads can be formed within openings in the insulating layer and be positioned both within and without the die mounting area. A backside redistribution layer (RDL) can be formed over the temporary carrier before mounting a semiconductor die at the die mounting site. Conductive interconnects can be formed over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted face up to the insulating layer. The conductive interconnects, backside RDL, and semiconductor die can be encapsulated with a mold compound. A build-up interconnect structure can be formed and connected to the semiconductor die and the conductive interconnects. The temporary carrier can be removed and the conductive pads exposed in a grinding process.Type: ApplicationFiled: November 18, 2016Publication date: May 25, 2017Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Patent number: 9640495Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.Type: GrantFiled: July 7, 2016Date of Patent: May 2, 2017Assignee: Deca Technologies Inc.Inventors: Timothy L. Olson, William Boyd Rogers, Ferdinand Aldas
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Patent number: 9613830Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.Type: GrantFiled: May 10, 2016Date of Patent: April 4, 2017Assignee: Deca Technologies Inc.Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Publication number: 20170012009Abstract: A method of removing at least a portion of a layer of material from over a semiconductor substrate that can include dispensing an etching solution over the semiconductor substrate to form a pool of etching solution on the layer of material, wherein a footprint of the pool of etching solution is less than a footprint of the semiconductor substrate. The pool of etching solution and the semiconductor substrate can be moved with respect to each other. A pool boundary of the pool of etching solution can be defined on the semiconductor substrate with at least one air-knife such that the pool of etching solution etches the layer of material over the semiconductor substrate within the footprint of the pool of etching solution. The etching solution and at least a portion of the layer of material etched by the etching solution can be removed with the at least one air-knife.Type: ApplicationFiled: July 7, 2016Publication date: January 12, 2017Inventors: Timothy L. Olson, William Boyd Rogers, Ferdinand Aldas
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Publication number: 20160260682Abstract: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.Type: ApplicationFiled: May 10, 2016Publication date: September 8, 2016Inventors: Christopher M. Scanlan, William Boyd Rogers, Craig Bishop
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Publication number: 20160108582Abstract: A regulator moldboard and grader blade assembly is provided and includes a moldboard having at least one transversely extending pin, the pin having a notch with a surface inclined toward the moldboard. At least one grader blade has at least one mounting opening having a flared surface complementary to the notch so that the blade is hangable on the pin so that the notch draws the blade against the moldboard as a fastener tightens the blade to the moldboard.Type: ApplicationFiled: September 16, 2015Publication date: April 21, 2016Inventors: James William BOYD, David A. SPENCE, Justin Jerome PIPOL, Michael David Thompson
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Publication number: 20160027666Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die can be provided. A polymer layer can be formed over the semiconductor die. A via can be formed in the polymer layer. The polymer layer can be cross-linked in a first process, after forming the via, by exposing the polymer layer to ultraviolet (UV) radiation to form a sidewall of the via with via sidewall slope greater than or equal to 45 degrees and to further form a cross-linked via sidewall surface. The polymer layer can be thermally cured in a second process after the first process, wherein a maximum ramp-up rate from room temperature to a peak temperature of the second process is greater than 10 degrees Celsius per minute.Type: ApplicationFiled: October 6, 2015Publication date: January 28, 2016Inventors: William Boyd Rogers, Willibrordus Gerardus Maria van den Hoek
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Patent number: 9212456Abstract: A rail fastener orienter is provided for orienting rail fasteners to a desired orientation, the fasteners having a head, an opposite tip and a shank connecting the head to the tip, and being sequentially provided to the orienter in one of a head right, head left, head up and head down orientation. The orienter includes a frame having an upper end and an opposite lower end, and defining a track with an inlet adjacent the upper end, and an outlet adjacent the lower end, the track dimensioned for slidingly and rotatingly accommodating the shank. At least one stage holder is provided for accommodating the fastener in the track as the head is at least partially engaged by at least one bumper for repositioning to a desired one of the orientations, such that the fastener reaches the outlet in the desired orientation after axial rotation.Type: GrantFiled: January 8, 2013Date of Patent: December 15, 2015Assignee: Nordco Inc.Inventors: Michael Thomas Pier, Daniel Edward Van Ert, Justin Jerome Pipol, James William Boyd
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Patent number: 9208907Abstract: A method to perform signal validation for either reactor fixed incore detectors and/or core exit thermocouples to enhance core monitoring systems. The method uses a combination of both measured sensor signals and expected signal responses to develop a ratio of measured to expected signals. The ratios are evaluated by determining the expected ratios for each detector based on the behavior of the remaining collection of detectors, taking into account the geometry/location of the other detectors. The method also provides for automatic removal of invalid detectors from the core power distribution determination if sufficient detectors remain on line to adequately characterize the core's power distribution.Type: GrantFiled: February 20, 2013Date of Patent: December 8, 2015Assignee: Westinghouse Electric Company LLCInventors: David J. Krieg, William A. Boyd, Nicholas A. Bachmann
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Patent number: 9159547Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die is provided. A polymer layer is formed over the semiconductor die. A via is formed in the polymer layer. The polymer layer is crosslinked in a first process. The polymer layer is thermally cured in a second process. The polymer layer can comprise polybenzoxazoles (PBO), polyimide, benzocyclobutene (BCB), or siloxane-based polymers. A surface of the polymer layer can be crosslinked by a UV bake to control a slope of the via during subsequent curing. The second process can further comprise thermally curing the polymer layer using conduction, convection, infrared, or microwave heating. The polymer layer can be thermally cured by increasing a temperature of the polymer at a rate greater than or equal to 10 degrees Celsius per minute, and can be completely cured in less than or equal to 60 minutes.Type: GrantFiled: September 17, 2013Date of Patent: October 13, 2015Assignee: DECA Technologies Inc.Inventors: William Boyd Rogers, Willibrordus Gerardus Maria van den Hoek
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Patent number: 9088233Abstract: An apparatus for driving a motor comprises a drive signal generation circuit configured to produce pulses on a pulse-width modulated drive signal in response to a control signal. A detection circuit is coupled to receive a commutation signal from the motor to monitor the speed of the motor. A control signal generation circuit is configured to dynamically generate the control signal so that a frequency of pulse-width modulated drive signal corresponds with the duration of the phase of the motor, so as to reduce the occurrence of an incomplete pulse on the drive signal. Methods for driving a motor are also disclosed.Type: GrantFiled: December 18, 2012Date of Patent: July 21, 2015Assignee: Allegro Microsystems, LLCInventors: William Boyd Alcorn, Chee-Kiong Ng, William P. Taylor
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Publication number: 20150079805Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die is provided. A polymer layer is formed over the semiconductor die. A via is formed in the polymer layer. The polymer layer is crosslinked in a first process. The polymer layer is thermally cured in a second process. The polymer layer can comprise polybenzoxazoles (PBO), polyimide, benzocyclobutene (BCB), or siloxane-based polymers. A surface of the polymer layer can be crosslinked by a UV bake to control a slope of the via during subsequent curing. The second process can further comprise thermally curing the polymer layer using conduction, convection, infrared, or microwave heating. The polymer layer can be thermally cured by increasing a temperature of the polymer at a rate greater than or equal to 10 degrees Celsius per minute, and can be completely cured in less than or equal to 60 minutes.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: DECA TECHNOLOGIES INC.Inventors: William Boyd Rogers, Willibrordus Gerardus Maria van den Hoek
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Patent number: 8891087Abstract: A system and method for visualizing a biological sample. One or more spectra are selected for illuminating the biological sample to indicate one or more chemicals in the biological sample. The biological sample is illuminated with the one or more spectra. Reflected light is analyzed to determine characteristics of the biological sample.Type: GrantFiled: June 8, 2012Date of Patent: November 18, 2014Assignee: Digital Light InnovationsInventors: Karel J. Zuzak, William Boyd Werner, Duane Scott Dewald, Brian Crowell
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Patent number: D722531Type: GrantFiled: January 8, 2013Date of Patent: February 17, 2015Assignee: Nordco Inc.Inventors: Michael Thomas Pier, Daniel Edward Van Ert, Justin Jerome Pipol, James William Boyd